diff options
Diffstat (limited to 'src/video_core/pica.h')
| -rw-r--r-- | src/video_core/pica.h | 67 |
1 files changed, 42 insertions, 25 deletions
diff --git a/src/video_core/pica.h b/src/video_core/pica.h index fe20cd77d..8acad8676 100644 --- a/src/video_core/pica.h +++ b/src/video_core/pica.h | |||
| @@ -489,14 +489,14 @@ struct Regs { | |||
| 489 | 489 | ||
| 490 | INSERT_PADDING_WORDS(0xe0); | 490 | INSERT_PADDING_WORDS(0xe0); |
| 491 | 491 | ||
| 492 | struct { | 492 | enum class VertexAttributeFormat : u64 { |
| 493 | enum class Format : u64 { | 493 | BYTE = 0, |
| 494 | BYTE = 0, | 494 | UBYTE = 1, |
| 495 | UBYTE = 1, | 495 | SHORT = 2, |
| 496 | SHORT = 2, | 496 | FLOAT = 3, |
| 497 | FLOAT = 3, | 497 | }; |
| 498 | }; | ||
| 499 | 498 | ||
| 499 | struct { | ||
| 500 | BitField<0, 29, u32> base_address; | 500 | BitField<0, 29, u32> base_address; |
| 501 | 501 | ||
| 502 | u32 GetPhysicalBaseAddress() const { | 502 | u32 GetPhysicalBaseAddress() const { |
| @@ -505,29 +505,29 @@ struct Regs { | |||
| 505 | 505 | ||
| 506 | // Descriptor for internal vertex attributes | 506 | // Descriptor for internal vertex attributes |
| 507 | union { | 507 | union { |
| 508 | BitField< 0, 2, Format> format0; // size of one element | 508 | BitField< 0, 2, VertexAttributeFormat> format0; // size of one element |
| 509 | BitField< 2, 2, u64> size0; // number of elements minus 1 | 509 | BitField< 2, 2, u64> size0; // number of elements minus 1 |
| 510 | BitField< 4, 2, Format> format1; | 510 | BitField< 4, 2, VertexAttributeFormat> format1; |
| 511 | BitField< 6, 2, u64> size1; | 511 | BitField< 6, 2, u64> size1; |
| 512 | BitField< 8, 2, Format> format2; | 512 | BitField< 8, 2, VertexAttributeFormat> format2; |
| 513 | BitField<10, 2, u64> size2; | 513 | BitField<10, 2, u64> size2; |
| 514 | BitField<12, 2, Format> format3; | 514 | BitField<12, 2, VertexAttributeFormat> format3; |
| 515 | BitField<14, 2, u64> size3; | 515 | BitField<14, 2, u64> size3; |
| 516 | BitField<16, 2, Format> format4; | 516 | BitField<16, 2, VertexAttributeFormat> format4; |
| 517 | BitField<18, 2, u64> size4; | 517 | BitField<18, 2, u64> size4; |
| 518 | BitField<20, 2, Format> format5; | 518 | BitField<20, 2, VertexAttributeFormat> format5; |
| 519 | BitField<22, 2, u64> size5; | 519 | BitField<22, 2, u64> size5; |
| 520 | BitField<24, 2, Format> format6; | 520 | BitField<24, 2, VertexAttributeFormat> format6; |
| 521 | BitField<26, 2, u64> size6; | 521 | BitField<26, 2, u64> size6; |
| 522 | BitField<28, 2, Format> format7; | 522 | BitField<28, 2, VertexAttributeFormat> format7; |
| 523 | BitField<30, 2, u64> size7; | 523 | BitField<30, 2, u64> size7; |
| 524 | BitField<32, 2, Format> format8; | 524 | BitField<32, 2, VertexAttributeFormat> format8; |
| 525 | BitField<34, 2, u64> size8; | 525 | BitField<34, 2, u64> size8; |
| 526 | BitField<36, 2, Format> format9; | 526 | BitField<36, 2, VertexAttributeFormat> format9; |
| 527 | BitField<38, 2, u64> size9; | 527 | BitField<38, 2, u64> size9; |
| 528 | BitField<40, 2, Format> format10; | 528 | BitField<40, 2, VertexAttributeFormat> format10; |
| 529 | BitField<42, 2, u64> size10; | 529 | BitField<42, 2, u64> size10; |
| 530 | BitField<44, 2, Format> format11; | 530 | BitField<44, 2, VertexAttributeFormat> format11; |
| 531 | BitField<46, 2, u64> size11; | 531 | BitField<46, 2, u64> size11; |
| 532 | 532 | ||
| 533 | BitField<48, 12, u64> attribute_mask; | 533 | BitField<48, 12, u64> attribute_mask; |
| @@ -536,8 +536,8 @@ struct Regs { | |||
| 536 | BitField<60, 4, u64> num_extra_attributes; | 536 | BitField<60, 4, u64> num_extra_attributes; |
| 537 | }; | 537 | }; |
| 538 | 538 | ||
| 539 | inline Format GetFormat(int n) const { | 539 | inline VertexAttributeFormat GetFormat(int n) const { |
| 540 | Format formats[] = { | 540 | VertexAttributeFormat formats[] = { |
| 541 | format0, format1, format2, format3, | 541 | format0, format1, format2, format3, |
| 542 | format4, format5, format6, format7, | 542 | format4, format5, format6, format7, |
| 543 | format8, format9, format10, format11 | 543 | format8, format9, format10, format11 |
| @@ -555,14 +555,18 @@ struct Regs { | |||
| 555 | } | 555 | } |
| 556 | 556 | ||
| 557 | inline int GetElementSizeInBytes(int n) const { | 557 | inline int GetElementSizeInBytes(int n) const { |
| 558 | return (GetFormat(n) == Format::FLOAT) ? 4 : | 558 | return (GetFormat(n) == VertexAttributeFormat::FLOAT) ? 4 : |
| 559 | (GetFormat(n) == Format::SHORT) ? 2 : 1; | 559 | (GetFormat(n) == VertexAttributeFormat::SHORT) ? 2 : 1; |
| 560 | } | 560 | } |
| 561 | 561 | ||
| 562 | inline int GetStride(int n) const { | 562 | inline int GetStride(int n) const { |
| 563 | return GetNumElements(n) * GetElementSizeInBytes(n); | 563 | return GetNumElements(n) * GetElementSizeInBytes(n); |
| 564 | } | 564 | } |
| 565 | 565 | ||
| 566 | inline bool IsDefaultAttribute(int id) const { | ||
| 567 | return (id >= 12) || (attribute_mask & (1 << id)) != 0; | ||
| 568 | } | ||
| 569 | |||
| 566 | inline int GetNumTotalAttributes() const { | 570 | inline int GetNumTotalAttributes() const { |
| 567 | return (int)num_extra_attributes+1; | 571 | return (int)num_extra_attributes+1; |
| 568 | } | 572 | } |
| @@ -625,7 +629,18 @@ struct Regs { | |||
| 625 | u32 trigger_draw; | 629 | u32 trigger_draw; |
| 626 | u32 trigger_draw_indexed; | 630 | u32 trigger_draw_indexed; |
| 627 | 631 | ||
| 628 | INSERT_PADDING_WORDS(0x2e); | 632 | INSERT_PADDING_WORDS(0x2); |
| 633 | |||
| 634 | // These registers are used to setup the default "fall-back" vertex shader attributes | ||
| 635 | struct { | ||
| 636 | // Index of the current default attribute | ||
| 637 | u32 index; | ||
| 638 | |||
| 639 | // Writing to these registers sets the "current" default attribute. | ||
| 640 | u32 set_value[3]; | ||
| 641 | } vs_default_attributes_setup; | ||
| 642 | |||
| 643 | INSERT_PADDING_WORDS(0x28); | ||
| 629 | 644 | ||
| 630 | enum class TriangleTopology : u32 { | 645 | enum class TriangleTopology : u32 { |
| 631 | List = 0, | 646 | List = 0, |
| @@ -669,7 +684,7 @@ struct Regs { | |||
| 669 | BitField<56, 4, u64> attribute14_register; | 684 | BitField<56, 4, u64> attribute14_register; |
| 670 | BitField<60, 4, u64> attribute15_register; | 685 | BitField<60, 4, u64> attribute15_register; |
| 671 | 686 | ||
| 672 | int GetRegisterForAttribute(int attribute_index) { | 687 | int GetRegisterForAttribute(int attribute_index) const { |
| 673 | u64 fields[] = { | 688 | u64 fields[] = { |
| 674 | attribute0_register, attribute1_register, attribute2_register, attribute3_register, | 689 | attribute0_register, attribute1_register, attribute2_register, attribute3_register, |
| 675 | attribute4_register, attribute5_register, attribute6_register, attribute7_register, | 690 | attribute4_register, attribute5_register, attribute6_register, attribute7_register, |
| @@ -775,6 +790,7 @@ struct Regs { | |||
| 775 | ADD_FIELD(num_vertices); | 790 | ADD_FIELD(num_vertices); |
| 776 | ADD_FIELD(trigger_draw); | 791 | ADD_FIELD(trigger_draw); |
| 777 | ADD_FIELD(trigger_draw_indexed); | 792 | ADD_FIELD(trigger_draw_indexed); |
| 793 | ADD_FIELD(vs_default_attributes_setup); | ||
| 778 | ADD_FIELD(triangle_topology); | 794 | ADD_FIELD(triangle_topology); |
| 779 | ADD_FIELD(vs_bool_uniforms); | 795 | ADD_FIELD(vs_bool_uniforms); |
| 780 | ADD_FIELD(vs_int_uniforms); | 796 | ADD_FIELD(vs_int_uniforms); |
| @@ -849,6 +865,7 @@ ASSERT_REG_POSITION(index_array, 0x227); | |||
| 849 | ASSERT_REG_POSITION(num_vertices, 0x228); | 865 | ASSERT_REG_POSITION(num_vertices, 0x228); |
| 850 | ASSERT_REG_POSITION(trigger_draw, 0x22e); | 866 | ASSERT_REG_POSITION(trigger_draw, 0x22e); |
| 851 | ASSERT_REG_POSITION(trigger_draw_indexed, 0x22f); | 867 | ASSERT_REG_POSITION(trigger_draw_indexed, 0x22f); |
| 868 | ASSERT_REG_POSITION(vs_default_attributes_setup, 0x232); | ||
| 852 | ASSERT_REG_POSITION(triangle_topology, 0x25e); | 869 | ASSERT_REG_POSITION(triangle_topology, 0x25e); |
| 853 | ASSERT_REG_POSITION(vs_bool_uniforms, 0x2b0); | 870 | ASSERT_REG_POSITION(vs_bool_uniforms, 0x2b0); |
| 854 | ASSERT_REG_POSITION(vs_int_uniforms, 0x2b1); | 871 | ASSERT_REG_POSITION(vs_int_uniforms, 0x2b1); |