diff options
Diffstat (limited to 'src/shader_recompiler/ir_opt/ssa_rewrite_pass.cpp')
| -rw-r--r-- | src/shader_recompiler/ir_opt/ssa_rewrite_pass.cpp | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/src/shader_recompiler/ir_opt/ssa_rewrite_pass.cpp b/src/shader_recompiler/ir_opt/ssa_rewrite_pass.cpp index a62d3f56b..7713e3ba9 100644 --- a/src/shader_recompiler/ir_opt/ssa_rewrite_pass.cpp +++ b/src/shader_recompiler/ir_opt/ssa_rewrite_pass.cpp | |||
| @@ -19,7 +19,7 @@ | |||
| 19 | #include "shader_recompiler/frontend/ir/basic_block.h" | 19 | #include "shader_recompiler/frontend/ir/basic_block.h" |
| 20 | #include "shader_recompiler/frontend/ir/function.h" | 20 | #include "shader_recompiler/frontend/ir/function.h" |
| 21 | #include "shader_recompiler/frontend/ir/microinstruction.h" | 21 | #include "shader_recompiler/frontend/ir/microinstruction.h" |
| 22 | #include "shader_recompiler/frontend/ir/opcode.h" | 22 | #include "shader_recompiler/frontend/ir/opcodes.h" |
| 23 | #include "shader_recompiler/frontend/ir/pred.h" | 23 | #include "shader_recompiler/frontend/ir/pred.h" |
| 24 | #include "shader_recompiler/frontend/ir/reg.h" | 24 | #include "shader_recompiler/frontend/ir/reg.h" |
| 25 | #include "shader_recompiler/ir_opt/passes.h" | 25 | #include "shader_recompiler/ir_opt/passes.h" |
| @@ -150,52 +150,52 @@ private: | |||
| 150 | 150 | ||
| 151 | void SsaRewritePass(IR::Function& function) { | 151 | void SsaRewritePass(IR::Function& function) { |
| 152 | Pass pass; | 152 | Pass pass; |
| 153 | for (const auto& block : function.blocks) { | 153 | for (IR::Block* const block : function.blocks) { |
| 154 | for (IR::Inst& inst : block->Instructions()) { | 154 | for (IR::Inst& inst : block->Instructions()) { |
| 155 | switch (inst.Opcode()) { | 155 | switch (inst.Opcode()) { |
| 156 | case IR::Opcode::SetRegister: | 156 | case IR::Opcode::SetRegister: |
| 157 | if (const IR::Reg reg{inst.Arg(0).Reg()}; reg != IR::Reg::RZ) { | 157 | if (const IR::Reg reg{inst.Arg(0).Reg()}; reg != IR::Reg::RZ) { |
| 158 | pass.WriteVariable(reg, block.get(), inst.Arg(1)); | 158 | pass.WriteVariable(reg, block, inst.Arg(1)); |
| 159 | } | 159 | } |
| 160 | break; | 160 | break; |
| 161 | case IR::Opcode::SetPred: | 161 | case IR::Opcode::SetPred: |
| 162 | if (const IR::Pred pred{inst.Arg(0).Pred()}; pred != IR::Pred::PT) { | 162 | if (const IR::Pred pred{inst.Arg(0).Pred()}; pred != IR::Pred::PT) { |
| 163 | pass.WriteVariable(pred, block.get(), inst.Arg(1)); | 163 | pass.WriteVariable(pred, block, inst.Arg(1)); |
| 164 | } | 164 | } |
| 165 | break; | 165 | break; |
| 166 | case IR::Opcode::SetZFlag: | 166 | case IR::Opcode::SetZFlag: |
| 167 | pass.WriteVariable(ZeroFlagTag{}, block.get(), inst.Arg(0)); | 167 | pass.WriteVariable(ZeroFlagTag{}, block, inst.Arg(0)); |
| 168 | break; | 168 | break; |
| 169 | case IR::Opcode::SetSFlag: | 169 | case IR::Opcode::SetSFlag: |
| 170 | pass.WriteVariable(SignFlagTag{}, block.get(), inst.Arg(0)); | 170 | pass.WriteVariable(SignFlagTag{}, block, inst.Arg(0)); |
| 171 | break; | 171 | break; |
| 172 | case IR::Opcode::SetCFlag: | 172 | case IR::Opcode::SetCFlag: |
| 173 | pass.WriteVariable(CarryFlagTag{}, block.get(), inst.Arg(0)); | 173 | pass.WriteVariable(CarryFlagTag{}, block, inst.Arg(0)); |
| 174 | break; | 174 | break; |
| 175 | case IR::Opcode::SetOFlag: | 175 | case IR::Opcode::SetOFlag: |
| 176 | pass.WriteVariable(OverflowFlagTag{}, block.get(), inst.Arg(0)); | 176 | pass.WriteVariable(OverflowFlagTag{}, block, inst.Arg(0)); |
| 177 | break; | 177 | break; |
| 178 | case IR::Opcode::GetRegister: | 178 | case IR::Opcode::GetRegister: |
| 179 | if (const IR::Reg reg{inst.Arg(0).Reg()}; reg != IR::Reg::RZ) { | 179 | if (const IR::Reg reg{inst.Arg(0).Reg()}; reg != IR::Reg::RZ) { |
| 180 | inst.ReplaceUsesWith(pass.ReadVariable(reg, block.get())); | 180 | inst.ReplaceUsesWith(pass.ReadVariable(reg, block)); |
| 181 | } | 181 | } |
| 182 | break; | 182 | break; |
| 183 | case IR::Opcode::GetPred: | 183 | case IR::Opcode::GetPred: |
| 184 | if (const IR::Pred pred{inst.Arg(0).Pred()}; pred != IR::Pred::PT) { | 184 | if (const IR::Pred pred{inst.Arg(0).Pred()}; pred != IR::Pred::PT) { |
| 185 | inst.ReplaceUsesWith(pass.ReadVariable(pred, block.get())); | 185 | inst.ReplaceUsesWith(pass.ReadVariable(pred, block)); |
| 186 | } | 186 | } |
| 187 | break; | 187 | break; |
| 188 | case IR::Opcode::GetZFlag: | 188 | case IR::Opcode::GetZFlag: |
| 189 | inst.ReplaceUsesWith(pass.ReadVariable(ZeroFlagTag{}, block.get())); | 189 | inst.ReplaceUsesWith(pass.ReadVariable(ZeroFlagTag{}, block)); |
| 190 | break; | 190 | break; |
| 191 | case IR::Opcode::GetSFlag: | 191 | case IR::Opcode::GetSFlag: |
| 192 | inst.ReplaceUsesWith(pass.ReadVariable(SignFlagTag{}, block.get())); | 192 | inst.ReplaceUsesWith(pass.ReadVariable(SignFlagTag{}, block)); |
| 193 | break; | 193 | break; |
| 194 | case IR::Opcode::GetCFlag: | 194 | case IR::Opcode::GetCFlag: |
| 195 | inst.ReplaceUsesWith(pass.ReadVariable(CarryFlagTag{}, block.get())); | 195 | inst.ReplaceUsesWith(pass.ReadVariable(CarryFlagTag{}, block)); |
| 196 | break; | 196 | break; |
| 197 | case IR::Opcode::GetOFlag: | 197 | case IR::Opcode::GetOFlag: |
| 198 | inst.ReplaceUsesWith(pass.ReadVariable(OverflowFlagTag{}, block.get())); | 198 | inst.ReplaceUsesWith(pass.ReadVariable(OverflowFlagTag{}, block)); |
| 199 | break; | 199 | break; |
| 200 | default: | 200 | default: |
| 201 | break; | 201 | break; |