From 742d11c2ad948c8630be15901514ec9e5e5fcd20 Mon Sep 17 00:00:00 2001
From: FernandoS27
Date: Fri, 26 Mar 2021 16:02:04 +0100
Subject: shader: Implement TLD4.PTP

---
 .../backend/spirv/emit_spirv_composite.cpp         | 31 +++++++++++++++++++---
 1 file changed, 28 insertions(+), 3 deletions(-)

(limited to 'src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp')

diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp
index 616e63676..0da682859 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp
@@ -3,10 +3,15 @@
 // Refer to the license.txt file included.
 
 #include "shader_recompiler/backend/spirv/emit_spirv.h"
+#include "shader_recompiler/frontend/ir/modifiers.h"
 
 namespace Shader::Backend::SPIRV {
 
-Id EmitCompositeConstructU32x2(EmitContext& ctx, Id e1, Id e2) {
+Id EmitCompositeConstructU32x2(EmitContext& ctx, IR::Inst* inst, Id e1, Id e2) {
+    const auto info{inst->Flags<IR::CompositeDecoration>()};
+    if (info.is_constant) {
+        return ctx.ConstantComposite(ctx.U32[2], e1, e2);
+    }
     return ctx.OpCompositeConstruct(ctx.U32[2], e1, e2);
 }
 
@@ -42,7 +47,12 @@ Id EmitCompositeInsertU32x4(EmitContext& ctx, Id composite, Id object, u32 index
     return ctx.OpCompositeInsert(ctx.U32[4], object, composite, index);
 }
 
-Id EmitCompositeConstructF16x2(EmitContext& ctx, Id e1, Id e2) {
+Id EmitCompositeConstructF16x2(EmitContext& ctx, IR::Inst* inst, Id e1, Id e2) {
+
+    const auto info{inst->Flags<IR::CompositeDecoration>()};
+    if (info.is_constant) {
+        return ctx.ConstantComposite(ctx.F16[2], e1, e2);
+    }
     return ctx.OpCompositeConstruct(ctx.F16[2], e1, e2);
 }
 
@@ -78,7 +88,11 @@ Id EmitCompositeInsertF16x4(EmitContext& ctx, Id composite, Id object, u32 index
     return ctx.OpCompositeInsert(ctx.F16[4], object, composite, index);
 }
 
-Id EmitCompositeConstructF32x2(EmitContext& ctx, Id e1, Id e2) {
+Id EmitCompositeConstructF32x2(EmitContext& ctx, IR::Inst* inst, Id e1, Id e2) {
+    const auto info{inst->Flags<IR::CompositeDecoration>()};
+    if (info.is_constant) {
+        return ctx.ConstantComposite(ctx.F32[2], e1, e2);
+    }
     return ctx.OpCompositeConstruct(ctx.F32[2], e1, e2);
 }
 
@@ -150,4 +164,15 @@ Id EmitCompositeInsertF64x4(EmitContext& ctx, Id composite, Id object, u32 index
     return ctx.OpCompositeInsert(ctx.F64[4], object, composite, index);
 }
 
+Id EmitCompositeConstructArrayU32x2(EmitContext& ctx, IR::Inst* inst, Id e1, Id e2, Id e3, Id e4) {
+    const auto info{inst->Flags<IR::CompositeDecoration>()};
+    if (info.is_constant) {
+        return ctx.ConstantComposite(ctx.array_U32x2, e1, e2, e3, e4);
+    }
+    if (ctx.profile.support_variadic_ptp) {
+        return OpCompositeConstruct(ctx.array_U32x2, e1, e2, e3, e4);
+    }
+    return {};
+}
+
 } // namespace Shader::Backend::SPIRV
-- 
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