| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Merge pull request #9694 from ameerj/txq-mips | 2023-01-29 | 1 | -3/+3 | |
| |\ | | | | | shader_recompiler: TXQ: Skip QueryLevels when possible | ||||
| | * | shader_recompiler: TXQ: Skip QueryLevels when possible | 2023-01-28 | 1 | -3/+3 | |
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| * | | shader_recompiler: Remove S32 IR type | 2023-01-25 | 1 | -1/+0 | |
| |/ | | | | | | The frontend IR opcodes do not distinguish between signed and unsigned integer types. Fixes broken shaders when IR validation/graphics debugging is enabled for shaders that used BitCastS32F32 | ||||
| * | video_core: Fix few issues in Tess stage | 2022-11-07 | 1 | -0/+1 | |
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| * | video_core: Fix SNORM texture buffer emulating error (#9001) | 2022-11-04 | 1 | -0/+1 | |
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| * | video_core: Generate mipmap texture by drawing | 2022-09-20 | 1 | -0/+1 | |
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| * | general: Convert source file copyright comments over to SPDX | 2022-04-23 | 1 | -3/+2 | |
| | | | | | | This formats all copyright comments according to SPDX formatting guidelines. Additionally, this resolves the remaining GPLv2 only licensed files by relicensing them to GPLv2.0-or-later. | ||||
| * | lower_int64_to_int32: Add 64-bit atomic fallbacks | 2022-01-29 | 1 | -9/+9 | |
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| * | shaders: Add U64->U32x2 Atomic fallback functions | 2022-01-29 | 1 | -0/+19 | |
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| * | shader: Add integer attribute get optimization pass | 2021-12-29 | 1 | -0/+1 | |
| | | | | | Works around an nvidia driver bug, where casting the integer attributes to float and back to an integer always returned 0. | ||||
| * | shader: Properly scale image reads and add GL SPIR-V support | 2021-11-16 | 1 | -0/+1 | |
| | | | | | Thanks for everything! | ||||
| * | shader: Add IsTextureScaled opcode | 2021-11-16 | 1 | -0/+2 | |
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| * | shader: Add integer division opcodes | 2021-11-16 | 1 | -0/+2 | |
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| * | shader: Add resolution down factor opcode | 2021-11-16 | 1 | -0/+1 | |
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| * | shader: Ignore global memory ops on devices lacking int64 support | 2021-07-22 | 1 | -14/+14 | |
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| * | shader: Remove IAbs64 | 2021-07-22 | 1 | -1/+0 | |
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| * | shader: Move loop safety tests to code emission | 2021-07-22 | 1 | -2/+0 | |
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| * | shader: Add shader loop safety check settings | 2021-07-22 | 1 | -0/+2 | |
| | | | | | Also add a setting for enable Nsight Aftermath. | ||||
| * | shader: Read branch conditions from an instruction | 2021-07-22 | 1 | -1/+2 | |
| | | | | | Fixes the identity removal pass. | ||||
| * | glasm: Initial implementation of phi nodes on GLASM | 2021-07-22 | 1 | -1/+2 | |
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| * | glasm: Rework control flow introducing a syntax list | 2021-07-22 | 1 | -14/+7 | |
| | | | | | | This commit regresses VertexA shaders, their transformation pass has to be adapted to the new control flow. | ||||
| * | shader: Implement Int32 SUATOM/SURED | 2021-07-22 | 1 | -0/+38 | |
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| * | shader: Implement VertexA stage | 2021-07-22 | 1 | -0/+1 | |
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| * | shader: Implement indexed textures | 2021-07-22 | 1 | -12/+12 | |
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| * | shader: Add coarse derivatives | 2021-07-22 | 1 | -0/+2 | |
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| * | shader: Implement fine derivates constant propagation | 2021-07-22 | 1 | -0/+2 | |
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| * | shader: Implement SR_Y_DIRECTION | 2021-07-22 | 1 | -0/+1 | |
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| * | shader: Fix memory barriers | 2021-07-22 | 1 | -3/+2 | |
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| * | shader: Implement SampleMask | 2021-07-22 | 1 | -0/+1 | |
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| * | shader: Implement PIXLD.MY_INDEX | 2021-07-22 | 1 | -0/+1 | |
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| * | shader: Implement tessellation shaders, polygon mode and invocation id | 2021-07-22 | 1 | -0/+3 | |
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| * | shader: Implement geometry shaders | 2021-07-22 | 1 | -4/+4 | |
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| * | shader: Implement OUT | 2021-07-22 | 1 | -0/+2 | |
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| * | shader: Implement SR_THREAD_KILL | 2021-07-22 | 1 | -0/+1 | |
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| * | shader: Implement ATOM/S and RED | 2021-07-22 | 1 | -0/+70 | |
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| * | shader: Move LaneId to the warp emission file and fix AMD | 2021-07-22 | 1 | -1/+1 | |
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| * | shader: Implement SULD and SUST | 2021-07-22 | 1 | -0/+6 | |
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| * | shader: Add subgroup masks | 2021-07-22 | 1 | -0/+5 | |
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| * | shader: Implement BAR and fix memory barriers | 2021-07-22 | 1 | -0/+1 | |
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| * | shader: Reimplement GetCbufU64 as GetCbufU32x2 | 2021-07-22 | 1 | -1/+1 | |
| | | | | | It may generate better code on some compilers and it's easier to handle. | ||||
| * | shader: Address Feedback | 2021-07-22 | 1 | -9/+3 | |
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| * | shader: Implement SR_LaneId | 2021-07-22 | 1 | -0/+1 | |
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| * | shader: Implement MEMBAR | 2021-07-22 | 1 | -0/+3 | |
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| * | shader: Improve VOTE.VTG stub | 2021-07-22 | 1 | -0/+8 | |
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| * | shader: Fix TXD | 2021-07-22 | 1 | -1/+1 | |
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| * | shader: Always pass a lod for TexelFetch | 2021-07-22 | 1 | -3/+3 | |
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| * | shader: Implement ImageGradient | 2021-07-22 | 1 | -0/+3 | |
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| * | shader,spirv: Implement ImageQueryLod. | 2021-07-22 | 1 | -0/+3 | |
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| * | shader: Implement TLD | 2021-07-22 | 1 | -3/+3 | |
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| * | shader: Implement FSWZADD | 2021-07-22 | 1 | -0/+1 | |
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