| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | general: Convert source file copyright comments over to SPDX |  Morph | 2022-04-23 | 1 | -3/+2 |
| | | | | | | This formats all copyright comments according to SPDX formatting guidelines. Additionally, this resolves the remaining GPLv2 only licensed files by relicensing them to GPLv2.0-or-later. | ||||
| * | shader_recompiler: Adjust emit_context includes |  ameerj | 2021-12-05 | 1 | -1/+1 |
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| * | shader: Add integer division opcodes |  ReinUsesLisp | 2021-11-16 | 1 | -0/+8 |
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| * | opengl: Implement LOP.CC | ameerj | 2021-07-22 | 1 | -3/+27 |
| | | | | | Used by MH:Rise | ||||
| * | shader: Remove IAbs64 | ReinUsesLisp | 2021-07-22 | 1 | -4/+0 |
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| * | glasm: Fix INeg32 on negative immediates | ReinUsesLisp | 2021-07-22 | 1 | -1/+5 |
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| * | glasm: Catch more register leaks | ReinUsesLisp | 2021-07-22 | 1 | -18/+40 |
| | | | | | | | | | | | | | | Add support for null registers. These are used when an instruction has no usages. This comes handy when an instruction is only used for its CC value, with the caveat of having to invalidate all pseudo-instructions before defining the instruction itself in the register allocator. This commits changes this. Workaround a bug on Nvidia's condition codes conditional execution using branches. | ||||
| * | glasm: Implement int64 add and subtract | ReinUsesLisp | 2021-07-22 | 1 | -6/+4 |
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| * | glasm: Implement 64-bit shifts | ReinUsesLisp | 2021-07-22 | 1 | -9/+9 |
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| * | glasm: Implement IADD.CC | ameerj | 2021-07-22 | 1 | -1/+26 |
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| * | glasm: Implement BFE.CC | ReinUsesLisp | 2021-07-22 | 1 | -0/+8 |
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| * | glasm: Write result to scalar on integer comparison instructions | ReinUsesLisp | 2021-07-22 | 1 | -10/+10 |
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| * | glasm: Rework control flow introducing a syntax list | ReinUsesLisp | 2021-07-22 | 1 | -3/+6 |
| | | | | | | This commit regresses VertexA shaders, their transformation pass has to be adapted to the new control flow. | ||||
| * | glasm: Review all GLASM insts to be aware of register aliasing | ReinUsesLisp | 2021-07-22 | 1 | -12/+30 |
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| * | glasm: Implement IAbs64 and INeg64 on GLASM | ReinUsesLisp | 2021-07-22 | 1 | -4/+4 |
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| * | glasm: Add conversion instructions to GLASM | ReinUsesLisp | 2021-07-22 | 1 | -4/+6 |
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| * | glasm: Remove unnecesary new white space on Clamp GLASM | ReinUsesLisp | 2021-07-22 | 1 | -4/+4 |
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| * | emit_glasm: Implement more integer alu ops | ameerj | 2021-07-22 | 1 | -36/+30 |
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| * | glasm: Reimplement bitwise ops and BFI/BFE | ameerj | 2021-07-22 | 1 | -46/+36 |
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| * | glasm: Make GLASM aware of types | ReinUsesLisp | 2021-07-22 | 1 | -123/+93 |
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| * | glasm: Use CMP.S for Select32 | ameerj | 2021-07-22 | 1 | -2/+2 |
| | | | | | also fixes ADD and SUB to use U modifier | ||||
| * | glasm: Implement more logical ops | ameerj | 2021-07-22 | 1 | -4/+4 |
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| * | glasm: Implement BFI, BFE | ameerj | 2021-07-22 | 1 | -67/+79 |
| | | | | | Along with implementations of common instructions along the way | ||||
| * | glasm: Implement basic GLASM instructions | ReinUsesLisp | 2021-07-22 | 1 | -0/+228 |
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| * | glasm: Add GLASM backend infrastructure | ReinUsesLisp | 2021-07-22 | 1 | -0/+0 |
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index : yuzu | |
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