summaryrefslogtreecommitdiff
path: root/src/core/arm (follow)
Commit message (Collapse)AuthorAgeFilesLines
...
* SVC: Implement 32-bits wrappers and update Dynarmic.Gravatar Fernando Sahmkow2020-06-272-4/+9
|
* ARM: Update Dynarmic and Setup A32 according to latest interface.Gravatar Fernando Sahmkow2020-06-277-93/+166
|
* ArmDynarmic32: Setup CNTPCT correctlyGravatar Fernando Sahmkow2020-06-271-1/+1
|
* ARMDynarmicInterface: Correct GCC Build Errors.Gravatar Fernando Sahmkow2020-06-272-6/+6
|
* Clang Format.Gravatar Fernando Sahmkow2020-06-272-4/+4
|
* ARMInterface/Externals: Update dynarmic and fit to latest version.Gravatar Fernando Sahmkow2020-06-271-7/+7
|
* ARMInterface: Correct rebase errors.Gravatar Fernando Sahmkow2020-06-273-5/+5
|
* Dynarmic Interface: don't clear cache if JIT has not been created.Gravatar Fernando Sahmkow2020-06-272-0/+6
|
* General: Cleanup legacy code.Gravatar Fernando Sahmkow2020-06-272-2/+0
|
* SingleCore: Use Cycle Timing instead of Host Timing.Gravatar Fernando Sahmkow2020-06-277-34/+62
|
* General: Move ARM_Interface into Threads.Gravatar Fernando Sahmkow2020-06-277-0/+17
|
* Core: Refactor ARM Interface.Gravatar Fernando Sahmkow2020-06-277-18/+26
|
* X64 Clock: Reduce accuracy to be less or equal to guest accuracy.Gravatar Fernando Sahmkow2020-06-271-0/+3
|
* ARM/WaitTree: Better track the CallStack for each thread.Gravatar Fernando Sahmkow2020-06-272-0/+60
|
* SVC/ARM: Correct svcSendSyncRequest and cache ticks on arm interface.Gravatar Fernando Sahmkow2020-06-272-4/+19
|
* ARM: Addapt to new Exclusive Monitor Interface.Gravatar Fernando Sahmkow2020-06-273-22/+20
|
* General: Fix microprofile on dynarmic/svc, fix wait tree showing which ↵Gravatar Fernando Sahmkow2020-06-272-8/+1
| | | | threads were running.
* ARM/Memory: Correct Exclusive Monitor and Implement Exclusive Memory Writes.Gravatar Fernando Sahmkow2020-06-273-15/+63
|
* Scheduler: Remove arm_interface lock and a few corrections.Gravatar Fernando Sahmkow2020-06-271-10/+0
|
* Core: Correct rebase.Gravatar Fernando Sahmkow2020-06-271-12/+6
|
* General: Add better safety for JIT use.Gravatar Fernando Sahmkow2020-06-271-0/+10
|
* General: Recover Prometheus project from harddrive failure Gravatar Fernando Sahmkow2020-06-279-29/+103
| | | | | | | This commit: Implements CPU Interrupts, Replaces Cycle Timing for Host Timing, Reworks the Kernel's Scheduler, Introduce Idle State and Suspended State, Recreates the bootmanager, Initializes Multicore system.
* arm_dynarmic_64: Log the instruction when an exception is raisedGravatar Morph2020-06-221-2/+2
|
* arm_dynarmic_32: Log under Core_ARM instead of HW_GPUGravatar Morph2020-06-221-1/+1
|
* arm_dynarmic_32: Fix implicit conversion error in SetTPIDR_EL0Gravatar ReinUsesLisp2020-06-181-1/+1
| | | | On MSVC builds we treat conversion warnings as errors.
* arm_dynarmic_cp15: Implement CNTPCTGravatar MerryMage2020-06-171-0/+13
|
* arm_dynarmic_cp15: Update CP15Gravatar MerryMage2020-06-174-142/+73
|
* arm_dynarmic_32: InterpreterFallback should never happenGravatar MerryMage2020-06-171-2/+3
|
* physical_core: Make use of std::make_unique instead of std::make_shared in ctorGravatar Lioncash2020-04-243-7/+12
| | | | | | | We can also allow unicorn to be constructed in 32-bit mode or 64-bit mode to satisfy the need for both interpreter instances. Allows this code to compile successfully of non x86-64 architectures.
* Merge pull request #3724 from bunnei/fix-unicornGravatar bunnei2020-04-201-0/+11
|\ | | | | core: arm_unicorn: Fix interpret fallback by temporarily mapping instruction page.
| * core: arm_unicorn: Fix interpret fallback by temporarily mapping instruction ↵Gravatar bunnei2020-04-191-0/+11
| | | | | | | | page.
* | dynarmic: Add option to disable CPU JIT optimizationsGravatar MerryMage2020-04-201-2/+8
|/
* dynarmic: Enable strict alignment checks.Gravatar bunnei2020-04-171-1/+4
| | | | - Also add a missing include.
* core: memory: Move to Core::Memory namespace.Gravatar bunnei2020-04-174-5/+5
| | | | - helpful to disambiguate Kernel::Memory namespace.
* core: kernel: Move SVC to its own namesapce.Gravatar bunnei2020-04-173-3/+3
|
* arm_interface: Ensure ThreadContext is zero'd out.Gravatar bunnei2020-04-171-16/+16
|
* CMakeLists: Specify -Wextra on linux buildsGravatar Lioncash2020-04-151-2/+2
| | | | | | | | | | | Allows reporting more cases where logic errors may exist, such as implicit fallthrough cases, etc. We currently ignore unused parameters, since we currently have many cases where this is intentional (virtual interfaces). While we're at it, we can also tidy up any existing code that causes warnings. This also uncovered a few bugs as well.
* core: Implement separate A32/A64 ARM interfaces.Gravatar bunnei2020-03-028-71/+367
|
* core: dynarmic: Add CP15 from Citra.Gravatar bunnei2020-03-022-0/+232
|
* ARM_Interface: Cache the JITs instead of deleting/recreating.Gravatar Fernando Sahmkow2020-02-262-4/+19
| | | | | | This was a bug inherited from citra which was fixed by then at some time. This commit corrects such bug and ensures JITs are correctly recycled.
* Core: Set all hardware emulation constants in a single file.Gravatar Fernando Sahmkow2020-02-111-1/+2
|
* core/arm: Remove usage of global GetCurrentThread()Gravatar Lioncash2020-01-302-2/+4
| | | | | Now both CPU backends go through their referenced system instance to obtain the current thread.
* System: Address FeedbackGravatar Fernando Sahmkow2020-01-272-3/+5
|
* Core: Refactor CpuCoreManager to CpuManager and Cpu to Core Manager.Gravatar Fernando Sahmkow2020-01-261-1/+1
| | | | This commit instends on better naming the new purpose of this classes.
* ArmInterface: Delegate Exclusive monitor factory to exclusive monitor ↵Gravatar Fernando Sahmkow2020-01-262-1/+22
| | | | interfasce.
* core/memory + arm/dynarmic: Use a global offset within our arm page table.Gravatar Markus Wick2020-01-011-0/+1
| | | | | | This saves us two x64 instructions per load/store instruction. TODO: Clean up our memory code. We can use this optimization here as well.
* core/memory: Migrate over Write{8, 16, 32, 64, Block} to the Memory classGravatar Lioncash2019-11-262-15/+22
| | | | | | | | | The Write functions are used slightly less than the Read functions, which make these a bit nicer to move over. The only adjustments we really need to make here are to Dynarmic's exclusive monitor instance. We need to keep a reference to the currently active memory instance to perform exclusive read/write operations.
* core/memory: Migrate over Read{8, 16, 32, 64, Block} to the Memory classGravatar Lioncash2019-11-262-18/+18
| | | | | | | | | | | | | | With all of the trivial parts of the memory interface moved over, we can get right into moving over the bits that are used. Note that this does require the use of GetInstance from the global system instance to be used within hle_ipc.cpp and the gdbstub. This is fine for the time being, as they both already rely on the global system instance in other functions. These will be removed in a change directed at both of these respectively. For now, it's sufficient, as it still accomplishes the goal of de-globalizing the memory code.
* core: Prepare various classes for memory read/write migrationGravatar Lioncash2019-11-266-9/+14
| | | | | | | | | | Amends a few interfaces to be able to handle the migration over to the new Memory class by passing the class by reference as a function parameter where necessary. Notably, within the filesystem services, this eliminates two ReadBlock() calls by using the helper functions of HLERequestContext to do that for us.
* arm_unicorn: Resolve sign conversion warningsGravatar Lioncash2019-11-123-8/+10
| | | | | While we're at it, this also resolves a type truncation warning as well, given the code was truncating from a 64-bit value to a 32-bit one.
HIC SVNT DRACONES