diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/core/hw/gpu.cpp | 10 | ||||
| -rw-r--r-- | src/core/hw/gpu.h | 14 |
2 files changed, 10 insertions, 14 deletions
diff --git a/src/core/hw/gpu.cpp b/src/core/hw/gpu.cpp index 9c7192313..33a0e0fe7 100644 --- a/src/core/hw/gpu.cpp +++ b/src/core/hw/gpu.cpp | |||
| @@ -89,7 +89,7 @@ inline void Write(u32 addr, const T data) { | |||
| 89 | } source_color = { 0, 0, 0, 0 }; | 89 | } source_color = { 0, 0, 0, 0 }; |
| 90 | 90 | ||
| 91 | switch (config.input_format) { | 91 | switch (config.input_format) { |
| 92 | case Regs::FramebufferFormat::RGBA8: | 92 | case Regs::PixelFormat::RGBA8: |
| 93 | { | 93 | { |
| 94 | // TODO: Most likely got the component order messed up. | 94 | // TODO: Most likely got the component order messed up. |
| 95 | u8* srcptr = source_pointer + x * 4 + y * config.input_width * 4; | 95 | u8* srcptr = source_pointer + x * 4 + y * config.input_width * 4; |
| @@ -106,7 +106,7 @@ inline void Write(u32 addr, const T data) { | |||
| 106 | } | 106 | } |
| 107 | 107 | ||
| 108 | switch (config.output_format) { | 108 | switch (config.output_format) { |
| 109 | /*case Regs::FramebufferFormat::RGBA8: | 109 | /*case Regs::PixelFormat::RGBA8: |
| 110 | { | 110 | { |
| 111 | // TODO: Untested | 111 | // TODO: Untested |
| 112 | u8* dstptr = (u32*)(dest_pointer + x * 4 + y * config.output_width * 4); | 112 | u8* dstptr = (u32*)(dest_pointer + x * 4 + y * config.output_width * 4); |
| @@ -117,7 +117,7 @@ inline void Write(u32 addr, const T data) { | |||
| 117 | break; | 117 | break; |
| 118 | }*/ | 118 | }*/ |
| 119 | 119 | ||
| 120 | case Regs::FramebufferFormat::RGB8: | 120 | case Regs::PixelFormat::RGB8: |
| 121 | { | 121 | { |
| 122 | // TODO: Most likely got the component order messed up. | 122 | // TODO: Most likely got the component order messed up. |
| 123 | u8* dstptr = dest_pointer + x * 3 + y * config.output_width * 3; | 123 | u8* dstptr = dest_pointer + x * 3 + y * config.output_width * 3; |
| @@ -236,13 +236,13 @@ void Init() { | |||
| 236 | framebuffer_top.width = 240; | 236 | framebuffer_top.width = 240; |
| 237 | framebuffer_top.height = 400; | 237 | framebuffer_top.height = 400; |
| 238 | framebuffer_top.stride = 3 * 240; | 238 | framebuffer_top.stride = 3 * 240; |
| 239 | framebuffer_top.color_format = Regs::FramebufferFormat::RGB8; | 239 | framebuffer_top.color_format = Regs::PixelFormat::RGB8; |
| 240 | framebuffer_top.active_fb = 0; | 240 | framebuffer_top.active_fb = 0; |
| 241 | 241 | ||
| 242 | framebuffer_sub.width = 240; | 242 | framebuffer_sub.width = 240; |
| 243 | framebuffer_sub.height = 320; | 243 | framebuffer_sub.height = 320; |
| 244 | framebuffer_sub.stride = 3 * 240; | 244 | framebuffer_sub.stride = 3 * 240; |
| 245 | framebuffer_sub.color_format = Regs::FramebufferFormat::RGB8; | 245 | framebuffer_sub.color_format = Regs::PixelFormat::RGB8; |
| 246 | framebuffer_sub.active_fb = 0; | 246 | framebuffer_sub.active_fb = 0; |
| 247 | 247 | ||
| 248 | NOTICE_LOG(GPU, "initialized OK"); | 248 | NOTICE_LOG(GPU, "initialized OK"); |
diff --git a/src/core/hw/gpu.h b/src/core/hw/gpu.h index c853429a0..92097d182 100644 --- a/src/core/hw/gpu.h +++ b/src/core/hw/gpu.h | |||
| @@ -56,7 +56,7 @@ struct Regs { | |||
| 56 | "Structure size and register block length don't match") | 56 | "Structure size and register block length don't match") |
| 57 | #endif | 57 | #endif |
| 58 | 58 | ||
| 59 | enum class FramebufferFormat : u32 { | 59 | enum class PixelFormat : u32 { |
| 60 | RGBA8 = 0, | 60 | RGBA8 = 0, |
| 61 | RGB8 = 1, | 61 | RGB8 = 1, |
| 62 | RGB565 = 2, | 62 | RGB565 = 2, |
| @@ -84,9 +84,7 @@ struct Regs { | |||
| 84 | 84 | ||
| 85 | INSERT_PADDING_WORDS(0x10b); | 85 | INSERT_PADDING_WORDS(0x10b); |
| 86 | 86 | ||
| 87 | struct { | 87 | struct FramebufferConfig { |
| 88 | using Format = Regs::FramebufferFormat; | ||
| 89 | |||
| 90 | union { | 88 | union { |
| 91 | u32 size; | 89 | u32 size; |
| 92 | 90 | ||
| @@ -102,7 +100,7 @@ struct Regs { | |||
| 102 | union { | 100 | union { |
| 103 | u32 format; | 101 | u32 format; |
| 104 | 102 | ||
| 105 | BitField< 0, 3, Format> color_format; | 103 | BitField< 0, 3, PixelFormat> color_format; |
| 106 | }; | 104 | }; |
| 107 | 105 | ||
| 108 | INSERT_PADDING_WORDS(0x1); | 106 | INSERT_PADDING_WORDS(0x1); |
| @@ -130,8 +128,6 @@ struct Regs { | |||
| 130 | INSERT_PADDING_WORDS(0x169); | 128 | INSERT_PADDING_WORDS(0x169); |
| 131 | 129 | ||
| 132 | struct { | 130 | struct { |
| 133 | using Format = Regs::FramebufferFormat; | ||
| 134 | |||
| 135 | u32 input_address; | 131 | u32 input_address; |
| 136 | u32 output_address; | 132 | u32 output_address; |
| 137 | 133 | ||
| @@ -161,8 +157,8 @@ struct Regs { | |||
| 161 | u32 flags; | 157 | u32 flags; |
| 162 | 158 | ||
| 163 | BitField< 0, 1, u32> flip_data; // flips input data horizontally (TODO) if true | 159 | BitField< 0, 1, u32> flip_data; // flips input data horizontally (TODO) if true |
| 164 | BitField< 8, 3, Format> input_format; | 160 | BitField< 8, 3, PixelFormat> input_format; |
| 165 | BitField<12, 3, Format> output_format; | 161 | BitField<12, 3, PixelFormat> output_format; |
| 166 | BitField<16, 1, u32> output_tiled; // stores output in a tiled format | 162 | BitField<16, 1, u32> output_tiled; // stores output in a tiled format |
| 167 | }; | 163 | }; |
| 168 | 164 | ||