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-rw-r--r--src/core/CMakeLists.txt2
-rw-r--r--src/core/arm/dyncom/arm_dyncom.cpp1
-rw-r--r--src/core/arm/dyncom/arm_dyncom_dec.h45
-rw-r--r--src/core/arm/dyncom/arm_dyncom_run.h7
-rw-r--r--src/core/arm/dyncom/arm_dyncom_thumb.h6
-rw-r--r--src/core/arm/skyeye_common/arm_regformat.h11
-rw-r--r--src/core/arm/skyeye_common/armcpu.h78
-rw-r--r--src/core/arm/skyeye_common/armemu.h9
-rw-r--r--src/core/arm/skyeye_common/armmmu.h99
-rw-r--r--src/core/arm/skyeye_common/armos.h105
-rw-r--r--src/core/arm/skyeye_common/skyeye_types.h31
-rw-r--r--src/core/arm/skyeye_common/vfp/asm_vfp.h2
-rw-r--r--src/core/arm/skyeye_common/vfp/vfp.h5
-rw-r--r--src/core/arm/skyeye_common/vfp/vfp_helper.h5
14 files changed, 36 insertions, 370 deletions
diff --git a/src/core/CMakeLists.txt b/src/core/CMakeLists.txt
index 3e1578969..2168d9959 100644
--- a/src/core/CMakeLists.txt
+++ b/src/core/CMakeLists.txt
@@ -110,13 +110,11 @@ set(HEADERS
110 arm/dyncom/arm_dyncom_thumb.h 110 arm/dyncom/arm_dyncom_thumb.h
111 arm/interpreter/arm_interpreter.h 111 arm/interpreter/arm_interpreter.h
112 arm/skyeye_common/arm_regformat.h 112 arm/skyeye_common/arm_regformat.h
113 arm/skyeye_common/armcpu.h
114 arm/skyeye_common/armdefs.h 113 arm/skyeye_common/armdefs.h
115 arm/skyeye_common/armemu.h 114 arm/skyeye_common/armemu.h
116 arm/skyeye_common/armmmu.h 115 arm/skyeye_common/armmmu.h
117 arm/skyeye_common/armos.h 116 arm/skyeye_common/armos.h
118 arm/skyeye_common/skyeye_defs.h 117 arm/skyeye_common/skyeye_defs.h
119 arm/skyeye_common/skyeye_types.h
120 arm/skyeye_common/vfp/asm_vfp.h 118 arm/skyeye_common/vfp/asm_vfp.h
121 arm/skyeye_common/vfp/vfp.h 119 arm/skyeye_common/vfp/vfp.h
122 arm/skyeye_common/vfp/vfp_helper.h 120 arm/skyeye_common/vfp/vfp_helper.h
diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp
index 9c4cc90f2..01ffbcc87 100644
--- a/src/core/arm/dyncom/arm_dyncom.cpp
+++ b/src/core/arm/dyncom/arm_dyncom.cpp
@@ -2,7 +2,6 @@
2// Licensed under GPLv2 or any later version 2// Licensed under GPLv2 or any later version
3// Refer to the license.txt file included. 3// Refer to the license.txt file included.
4 4
5#include "core/arm/skyeye_common/armcpu.h"
6#include "core/arm/skyeye_common/armemu.h" 5#include "core/arm/skyeye_common/armemu.h"
7#include "core/arm/skyeye_common/vfp/vfp.h" 6#include "core/arm/skyeye_common/vfp/vfp.h"
8 7
diff --git a/src/core/arm/dyncom/arm_dyncom_dec.h b/src/core/arm/dyncom/arm_dyncom_dec.h
index 58784aeea..ee8ff5992 100644
--- a/src/core/arm/dyncom/arm_dyncom_dec.h
+++ b/src/core/arm/dyncom/arm_dyncom_dec.h
@@ -6,14 +6,6 @@
6 6
7#define BITS(a,b) ((instr >> (a)) & ((1 << (1+(b)-(a)))-1)) 7#define BITS(a,b) ((instr >> (a)) & ((1 << (1+(b)-(a)))-1))
8#define BIT(n) ((instr >> (n)) & 1) 8#define BIT(n) ((instr >> (n)) & 1)
9#define BAD do { printf("meet BAD at %s, instr is %x\n", __FUNCTION__, instr ); } while(0);
10#define ptr_N cpu->ptr_N
11#define ptr_Z cpu->ptr_Z
12#define ptr_C cpu->ptr_C
13#define ptr_V cpu->ptr_V
14#define ptr_I cpu->ptr_I
15#define ptr_T cpu->ptr_T
16#define ptr_CPSR cpu->ptr_gpr[16]
17 9
18// For MUL instructions 10// For MUL instructions
19#define RDHi ((instr >> 16) & 0xF) 11#define RDHi ((instr >> 16) & 0xF)
@@ -49,24 +41,6 @@
49#define SBIT BIT(20) 41#define SBIT BIT(20)
50#define DESTReg (BITS (12, 15)) 42#define DESTReg (BITS (12, 15))
51 43
52// They are in unused state, give a corrent value when using
53#define IS_V5E 0
54#define IS_V5 0
55#define IS_V6 0
56#define LHSReg 0
57
58// Temp define the using the pc reg need implement a flow
59#define STORE_CHECK_RD_PC ADD(R(RD), CONST(INSTR_SIZE * 2))
60
61#define OPERAND operand(cpu,instr,bb,NULL)
62#define SCO_OPERAND(sco) operand(cpu,instr,bb,sco)
63#define BOPERAND boperand(instr)
64
65#define CHECK_RN_PC (RN == 15 ? ADD(AND(R(RN), CONST(~0x1)), CONST(INSTR_SIZE * 2)) : R(RN))
66#define CHECK_RN_PC_WA (RN == 15 ? ADD(AND(R(RN), CONST(~0x3)), CONST(INSTR_SIZE * 2)) : R(RN))
67
68#define GET_USER_MODE() (OR(ICMP_EQ(R(MODE_REG), CONST(USER32MODE)), ICMP_EQ(R(MODE_REG), CONST(SYSTEM32MODE))))
69
70int decode_arm_instr(uint32_t instr, int32_t *idx); 44int decode_arm_instr(uint32_t instr, int32_t *idx);
71 45
72enum DECODE_STATUS { 46enum DECODE_STATUS {
@@ -83,23 +57,8 @@ struct instruction_set_encoding_item {
83 57
84typedef struct instruction_set_encoding_item ISEITEM; 58typedef struct instruction_set_encoding_item ISEITEM;
85 59
86#define RECORD_WB(value, flag) { cpu->dyncom_engine->wb_value = value;cpu->dyncom_engine->wb_flag = flag; } 60// ARM versions
87#define INIT_WB(wb_value, wb_flag) RECORD_WB(wb_value, wb_flag) 61enum {
88
89#define EXECUTE_WB(base_reg) { if(cpu->dyncom_engine->wb_flag) LET(base_reg, cpu->dyncom_engine->wb_value); }
90
91inline int get_reg_count(uint32_t instr) {
92 int i = BITS(0, 15);
93 int count = 0;
94 while (i) {
95 if (i & 1)
96 count++;
97 i = i >> 1;
98 }
99 return count;
100}
101
102enum ARMVER {
103 INVALID = 0, 62 INVALID = 0,
104 ARMALL, 63 ARMALL,
105 ARMV4, 64 ARMV4,
diff --git a/src/core/arm/dyncom/arm_dyncom_run.h b/src/core/arm/dyncom/arm_dyncom_run.h
index c70522274..b1c0daaf7 100644
--- a/src/core/arm/dyncom/arm_dyncom_run.h
+++ b/src/core/arm/dyncom/arm_dyncom_run.h
@@ -16,10 +16,7 @@
16* 16*
17*/ 17*/
18 18
19#ifndef __ARM_DYNCOM_RUN__ 19#pragma once
20#define __ARM_DYNCOM_RUN__
21
22#include "core/arm/skyeye_common/skyeye_types.h"
23 20
24void switch_mode(arm_core_t *core, uint32_t mode); 21void switch_mode(arm_core_t *core, uint32_t mode);
25 22
@@ -51,5 +48,3 @@ static inline addr_t CHECK_READ_REG15_WA(arm_core_t* core, int Rn) {
51static inline u32 CHECK_READ_REG15(arm_core_t* core, int Rn) { 48static inline u32 CHECK_READ_REG15(arm_core_t* core, int Rn) {
52 return (Rn == 15)? ((core->Reg[15] & ~0x1) + GET_INST_SIZE(core) * 2) : core->Reg[Rn]; 49 return (Rn == 15)? ((core->Reg[15] & ~0x1) + GET_INST_SIZE(core) * 2) : core->Reg[Rn];
53} 50}
54
55#endif
diff --git a/src/core/arm/dyncom/arm_dyncom_thumb.h b/src/core/arm/dyncom/arm_dyncom_thumb.h
index bf69b2fd4..a1785abb8 100644
--- a/src/core/arm/dyncom/arm_dyncom_thumb.h
+++ b/src/core/arm/dyncom/arm_dyncom_thumb.h
@@ -24,11 +24,9 @@
24* @date 2011-11-07 24* @date 2011-11-07
25*/ 25*/
26 26
27#ifndef __ARM_DYNCOM_THUMB_H__ 27#pragma once
28#define __ARM_DYNCOM_THUMB_H__
29 28
30#include "core/arm/skyeye_common/armdefs.h" 29#include "core/arm/skyeye_common/armdefs.h"
31#include "core/arm/skyeye_common/skyeye_types.h"
32 30
33enum tdstate { 31enum tdstate {
34 t_undefined, // Undefined Thumb instruction 32 t_undefined, // Undefined Thumb instruction
@@ -47,5 +45,3 @@ static inline u32 get_thumb_instr(u32 instr, addr_t pc) {
47 tinstr = instr & 0xFFFF; 45 tinstr = instr & 0xFFFF;
48 return tinstr; 46 return tinstr;
49} 47}
50
51#endif
diff --git a/src/core/arm/skyeye_common/arm_regformat.h b/src/core/arm/skyeye_common/arm_regformat.h
index 4dac1a8bf..997874764 100644
--- a/src/core/arm/skyeye_common/arm_regformat.h
+++ b/src/core/arm/skyeye_common/arm_regformat.h
@@ -1,7 +1,6 @@
1#ifndef __ARM_REGFORMAT_H__ 1#pragma once
2#define __ARM_REGFORMAT_H__
3 2
4enum arm_regno{ 3enum {
5 R0 = 0, 4 R0 = 0,
6 R1, 5 R1,
7 R2, 6 R2,
@@ -20,7 +19,7 @@ enum arm_regno{
20 R15, //PC, 19 R15, //PC,
21 CPSR_REG, 20 CPSR_REG,
22 SPSR_REG, 21 SPSR_REG,
23#if 1 22
24 PHYS_PC, 23 PHYS_PC,
25 R13_USR, 24 R13_USR,
26 R14_USR, 25 R14_USR,
@@ -95,11 +94,9 @@ enum arm_regno{
95 VFP_FPSID = VFP_BASE, 94 VFP_FPSID = VFP_BASE,
96 VFP_FPSCR, 95 VFP_FPSCR,
97 VFP_FPEXC, 96 VFP_FPEXC,
98#endif 97
99 MAX_REG_NUM, 98 MAX_REG_NUM,
100}; 99};
101 100
102#define CP15(idx) (idx - CP15_BASE) 101#define CP15(idx) (idx - CP15_BASE)
103#define VFP_OFFSET(x) (x - VFP_BASE) 102#define VFP_OFFSET(x) (x - VFP_BASE)
104
105#endif
diff --git a/src/core/arm/skyeye_common/armcpu.h b/src/core/arm/skyeye_common/armcpu.h
deleted file mode 100644
index 2b756c5bc..000000000
--- a/src/core/arm/skyeye_common/armcpu.h
+++ /dev/null
@@ -1,78 +0,0 @@
1/*
2 * arm
3 * armcpu.h
4 *
5 * Copyright (C) 2003, 2004 Sebastian Biallas (sb@biallas.net)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#ifndef __ARM_CPU_H__
22#define __ARM_CPU_H__
23
24#include <stddef.h>
25#include <stdio.h>
26
27#include "core/arm/skyeye_common/armdefs.h"
28
29typedef struct ARM_CPU_State_s {
30 ARMul_State * core;
31 uint32_t core_num;
32 /* The core id that boot from
33 */
34 uint32_t boot_core_id;
35}ARM_CPU_State;
36
37//static ARM_CPU_State* get_current_cpu(){
38// machine_config_t* mach = get_current_mach();
39// /* Casting a conf_obj_t to ARM_CPU_State type */
40// ARM_CPU_State* cpu = (ARM_CPU_State*)mach->cpu_data->obj;
41//
42// return cpu;
43//}
44
45/**
46* @brief Get the core instance boot from
47*
48* @return
49*/
50//static ARMul_State* get_boot_core(){
51// ARM_CPU_State* cpu = get_current_cpu();
52// return &cpu->core[cpu->boot_core_id];
53//}
54/**
55* @brief Get the instance of running core
56*
57* @return the core instance
58*/
59//static ARMul_State* get_current_core(){
60// /* Casting a conf_obj_t to ARM_CPU_State type */
61// int id = Common::CurrentThreadId();
62// /* If thread is not in running mode, we should give the boot core */
63// if(get_thread_state(id) != Running_state){
64// return get_boot_core();
65// }
66// /* Judge if we are running in paralell or sequenial */
67// if(thread_exist(id)){
68// conf_object_t* conf_obj = get_current_exec_priv(id);
69// return (ARMul_State*)get_cast_conf_obj(conf_obj, "arm_core_t");
70// }
71//
72// return NULL;
73//}
74
75#define CURRENT_CORE get_current_core()
76
77#endif
78
diff --git a/src/core/arm/skyeye_common/armemu.h b/src/core/arm/skyeye_common/armemu.h
index 686b2a3f6..7e10dad86 100644
--- a/src/core/arm/skyeye_common/armemu.h
+++ b/src/core/arm/skyeye_common/armemu.h
@@ -14,14 +14,10 @@
14 You should have received a copy of the GNU General Public License 14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software 15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 16 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
17#ifndef __ARMEMU_H__
18#define __ARMEMU_H__
19 17
18#pragma once
20 19
21#include "core/arm/skyeye_common/armdefs.h" 20#include "core/arm/skyeye_common/armdefs.h"
22//#include "skyeye.h"
23
24//extern ARMword isize;
25 21
26/* Shift Opcodes. */ 22/* Shift Opcodes. */
27#define LSL 0 23#define LSL 0
@@ -625,6 +621,3 @@ extern unsigned DSPCDP5 (ARMul_State *, unsigned, ARMword);
625extern unsigned DSPMCR6 (ARMul_State *, unsigned, ARMword, ARMword); 621extern unsigned DSPMCR6 (ARMul_State *, unsigned, ARMword, ARMword);
626extern unsigned DSPMRC6 (ARMul_State *, unsigned, ARMword, ARMword *); 622extern unsigned DSPMRC6 (ARMul_State *, unsigned, ARMword, ARMword *);
627extern unsigned DSPCDP6 (ARMul_State *, unsigned, ARMword); 623extern unsigned DSPCDP6 (ARMul_State *, unsigned, ARMword);
628
629
630#endif
diff --git a/src/core/arm/skyeye_common/armmmu.h b/src/core/arm/skyeye_common/armmmu.h
index 30858f9ba..6e54142ee 100644
--- a/src/core/arm/skyeye_common/armmmu.h
+++ b/src/core/arm/skyeye_common/armmmu.h
@@ -18,19 +18,10 @@
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19*/ 19*/
20 20
21#ifndef _ARMMMU_H_ 21#pragma once
22#define _ARMMMU_H_
23 22
24 23// Register numbers in the MMU
25#define WORD_SHT 2 24enum
26#define WORD_SIZE (1<<WORD_SHT)
27/* The MMU is accessible with MCR and MRC operations to copro 15: */
28
29#define MMU_COPRO (15)
30
31/* Register numbers in the MMU: */
32
33typedef enum mmu_regnum_t
34{ 25{
35 MMU_ID = 0, 26 MMU_ID = 0,
36 MMU_CONTROL = 1, 27 MMU_CONTROL = 1,
@@ -44,94 +35,22 @@ typedef enum mmu_regnum_t
44 MMU_TLB_LOCKDOWN = 10, 35 MMU_TLB_LOCKDOWN = 10,
45 MMU_PID = 13, 36 MMU_PID = 13,
46 37
47 /*MMU_V4 */ 38 // MMU_V4
48 MMU_V4_CACHE_OPS = 7, 39 MMU_V4_CACHE_OPS = 7,
49 MMU_V4_TLB_OPS = 8, 40 MMU_V4_TLB_OPS = 8,
50 41
51 /*MMU_V3 */ 42 // MMU_V3
52 MMU_V3_FLUSH_TLB = 5, 43 MMU_V3_FLUSH_TLB = 5,
53 MMU_V3_FLUSH_TLB_ENTRY = 6, 44 MMU_V3_FLUSH_TLB_ENTRY = 6,
54 MMU_V3_FLUSH_CACHE = 7, 45 MMU_V3_FLUSH_CACHE = 7,
55 46
56 /*MMU Intel SA-1100 */ 47 // MMU Intel SA-1100
57 MMU_SA_RB_OPS = 9, 48 MMU_SA_RB_OPS = 9,
58 MMU_SA_DEBUG = 14, 49 MMU_SA_DEBUG = 14,
59 MMU_SA_CP15_R15 = 15, 50 MMU_SA_CP15_R15 = 15,
60 //chy 2003-08-24 51
61 /*Intel xscale CP15 */ 52 // Intel xscale CP15
62 XSCALE_CP15_CACHE_TYPE = 0, 53 XSCALE_CP15_CACHE_TYPE = 0,
63 XSCALE_CP15_AUX_CONTROL = 1, 54 XSCALE_CP15_AUX_CONTROL = 1,
64 XSCALE_CP15_COPRO_ACCESS = 15, 55 XSCALE_CP15_COPRO_ACCESS = 15,
65 56};
66} mmu_regnum_t;
67
68/* Bits in the control register */
69
70#define CONTROL_MMU (1<<0)
71#define CONTROL_ALIGN_FAULT (1<<1)
72#define CONTROL_CACHE (1<<2)
73#define CONTROL_DATA_CACHE (1<<2)
74#define CONTROL_WRITE_BUFFER (1<<3)
75#define CONTROL_BIG_ENDIAN (1<<7)
76#define CONTROL_SYSTEM (1<<8)
77#define CONTROL_ROM (1<<9)
78#define CONTROL_UNDEFINED (1<<10)
79#define CONTROL_BRANCH_PREDICT (1<<11)
80#define CONTROL_INSTRUCTION_CACHE (1<<12)
81#define CONTROL_VECTOR (1<<13)
82#define CONTROL_RR (1<<14)
83#define CONTROL_L4 (1<<15)
84#define CONTROL_XP (1<<23)
85#define CONTROL_EE (1<<25)
86
87/*Macro defines for MMU state*/
88#define MMU_CTL (state->mmu.control)
89#define MMU_Enabled (state->mmu.control & CONTROL_MMU)
90#define MMU_Disabled (!(MMU_Enabled))
91#define MMU_Aligned (state->mmu.control & CONTROL_ALIGN_FAULT)
92
93#define MMU_ICacheEnabled (MMU_CTL & CONTROL_INSTRUCTION_CACHE)
94#define MMU_ICacheDisabled (!(MMU_ICacheDisabled))
95
96#define MMU_DCacheEnabled (MMU_CTL & CONTROL_DATA_CACHE)
97#define MMU_DCacheDisabled (!(MMU_DCacheEnabled))
98
99#define MMU_CacheEnabled (MMU_CTL & CONTROL_CACHE)
100#define MMU_CacheDisabled (!(MMU_CacheEnabled))
101
102#define MMU_WBEnabled (MMU_CTL & CONTROL_WRITE_BUFFER)
103#define MMU_WBDisabled (!(MMU_WBEnabled))
104
105/*virt_addr exchange according to CP15.R13(process id virtul mapping)*/
106#define PID_VA_MAP_MASK 0xfe000000
107//#define mmu_pid_va_map(va) ({\
108// ARMword ret; \
109// if ((va) & PID_VA_MAP_MASK)\
110// ret = (va); \
111// else \
112// ret = ((va) | (state->mmu.process_id & PID_VA_MAP_MASK));\
113// ret;\
114//})
115#define mmu_pid_va_map(va) ((va) & PID_VA_MAP_MASK) ? (va) : ((va) | (state->mmu.process_id & PID_VA_MAP_MASK))
116
117/* FS[3:0] in the fault status register: */
118
119typedef enum fault_t
120{
121 NO_FAULT = 0x0,
122 ALIGNMENT_FAULT = 0x1,
123
124 SECTION_TRANSLATION_FAULT = 0x5,
125 PAGE_TRANSLATION_FAULT = 0x7,
126 SECTION_DOMAIN_FAULT = 0x9,
127 PAGE_DOMAIN_FAULT = 0xB,
128 SECTION_PERMISSION_FAULT = 0xD,
129 SUBPAGE_PERMISSION_FAULT = 0xF,
130
131 /* defined by skyeye */
132 TLB_READ_MISS = 0x30,
133 TLB_WRITE_MISS = 0x40,
134
135} fault_t;
136
137#endif /* _ARMMMU_H_ */
diff --git a/src/core/arm/skyeye_common/armos.h b/src/core/arm/skyeye_common/armos.h
index ffdadcd1c..1217a728b 100644
--- a/src/core/arm/skyeye_common/armos.h
+++ b/src/core/arm/skyeye_common/armos.h
@@ -1,38 +1,24 @@
1/* armos.h -- ARMulator OS definitions: ARM6 Instruction Emulator. 1/* armos.h -- ARMulator OS definitions: ARM6 Instruction Emulator.
2 Copyright (C) 1994 Advanced RISC Machines Ltd. 2 Copyright (C) 1994 Advanced RISC Machines Ltd.
3 3
4 This program is free software; you can redistribute it and/or modify 4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by 5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or 6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version. 7 (at your option) any later version.
8 8
9 This program is distributed in the hope that it will be useful, 9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of 10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details. 12 GNU General Public License for more details.
13 13
14 You should have received a copy of the GNU General Public License 14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software 15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 16 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 17*/
18#include <stdint.h>
19 18
20#if FAST_MEMORY 19//
21/* in user mode, mmap_base will be on initial brk, 20// SWI Numbers
22 set at the first mmap request */ 21//
23#define mmap_base -1
24#else
25#define mmap_base 0x50000000
26#endif
27static long mmap_next_base = mmap_base;
28
29//static mmap_area_t* new_mmap_area(int sim_addr, int len);
30static char mmap_mem_write(short size, int addr, uint32_t value);
31static char mmap_mem_read(short size, int addr, uint32_t * value);
32
33/***************************************************************************\
34* SWI numbers *
35\***************************************************************************/
36 22
37#define SWI_Syscall 0x0 23#define SWI_Syscall 0x0
38#define SWI_Exit 0x1 24#define SWI_Exit 0x1
@@ -44,8 +30,8 @@ static char mmap_mem_read(short size, int addr, uint32_t * value);
44#define SWI_Rename 0x26 30#define SWI_Rename 0x26
45#define SWI_Break 0x11 31#define SWI_Break 0x11
46 32
47#define SWI_Times 0x2b 33#define SWI_Times 0x2b
48#define SWI_Brk 0x2d 34#define SWI_Brk 0x2d
49 35
50#define SWI_Mmap 0x5a 36#define SWI_Mmap 0x5a
51#define SWI_Munmap 0x5b 37#define SWI_Munmap 0x5b
@@ -56,76 +42,13 @@ static char mmap_mem_read(short size, int addr, uint32_t * value);
56#define SWI_GetEUID32 0xc9 42#define SWI_GetEUID32 0xc9
57#define SWI_GetEGID32 0xca 43#define SWI_GetEGID32 0xca
58 44
59#define SWI_ExitGroup 0xf8 45#define SWI_ExitGroup 0xf8
60
61#if 0
62#define SWI_Time 0xd
63#define SWI_Clock 0x61
64#define SWI_Time 0x63
65#define SWI_Remove 0x64
66#define SWI_Rename 0x65
67#define SWI_Flen 0x6c
68#endif
69 46
70#define SWI_Uname 0x7a 47#define SWI_Uname 0x7a
71#define SWI_Fcntl 0xdd 48#define SWI_Fcntl 0xdd
72#define SWI_Fstat64 0xc5 49#define SWI_Fstat64 0xc5
73#define SWI_Gettimeofday 0x4e 50#define SWI_Gettimeofday 0x4e
74#define SWI_Set_tls 0xf0005 51#define SWI_Set_tls 0xf0005
75 52
76#define SWI_Breakpoint 0x180000 /* see gdb's tm-arm.h */ 53#define SWI_Breakpoint 0x180000 /* see gdb's tm-arm.h */
77 54
78/***************************************************************************\
79* SWI structures *
80\***************************************************************************/
81
82/* Arm binaries (for now) only support 32 bit, and expect to receive
83 32-bit compliant structure in return of a systen call. Because
84 we use host system calls to emulate system calls, the returned
85 structure can be 32-bit compliant or 64-bit compliant, depending
86 on the OS running skyeye. Therefore, we need a fixed size structure
87 adapted to arm.*/
88
89/* Borrowed from qemu */
90struct target_stat64 {
91 unsigned short st_dev;
92 unsigned char __pad0[10];
93 uint32_t __st_ino;
94 unsigned int st_mode;
95 unsigned int st_nlink;
96 uint32_t st_uid;
97 uint32_t st_gid;
98 unsigned short st_rdev;
99 unsigned char __pad3[10];
100 unsigned char __pad31[4];
101 long long st_size;
102 uint32_t st_blksize;
103 unsigned char __pad32[4];
104 uint32_t st_blocks;
105 uint32_t __pad4;
106 uint32_t st32_atime;
107 uint32_t __pad5;
108 uint32_t st32_mtime;
109 uint32_t __pad6;
110 uint32_t st32_ctime;
111 uint32_t __pad7;
112 unsigned long long st_ino;
113};// __attribute__((packed));
114
115struct target_tms32 {
116 uint32_t tms_utime;
117 uint32_t tms_stime;
118 uint32_t tms_cutime;
119 uint32_t tms_cstime;
120};
121
122struct target_timeval32 {
123 uint32_t tv_sec; /* seconds */
124 uint32_t tv_usec; /* microseconds */
125};
126
127struct target_timezone32 {
128 int32_t tz_minuteswest; /* minutes west of Greenwich */
129 int32_t tz_dsttime; /* type of DST correction */
130};
131
diff --git a/src/core/arm/skyeye_common/skyeye_types.h b/src/core/arm/skyeye_common/skyeye_types.h
deleted file mode 100644
index fc7d8d922..000000000
--- a/src/core/arm/skyeye_common/skyeye_types.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 skyeye_types.h - some data types definition for skyeye debugger
3 Copyright (C) 2003 Skyeye Develop Group
4 for help please send mail to <skyeye-developer@lists.sf.linuxforum.net>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19
20*/
21/*
22 * 12/16/2006 Michael.Kang <blackfin.kang@gmail.com>
23 */
24
25#pragma once
26
27#include <cstdint>
28
29typedef uint32_t address_t;
30typedef uint32_t physical_address_t;
31typedef uint32_t generic_address_t;
diff --git a/src/core/arm/skyeye_common/vfp/asm_vfp.h b/src/core/arm/skyeye_common/vfp/asm_vfp.h
index f4ab34fd4..e113eaf29 100644
--- a/src/core/arm/skyeye_common/vfp/asm_vfp.h
+++ b/src/core/arm/skyeye_common/vfp/asm_vfp.h
@@ -5,6 +5,8 @@
5 * First, the standard VFP set. 5 * First, the standard VFP set.
6 */ 6 */
7 7
8#pragma once
9
8#define FPSID cr0 10#define FPSID cr0
9#define FPSCR cr1 11#define FPSCR cr1
10#define MVFR1 cr6 12#define MVFR1 cr6
diff --git a/src/core/arm/skyeye_common/vfp/vfp.h b/src/core/arm/skyeye_common/vfp/vfp.h
index 5ff213e08..09c7520db 100644
--- a/src/core/arm/skyeye_common/vfp/vfp.h
+++ b/src/core/arm/skyeye_common/vfp/vfp.h
@@ -18,8 +18,7 @@
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19*/ 19*/
20 20
21#ifndef __VFP_H__ 21#pragma once
22#define __VFP_H__
23 22
24#include "core/arm/skyeye_common/vfp/vfp_helper.h" /* for references to cdp SoftFloat functions */ 23#include "core/arm/skyeye_common/vfp/vfp_helper.h" /* for references to cdp SoftFloat functions */
25 24
@@ -109,5 +108,3 @@ int VLDR(ARMul_State * state, int type, ARMword instr, ARMword value);
109#ifdef __cplusplus 108#ifdef __cplusplus
110 } 109 }
111#endif 110#endif
112
113#endif
diff --git a/src/core/arm/skyeye_common/vfp/vfp_helper.h b/src/core/arm/skyeye_common/vfp/vfp_helper.h
index b1949603a..55e63f553 100644
--- a/src/core/arm/skyeye_common/vfp/vfp_helper.h
+++ b/src/core/arm/skyeye_common/vfp/vfp_helper.h
@@ -30,8 +30,7 @@
30 * published by the Free Software Foundation. 30 * published by the Free Software Foundation.
31 */ 31 */
32 32
33#ifndef __VFP_HELPER_H__ 33#pragma once
34#define __VFP_HELPER_H__
35 34
36/* Custom edit */ 35/* Custom edit */
37 36
@@ -536,5 +535,3 @@ u32 vfp_double_normaliseroundintern(ARMul_State* state, struct vfp_double *vd, u
536u32 vfp_double_multiply(struct vfp_double *vdd, struct vfp_double *vdn, struct vfp_double *vdm, u32 fpscr); 535u32 vfp_double_multiply(struct vfp_double *vdd, struct vfp_double *vdn, struct vfp_double *vdm, u32 fpscr);
537u32 vfp_double_add(struct vfp_double *vdd, struct vfp_double *vdn, struct vfp_double *vdm, u32 fpscr); 536u32 vfp_double_add(struct vfp_double *vdd, struct vfp_double *vdn, struct vfp_double *vdm, u32 fpscr);
538u32 vfp_double_fcvtsinterncutting(ARMul_State* state, int sd, struct vfp_double* dm, u32 fpscr); 537u32 vfp_double_fcvtsinterncutting(ARMul_State* state, int sd, struct vfp_double* dm, u32 fpscr);
539
540#endif