diff options
Diffstat (limited to 'src')
6 files changed, 52 insertions, 10 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.h b/src/shader_recompiler/backend/spirv/emit_spirv.h index 4f62af959..af6b8a68f 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv.h +++ b/src/shader_recompiler/backend/spirv/emit_spirv.h | |||
| @@ -287,6 +287,8 @@ Id EmitSMin32(EmitContext& ctx, Id a, Id b); | |||
| 287 | Id EmitUMin32(EmitContext& ctx, Id a, Id b); | 287 | Id EmitUMin32(EmitContext& ctx, Id a, Id b); |
| 288 | Id EmitSMax32(EmitContext& ctx, Id a, Id b); | 288 | Id EmitSMax32(EmitContext& ctx, Id a, Id b); |
| 289 | Id EmitUMax32(EmitContext& ctx, Id a, Id b); | 289 | Id EmitUMax32(EmitContext& ctx, Id a, Id b); |
| 290 | Id EmitSClamp32(EmitContext& ctx, Id value, Id min, Id max); | ||
| 291 | Id EmitUClamp32(EmitContext& ctx, Id value, Id min, Id max); | ||
| 290 | Id EmitSLessThan(EmitContext& ctx, Id lhs, Id rhs); | 292 | Id EmitSLessThan(EmitContext& ctx, Id lhs, Id rhs); |
| 291 | Id EmitULessThan(EmitContext& ctx, Id lhs, Id rhs); | 293 | Id EmitULessThan(EmitContext& ctx, Id lhs, Id rhs); |
| 292 | Id EmitIEqual(EmitContext& ctx, Id lhs, Id rhs); | 294 | Id EmitIEqual(EmitContext& ctx, Id lhs, Id rhs); |
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp index a9c5e9cca..37fc7c7a2 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp | |||
| @@ -163,6 +163,14 @@ Id EmitUMax32(EmitContext& ctx, Id a, Id b) { | |||
| 163 | return ctx.OpUMax(ctx.U32[1], a, b); | 163 | return ctx.OpUMax(ctx.U32[1], a, b); |
| 164 | } | 164 | } |
| 165 | 165 | ||
| 166 | Id EmitSClamp32(EmitContext& ctx, Id value, Id min, Id max) { | ||
| 167 | return ctx.OpSClamp(ctx.U32[1], value, min, max); | ||
| 168 | } | ||
| 169 | |||
| 170 | Id EmitUClamp32(EmitContext& ctx, Id value, Id min, Id max) { | ||
| 171 | return ctx.OpUClamp(ctx.U32[1], value, min, max); | ||
| 172 | } | ||
| 173 | |||
| 166 | Id EmitSLessThan(EmitContext& ctx, Id lhs, Id rhs) { | 174 | Id EmitSLessThan(EmitContext& ctx, Id lhs, Id rhs) { |
| 167 | return ctx.OpSLessThan(ctx.U1, lhs, rhs); | 175 | return ctx.OpSLessThan(ctx.U1, lhs, rhs); |
| 168 | } | 176 | } |
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp index d6a1d8ec2..9b898e4e1 100644 --- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp +++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp | |||
| @@ -1183,6 +1183,14 @@ U32 IREmitter::IMax(const U32& a, const U32& b, bool is_signed) { | |||
| 1183 | return is_signed ? SMax(a, b) : UMax(a, b); | 1183 | return is_signed ? SMax(a, b) : UMax(a, b); |
| 1184 | } | 1184 | } |
| 1185 | 1185 | ||
| 1186 | U32 IREmitter::SClamp(const U32& value, const U32& min, const U32& max) { | ||
| 1187 | return Inst<U32>(Opcode::SClamp32, value, min, max); | ||
| 1188 | } | ||
| 1189 | |||
| 1190 | U32 IREmitter::UClamp(const U32& value, const U32& min, const U32& max) { | ||
| 1191 | return Inst<U32>(Opcode::UClamp32, value, min, max); | ||
| 1192 | } | ||
| 1193 | |||
| 1186 | U1 IREmitter::ILessThan(const U32& lhs, const U32& rhs, bool is_signed) { | 1194 | U1 IREmitter::ILessThan(const U32& lhs, const U32& rhs, bool is_signed) { |
| 1187 | return Inst<U1>(is_signed ? Opcode::SLessThan : Opcode::ULessThan, lhs, rhs); | 1195 | return Inst<U1>(is_signed ? Opcode::SLessThan : Opcode::ULessThan, lhs, rhs); |
| 1188 | } | 1196 | } |
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.h b/src/shader_recompiler/frontend/ir/ir_emitter.h index 842c2bdaf..269f367a4 100644 --- a/src/shader_recompiler/frontend/ir/ir_emitter.h +++ b/src/shader_recompiler/frontend/ir/ir_emitter.h | |||
| @@ -206,6 +206,8 @@ public: | |||
| 206 | [[nodiscard]] U32 SMax(const U32& a, const U32& b); | 206 | [[nodiscard]] U32 SMax(const U32& a, const U32& b); |
| 207 | [[nodiscard]] U32 UMax(const U32& a, const U32& b); | 207 | [[nodiscard]] U32 UMax(const U32& a, const U32& b); |
| 208 | [[nodiscard]] U32 IMax(const U32& a, const U32& b, bool is_signed); | 208 | [[nodiscard]] U32 IMax(const U32& a, const U32& b, bool is_signed); |
| 209 | [[nodiscard]] U32 SClamp(const U32& value, const U32& min, const U32& max); | ||
| 210 | [[nodiscard]] U32 UClamp(const U32& value, const U32& min, const U32& max); | ||
| 209 | 211 | ||
| 210 | [[nodiscard]] U1 ILessThan(const U32& lhs, const U32& rhs, bool is_signed); | 212 | [[nodiscard]] U1 ILessThan(const U32& lhs, const U32& rhs, bool is_signed); |
| 211 | [[nodiscard]] U1 IEqual(const U32U64& lhs, const U32U64& rhs); | 213 | [[nodiscard]] U1 IEqual(const U32U64& lhs, const U32U64& rhs); |
diff --git a/src/shader_recompiler/frontend/ir/opcodes.inc b/src/shader_recompiler/frontend/ir/opcodes.inc index c75658328..9b050995b 100644 --- a/src/shader_recompiler/frontend/ir/opcodes.inc +++ b/src/shader_recompiler/frontend/ir/opcodes.inc | |||
| @@ -299,6 +299,8 @@ OPCODE(SMin32, U32, U32, | |||
| 299 | OPCODE(UMin32, U32, U32, U32, ) | 299 | OPCODE(UMin32, U32, U32, U32, ) |
| 300 | OPCODE(SMax32, U32, U32, U32, ) | 300 | OPCODE(SMax32, U32, U32, U32, ) |
| 301 | OPCODE(UMax32, U32, U32, U32, ) | 301 | OPCODE(UMax32, U32, U32, U32, ) |
| 302 | OPCODE(SClamp32, U32, U32, U32, U32, ) | ||
| 303 | OPCODE(UClamp32, U32, U32, U32, U32, ) | ||
| 302 | OPCODE(SLessThan, U1, U32, U32, ) | 304 | OPCODE(SLessThan, U1, U32, U32, ) |
| 303 | OPCODE(ULessThan, U1, U32, U32, ) | 305 | OPCODE(ULessThan, U1, U32, U32, ) |
| 304 | OPCODE(IEqual, U1, U32, U32, ) | 306 | OPCODE(IEqual, U1, U32, U32, ) |
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/integer_to_integer_conversion.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/integer_to_integer_conversion.cpp index e8f35552c..98b7f59f7 100644 --- a/src/shader_recompiler/frontend/maxwell/translate/impl/integer_to_integer_conversion.cpp +++ b/src/shader_recompiler/frontend/maxwell/translate/impl/integer_to_integer_conversion.cpp | |||
| @@ -30,16 +30,33 @@ enum class IntegerWidth : u64 { | |||
| 30 | [[nodiscard]] IR::U32 ConvertInteger(IR::IREmitter& ir, const IR::U32& src, | 30 | [[nodiscard]] IR::U32 ConvertInteger(IR::IREmitter& ir, const IR::U32& src, |
| 31 | IntegerWidth dst_width) { | 31 | IntegerWidth dst_width) { |
| 32 | const IR::U32 zero{ir.Imm32(0)}; | 32 | const IR::U32 zero{ir.Imm32(0)}; |
| 33 | const IR::U32 count{WidthSize(ir, dst_width)}; | ||
| 34 | return ir.BitFieldExtract(src, zero, count, false); | ||
| 35 | } | ||
| 36 | |||
| 37 | [[nodiscard]] IR::U32 SaturateInteger(IR::IREmitter& ir, const IR::U32& src, IntegerWidth dst_width, | ||
| 38 | bool dst_signed, bool src_signed) { | ||
| 39 | IR::U32 min{}; | ||
| 40 | IR::U32 max{}; | ||
| 41 | const IR::U32 zero{ir.Imm32(0)}; | ||
| 33 | switch (dst_width) { | 42 | switch (dst_width) { |
| 34 | case IntegerWidth::Byte: | 43 | case IntegerWidth::Byte: |
| 35 | return ir.BitFieldExtract(src, zero, ir.Imm32(8), false); | 44 | min = dst_signed && src_signed ? ir.Imm32(0xffffff80) : zero; |
| 45 | max = dst_signed ? ir.Imm32(0x7f) : ir.Imm32(0xff); | ||
| 46 | break; | ||
| 36 | case IntegerWidth::Short: | 47 | case IntegerWidth::Short: |
| 37 | return ir.BitFieldExtract(src, zero, ir.Imm32(16), false); | 48 | min = dst_signed && src_signed ? ir.Imm32(0xffff8000) : zero; |
| 49 | max = dst_signed ? ir.Imm32(0x7fff) : ir.Imm32(0xffff); | ||
| 50 | break; | ||
| 38 | case IntegerWidth::Word: | 51 | case IntegerWidth::Word: |
| 39 | return ir.BitFieldExtract(src, zero, ir.Imm32(32), false); | 52 | min = dst_signed && src_signed ? ir.Imm32(0x80000000) : zero; |
| 53 | max = dst_signed ? ir.Imm32(0x7fffffff) : ir.Imm32(0xffffffff); | ||
| 54 | break; | ||
| 40 | default: | 55 | default: |
| 41 | throw NotImplementedException("Invalid width {}", dst_width); | 56 | throw NotImplementedException("Invalid width {}", dst_width); |
| 42 | } | 57 | } |
| 58 | const IR::U32 value{!dst_signed && src_signed ? ir.SMax(zero, src) : src}; | ||
| 59 | return dst_signed && src_signed ? ir.SClamp(value, min, max) : ir.UClamp(value, min, max); | ||
| 43 | } | 60 | } |
| 44 | 61 | ||
| 45 | void I2I(TranslatorVisitor& v, u64 insn, const IR::U32& src_a) { | 62 | void I2I(TranslatorVisitor& v, u64 insn, const IR::U32& src_a) { |
| @@ -60,9 +77,6 @@ void I2I(TranslatorVisitor& v, u64 insn, const IR::U32& src_a) { | |||
| 60 | if (i2i.cc != 0) { | 77 | if (i2i.cc != 0) { |
| 61 | throw NotImplementedException("I2I CC"); | 78 | throw NotImplementedException("I2I CC"); |
| 62 | } | 79 | } |
| 63 | if (i2i.sat != 0) { | ||
| 64 | throw NotImplementedException("I2I SAT"); | ||
| 65 | } | ||
| 66 | if (i2i.src_fmt == IntegerWidth::Short && (i2i.selector == 1 || i2i.selector == 3)) { | 80 | if (i2i.src_fmt == IntegerWidth::Short && (i2i.selector == 1 || i2i.selector == 3)) { |
| 67 | throw NotImplementedException("16-bit source format incompatible with selector {}", | 81 | throw NotImplementedException("16-bit source format incompatible with selector {}", |
| 68 | i2i.selector); | 82 | i2i.selector); |
| @@ -75,15 +89,21 @@ void I2I(TranslatorVisitor& v, u64 insn, const IR::U32& src_a) { | |||
| 75 | const s32 selector{static_cast<s32>(i2i.selector)}; | 89 | const s32 selector{static_cast<s32>(i2i.selector)}; |
| 76 | const IR::U32 offset{v.ir.Imm32(selector * 8)}; | 90 | const IR::U32 offset{v.ir.Imm32(selector * 8)}; |
| 77 | const IR::U32 count{WidthSize(v.ir, i2i.src_fmt)}; | 91 | const IR::U32 count{WidthSize(v.ir, i2i.src_fmt)}; |
| 78 | IR::U32 src_values{v.ir.BitFieldExtract(src_a, offset, count, i2i.src_fmt_sign != 0)}; | 92 | const bool src_signed{i2i.src_fmt_sign != 0}; |
| 79 | if (i2i.abs) { | 93 | const bool dst_signed{i2i.dst_fmt_sign != 0}; |
| 94 | const bool sat{i2i.sat != 0}; | ||
| 95 | |||
| 96 | IR::U32 src_values{v.ir.BitFieldExtract(src_a, offset, count, src_signed)}; | ||
| 97 | if (i2i.abs != 0) { | ||
| 80 | src_values = v.ir.IAbs(src_values); | 98 | src_values = v.ir.IAbs(src_values); |
| 81 | } | 99 | } |
| 82 | if (i2i.neg) { | 100 | if (i2i.neg != 0) { |
| 83 | src_values = v.ir.INeg(src_values); | 101 | src_values = v.ir.INeg(src_values); |
| 84 | } | 102 | } |
| 103 | const IR::U32 result{ | ||
| 104 | sat ? SaturateInteger(v.ir, src_values, i2i.dst_fmt, dst_signed, src_signed) | ||
| 105 | : ConvertInteger(v.ir, src_values, i2i.dst_fmt)}; | ||
| 85 | 106 | ||
| 86 | const IR::U32 result{ConvertInteger(v.ir, src_values, i2i.dst_fmt)}; | ||
| 87 | v.X(i2i.dest_reg, result); | 107 | v.X(i2i.dest_reg, result); |
| 88 | } | 108 | } |
| 89 | } // Anonymous namespace | 109 | } // Anonymous namespace |