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-rw-r--r--src/core/hle/service/gsp.cpp17
1 files changed, 13 insertions, 4 deletions
diff --git a/src/core/hle/service/gsp.cpp b/src/core/hle/service/gsp.cpp
index 08e65612e..e2b0a48a7 100644
--- a/src/core/hle/service/gsp.cpp
+++ b/src/core/hle/service/gsp.cpp
@@ -32,7 +32,7 @@ static inline u8* GetCommandBuffer(u32 thread_id) {
32 if (0 == g_shared_memory) 32 if (0 == g_shared_memory)
33 return nullptr; 33 return nullptr;
34 34
35 return Kernel::GetSharedMemoryPointer(g_shared_memory, 35 return Kernel::GetSharedMemoryPointer(g_shared_memory,
36 0x800 + (thread_id * sizeof(CommandBuffer))); 36 0x800 + (thread_id * sizeof(CommandBuffer)));
37} 37}
38 38
@@ -205,8 +205,16 @@ void ExecuteCommand(const Command& command) {
205 break; 205 break;
206 } 206 }
207 207
208 // TODO: Check if texture copies are implemented correctly..
209 case CommandId::SET_DISPLAY_TRANSFER: 208 case CommandId::SET_DISPLAY_TRANSFER:
209 {
210 auto& params = command.image_copy;
211 WriteGPURegister(GPU_REG_INDEX(display_transfer_config.input_address), params.in_buffer_address >> 3);
212 WriteGPURegister(GPU_REG_INDEX(display_transfer_config.output_address), params.out_buffer_address >> 3);
213 WriteGPURegister(GPU_REG_INDEX(display_transfer_config.input_size), params.in_buffer_size);
214 WriteGPURegister(GPU_REG_INDEX(display_transfer_config.output_size), params.out_buffer_size);
215 WriteGPURegister(GPU_REG_INDEX(display_transfer_config.flags), params.flags);
216 WriteGPURegister(GPU_REG_INDEX(display_transfer_config.trigger), 1);
217
210 // TODO(bunnei): Signalling all of these interrupts here is totally wrong, but it seems to 218 // TODO(bunnei): Signalling all of these interrupts here is totally wrong, but it seems to
211 // work well enough for running demos. Need to figure out how these all work and trigger 219 // work well enough for running demos. Need to figure out how these all work and trigger
212 // them correctly. 220 // them correctly.
@@ -216,7 +224,9 @@ void ExecuteCommand(const Command& command) {
216 SignalInterrupt(InterruptId::P3D); 224 SignalInterrupt(InterruptId::P3D);
217 SignalInterrupt(InterruptId::DMA); 225 SignalInterrupt(InterruptId::DMA);
218 break; 226 break;
227 }
219 228
229 // TODO: Check if texture copies are implemented correctly..
220 case CommandId::SET_TEXTURE_COPY: 230 case CommandId::SET_TEXTURE_COPY:
221 { 231 {
222 auto& params = command.image_copy; 232 auto& params = command.image_copy;
@@ -226,8 +236,7 @@ void ExecuteCommand(const Command& command) {
226 WriteGPURegister(GPU_REG_INDEX(display_transfer_config.output_size), params.out_buffer_size); 236 WriteGPURegister(GPU_REG_INDEX(display_transfer_config.output_size), params.out_buffer_size);
227 WriteGPURegister(GPU_REG_INDEX(display_transfer_config.flags), params.flags); 237 WriteGPURegister(GPU_REG_INDEX(display_transfer_config.flags), params.flags);
228 238
229 // TODO: Should this only be ORed with 1 for texture copies? 239 // TODO: Should this register be set to 1 or should instead its value be OR-ed with 1?
230 // trigger transfer
231 WriteGPURegister(GPU_REG_INDEX(display_transfer_config.trigger), 1); 240 WriteGPURegister(GPU_REG_INDEX(display_transfer_config.trigger), 1);
232 break; 241 break;
233 } 242 }