diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic_32.cpp | 6 | ||||
| -rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic_64.cpp | 6 |
2 files changed, 6 insertions, 6 deletions
diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp index 1be5fe1c1..a780cf800 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp | |||
| @@ -52,7 +52,7 @@ public: | |||
| 52 | if (!memory.IsValidVirtualAddressRange(vaddr, sizeof(u32))) { | 52 | if (!memory.IsValidVirtualAddressRange(vaddr, sizeof(u32))) { |
| 53 | return std::nullopt; | 53 | return std::nullopt; |
| 54 | } | 54 | } |
| 55 | return MemoryRead32(vaddr); | 55 | return memory.Read32(vaddr); |
| 56 | } | 56 | } |
| 57 | 57 | ||
| 58 | void MemoryWrite8(u32 vaddr, u8 value) override { | 58 | void MemoryWrite8(u32 vaddr, u8 value) override { |
| @@ -97,7 +97,7 @@ public: | |||
| 97 | parent.LogBacktrace(); | 97 | parent.LogBacktrace(); |
| 98 | LOG_ERROR(Core_ARM, | 98 | LOG_ERROR(Core_ARM, |
| 99 | "Unimplemented instruction @ 0x{:X} for {} instructions (instr = {:08X})", pc, | 99 | "Unimplemented instruction @ 0x{:X} for {} instructions (instr = {:08X})", pc, |
| 100 | num_instructions, MemoryRead32(pc)); | 100 | num_instructions, memory.Read32(pc)); |
| 101 | } | 101 | } |
| 102 | 102 | ||
| 103 | void ExceptionRaised(u32 pc, Dynarmic::A32::Exception exception) override { | 103 | void ExceptionRaised(u32 pc, Dynarmic::A32::Exception exception) override { |
| @@ -115,7 +115,7 @@ public: | |||
| 115 | parent.LogBacktrace(); | 115 | parent.LogBacktrace(); |
| 116 | LOG_CRITICAL(Core_ARM, | 116 | LOG_CRITICAL(Core_ARM, |
| 117 | "ExceptionRaised(exception = {}, pc = {:08X}, code = {:08X}, thumb = {})", | 117 | "ExceptionRaised(exception = {}, pc = {:08X}, code = {:08X}, thumb = {})", |
| 118 | exception, pc, MemoryRead32(pc), parent.IsInThumbMode()); | 118 | exception, pc, memory.Read32(pc), parent.IsInThumbMode()); |
| 119 | } | 119 | } |
| 120 | } | 120 | } |
| 121 | 121 | ||
diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.cpp b/src/core/arm/dynarmic/arm_dynarmic_64.cpp index c437f24b8..1a75312a4 100644 --- a/src/core/arm/dynarmic/arm_dynarmic_64.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_64.cpp | |||
| @@ -56,7 +56,7 @@ public: | |||
| 56 | if (!memory.IsValidVirtualAddressRange(vaddr, sizeof(u32))) { | 56 | if (!memory.IsValidVirtualAddressRange(vaddr, sizeof(u32))) { |
| 57 | return std::nullopt; | 57 | return std::nullopt; |
| 58 | } | 58 | } |
| 59 | return MemoryRead32(vaddr); | 59 | return memory.Read32(vaddr); |
| 60 | } | 60 | } |
| 61 | 61 | ||
| 62 | void MemoryWrite8(u64 vaddr, u8 value) override { | 62 | void MemoryWrite8(u64 vaddr, u8 value) override { |
| @@ -111,7 +111,7 @@ public: | |||
| 111 | parent.LogBacktrace(); | 111 | parent.LogBacktrace(); |
| 112 | LOG_ERROR(Core_ARM, | 112 | LOG_ERROR(Core_ARM, |
| 113 | "Unimplemented instruction @ 0x{:X} for {} instructions (instr = {:08X})", pc, | 113 | "Unimplemented instruction @ 0x{:X} for {} instructions (instr = {:08X})", pc, |
| 114 | num_instructions, MemoryRead32(pc)); | 114 | num_instructions, memory.Read32(pc)); |
| 115 | } | 115 | } |
| 116 | 116 | ||
| 117 | void InstructionCacheOperationRaised(Dynarmic::A64::InstructionCacheOperation op, | 117 | void InstructionCacheOperationRaised(Dynarmic::A64::InstructionCacheOperation op, |
| @@ -156,7 +156,7 @@ public: | |||
| 156 | 156 | ||
| 157 | parent.LogBacktrace(); | 157 | parent.LogBacktrace(); |
| 158 | LOG_CRITICAL(Core_ARM, "ExceptionRaised(exception = {}, pc = {:08X}, code = {:08X})", | 158 | LOG_CRITICAL(Core_ARM, "ExceptionRaised(exception = {}, pc = {:08X}, code = {:08X})", |
| 159 | static_cast<std::size_t>(exception), pc, MemoryRead32(pc)); | 159 | static_cast<std::size_t>(exception), pc, memory.Read32(pc)); |
| 160 | } | 160 | } |
| 161 | } | 161 | } |
| 162 | 162 | ||