diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/core/arm/interpreter/armemu.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 73223874e..cb7c27030 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp | |||
| @@ -5724,7 +5724,7 @@ L_stm_s_takeabort: | |||
| 5724 | s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); | 5724 | s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); |
| 5725 | s16 b1 = (state->Reg[src2] & 0xFFFF); | 5725 | s16 b1 = (state->Reg[src2] & 0xFFFF); |
| 5726 | s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); | 5726 | s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); |
| 5727 | state->Reg[tar] = (a1 - a2)&0xFFFF | (((b1 - b2)&0xFFFF)<< 0x10); | 5727 | state->Reg[tar] = ((a1 - a2) & 0xFFFF) | (((b1 - b2)&0xFFFF)<< 0x10); |
| 5728 | return 1; | 5728 | return 1; |
| 5729 | } | 5729 | } |
| 5730 | else if ((instr & 0xFF0) == 0xf10)//sadd16 | 5730 | else if ((instr & 0xFF0) == 0xf10)//sadd16 |
| @@ -5736,7 +5736,7 @@ L_stm_s_takeabort: | |||
| 5736 | s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); | 5736 | s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); |
| 5737 | s16 b1 = (state->Reg[src2] & 0xFFFF); | 5737 | s16 b1 = (state->Reg[src2] & 0xFFFF); |
| 5738 | s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); | 5738 | s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); |
| 5739 | state->Reg[tar] = (a1 + a2)&0xFFFF | (((b1 + b2)&0xFFFF)<< 0x10); | 5739 | state->Reg[tar] = ((a1 + a2) & 0xFFFF) | (((b1 + b2)&0xFFFF)<< 0x10); |
| 5740 | return 1; | 5740 | return 1; |
| 5741 | } | 5741 | } |
| 5742 | else if ((instr & 0xFF0) == 0xf50)//ssax | 5742 | else if ((instr & 0xFF0) == 0xf50)//ssax |
| @@ -5748,7 +5748,7 @@ L_stm_s_takeabort: | |||
| 5748 | s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); | 5748 | s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); |
| 5749 | s16 b1 = (state->Reg[src2] & 0xFFFF); | 5749 | s16 b1 = (state->Reg[src2] & 0xFFFF); |
| 5750 | s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); | 5750 | s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); |
| 5751 | state->Reg[tar] = (a1 - b2) & 0xFFFF | (((a2 + b1) & 0xFFFF) << 0x10); | 5751 | state->Reg[tar] = ((a1 - b2) & 0xFFFF) | (((a2 + b1) & 0xFFFF) << 0x10); |
| 5752 | return 1; | 5752 | return 1; |
| 5753 | } | 5753 | } |
| 5754 | else if ((instr & 0xFF0) == 0xf30)//sasx | 5754 | else if ((instr & 0xFF0) == 0xf30)//sasx |
| @@ -5760,7 +5760,7 @@ L_stm_s_takeabort: | |||
| 5760 | s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); | 5760 | s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); |
| 5761 | s16 b1 = (state->Reg[src2] & 0xFFFF); | 5761 | s16 b1 = (state->Reg[src2] & 0xFFFF); |
| 5762 | s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); | 5762 | s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); |
| 5763 | state->Reg[tar] = (a2 - b1) & 0xFFFF | (((a2 + b1) & 0xFFFF) << 0x10); | 5763 | state->Reg[tar] = ((a2 - b1) & 0xFFFF) | (((a2 + b1) & 0xFFFF) << 0x10); |
| 5764 | return 1; | 5764 | return 1; |
| 5765 | } | 5765 | } |
| 5766 | else printf ("Unhandled v6 insn: sadd/ssub\n"); | 5766 | else printf ("Unhandled v6 insn: sadd/ssub\n"); |