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-rw-r--r--src/core/hle/service/nvdrv/devices/nvhost_nvdec.cpp5
-rw-r--r--src/core/hle/service/nvdrv/devices/nvhost_nvdec.h3
-rw-r--r--src/core/hle/service/nvdrv/devices/nvhost_nvdec_common.cpp31
-rw-r--r--src/core/hle/service/nvdrv/devices/nvhost_nvdec_common.h14
-rw-r--r--src/core/hle/service/nvdrv/devices/nvhost_vic.cpp5
-rw-r--r--src/core/hle/service/nvdrv/devices/nvhost_vic.h4
-rw-r--r--src/core/hle/service/nvdrv/nvdrv.cpp6
-rw-r--r--src/video_core/cdma_pusher.cpp15
-rw-r--r--src/video_core/cdma_pusher.h10
-rw-r--r--src/video_core/command_classes/host1x.cpp19
-rw-r--r--src/video_core/command_classes/host1x.h49
11 files changed, 67 insertions, 94 deletions
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_nvdec.cpp b/src/core/hle/service/nvdrv/devices/nvhost_nvdec.cpp
index d8735491c..36970f828 100644
--- a/src/core/hle/service/nvdrv/devices/nvhost_nvdec.cpp
+++ b/src/core/hle/service/nvdrv/devices/nvhost_nvdec.cpp
@@ -11,8 +11,9 @@
11 11
12namespace Service::Nvidia::Devices { 12namespace Service::Nvidia::Devices {
13 13
14nvhost_nvdec::nvhost_nvdec(Core::System& system, std::shared_ptr<nvmap> nvmap_dev) 14nvhost_nvdec::nvhost_nvdec(Core::System& system, std::shared_ptr<nvmap> nvmap_dev,
15 : nvhost_nvdec_common(system, std::move(nvmap_dev)) {} 15 SyncpointManager& syncpoint_manager)
16 : nvhost_nvdec_common(system, std::move(nvmap_dev), syncpoint_manager) {}
16nvhost_nvdec::~nvhost_nvdec() = default; 17nvhost_nvdec::~nvhost_nvdec() = default;
17 18
18NvResult nvhost_nvdec::Ioctl1(Ioctl command, const std::vector<u8>& input, 19NvResult nvhost_nvdec::Ioctl1(Ioctl command, const std::vector<u8>& input,
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_nvdec.h b/src/core/hle/service/nvdrv/devices/nvhost_nvdec.h
index 79b8b6de1..77ef53cdd 100644
--- a/src/core/hle/service/nvdrv/devices/nvhost_nvdec.h
+++ b/src/core/hle/service/nvdrv/devices/nvhost_nvdec.h
@@ -11,7 +11,8 @@ namespace Service::Nvidia::Devices {
11 11
12class nvhost_nvdec final : public nvhost_nvdec_common { 12class nvhost_nvdec final : public nvhost_nvdec_common {
13public: 13public:
14 explicit nvhost_nvdec(Core::System& system, std::shared_ptr<nvmap> nvmap_dev); 14 explicit nvhost_nvdec(Core::System& system, std::shared_ptr<nvmap> nvmap_dev,
15 SyncpointManager& syncpoint_manager);
15 ~nvhost_nvdec() override; 16 ~nvhost_nvdec() override;
16 17
17 NvResult Ioctl1(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output) override; 18 NvResult Ioctl1(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output) override;
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_nvdec_common.cpp b/src/core/hle/service/nvdrv/devices/nvhost_nvdec_common.cpp
index b49cecb42..4898dc27a 100644
--- a/src/core/hle/service/nvdrv/devices/nvhost_nvdec_common.cpp
+++ b/src/core/hle/service/nvdrv/devices/nvhost_nvdec_common.cpp
@@ -11,6 +11,7 @@
11#include "core/core.h" 11#include "core/core.h"
12#include "core/hle/service/nvdrv/devices/nvhost_nvdec_common.h" 12#include "core/hle/service/nvdrv/devices/nvhost_nvdec_common.h"
13#include "core/hle/service/nvdrv/devices/nvmap.h" 13#include "core/hle/service/nvdrv/devices/nvmap.h"
14#include "core/hle/service/nvdrv/syncpoint_manager.h"
14#include "core/memory.h" 15#include "core/memory.h"
15#include "video_core/memory_manager.h" 16#include "video_core/memory_manager.h"
16#include "video_core/renderer_base.h" 17#include "video_core/renderer_base.h"
@@ -36,8 +37,9 @@ std::size_t WriteVectors(std::vector<u8>& dst, const std::vector<T>& src, std::s
36} 37}
37} // Anonymous namespace 38} // Anonymous namespace
38 39
39nvhost_nvdec_common::nvhost_nvdec_common(Core::System& system, std::shared_ptr<nvmap> nvmap_dev) 40nvhost_nvdec_common::nvhost_nvdec_common(Core::System& system, std::shared_ptr<nvmap> nvmap_dev,
40 : nvdevice(system), nvmap_dev(std::move(nvmap_dev)) {} 41 SyncpointManager& syncpoint_manager)
42 : nvdevice(system), nvmap_dev(std::move(nvmap_dev)), syncpoint_manager(syncpoint_manager) {}
41nvhost_nvdec_common::~nvhost_nvdec_common() = default; 43nvhost_nvdec_common::~nvhost_nvdec_common() = default;
42 44
43NvResult nvhost_nvdec_common::SetNVMAPfd(const std::vector<u8>& input) { 45NvResult nvhost_nvdec_common::SetNVMAPfd(const std::vector<u8>& input) {
@@ -71,10 +73,15 @@ NvResult nvhost_nvdec_common::Submit(const std::vector<u8>& input, std::vector<u
71 offset = SpliceVectors(input, wait_checks, params.syncpoint_count, offset); 73 offset = SpliceVectors(input, wait_checks, params.syncpoint_count, offset);
72 offset = SpliceVectors(input, fences, params.fence_count, offset); 74 offset = SpliceVectors(input, fences, params.fence_count, offset);
73 75
74 // TODO(ameerj): For async gpu, utilize fences for syncpoint 'max' increment
75
76 auto& gpu = system.GPU(); 76 auto& gpu = system.GPU();
77 77 if (gpu.UseNvdec()) {
78 for (std::size_t i = 0; i < syncpt_increments.size(); i++) {
79 const SyncptIncr& syncpt_incr = syncpt_increments[i];
80 fences[i].id = syncpt_incr.id;
81 fences[i].value =
82 syncpoint_manager.IncreaseSyncpoint(syncpt_incr.id, syncpt_incr.increments);
83 }
84 }
78 for (const auto& cmd_buffer : command_buffers) { 85 for (const auto& cmd_buffer : command_buffers) {
79 auto object = nvmap_dev->GetObject(cmd_buffer.memory_id); 86 auto object = nvmap_dev->GetObject(cmd_buffer.memory_id);
80 ASSERT_OR_EXECUTE(object, return NvResult::InvalidState;); 87 ASSERT_OR_EXECUTE(object, return NvResult::InvalidState;);
@@ -89,7 +96,13 @@ NvResult nvhost_nvdec_common::Submit(const std::vector<u8>& input, std::vector<u
89 cmdlist.size() * sizeof(u32)); 96 cmdlist.size() * sizeof(u32));
90 gpu.PushCommandBuffer(cmdlist); 97 gpu.PushCommandBuffer(cmdlist);
91 } 98 }
99 if (gpu.UseNvdec()) {
92 100
101 fences[0].value = syncpoint_manager.IncreaseSyncpoint(fences[0].id, 1);
102
103 Tegra::ChCommandHeaderList cmdlist{{(4 << 28) | fences[0].id}};
104 gpu.PushCommandBuffer(cmdlist);
105 }
93 std::memcpy(output.data(), &params, sizeof(IoctlSubmit)); 106 std::memcpy(output.data(), &params, sizeof(IoctlSubmit));
94 // Some games expect command_buffers to be written back 107 // Some games expect command_buffers to be written back
95 offset = sizeof(IoctlSubmit); 108 offset = sizeof(IoctlSubmit);
@@ -98,6 +111,7 @@ NvResult nvhost_nvdec_common::Submit(const std::vector<u8>& input, std::vector<u
98 offset = WriteVectors(output, reloc_shifts, offset); 111 offset = WriteVectors(output, reloc_shifts, offset);
99 offset = WriteVectors(output, syncpt_increments, offset); 112 offset = WriteVectors(output, syncpt_increments, offset);
100 offset = WriteVectors(output, wait_checks, offset); 113 offset = WriteVectors(output, wait_checks, offset);
114 offset = WriteVectors(output, fences, offset);
101 115
102 return NvResult::Success; 116 return NvResult::Success;
103} 117}
@@ -107,9 +121,10 @@ NvResult nvhost_nvdec_common::GetSyncpoint(const std::vector<u8>& input, std::ve
107 std::memcpy(&params, input.data(), sizeof(IoctlGetSyncpoint)); 121 std::memcpy(&params, input.data(), sizeof(IoctlGetSyncpoint));
108 LOG_DEBUG(Service_NVDRV, "called GetSyncpoint, id={}", params.param); 122 LOG_DEBUG(Service_NVDRV, "called GetSyncpoint, id={}", params.param);
109 123
110 // We found that implementing this causes deadlocks with async gpu, along with degraded 124 if (device_syncpoints[params.param] == 0 && system.GPU().UseNvdec()) {
111 // performance. TODO: RE the nvdec async implementation 125 device_syncpoints[params.param] = syncpoint_manager.AllocateSyncpoint();
112 params.value = 0; 126 }
127 params.value = device_syncpoints[params.param];
113 std::memcpy(output.data(), &params, sizeof(IoctlGetSyncpoint)); 128 std::memcpy(output.data(), &params, sizeof(IoctlGetSyncpoint));
114 129
115 return NvResult::Success; 130 return NvResult::Success;
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_nvdec_common.h b/src/core/hle/service/nvdrv/devices/nvhost_nvdec_common.h
index d9f95ba58..4c9d4ba41 100644
--- a/src/core/hle/service/nvdrv/devices/nvhost_nvdec_common.h
+++ b/src/core/hle/service/nvdrv/devices/nvhost_nvdec_common.h
@@ -10,12 +10,16 @@
10#include "common/swap.h" 10#include "common/swap.h"
11#include "core/hle/service/nvdrv/devices/nvdevice.h" 11#include "core/hle/service/nvdrv/devices/nvdevice.h"
12 12
13namespace Service::Nvidia::Devices { 13namespace Service::Nvidia {
14class SyncpointManager;
15
16namespace Devices {
14class nvmap; 17class nvmap;
15 18
16class nvhost_nvdec_common : public nvdevice { 19class nvhost_nvdec_common : public nvdevice {
17public: 20public:
18 explicit nvhost_nvdec_common(Core::System& system, std::shared_ptr<nvmap> nvmap_dev); 21 explicit nvhost_nvdec_common(Core::System& system, std::shared_ptr<nvmap> nvmap_dev,
22 SyncpointManager& syncpoint_manager);
19 ~nvhost_nvdec_common() override; 23 ~nvhost_nvdec_common() override;
20 24
21protected: 25protected:
@@ -157,8 +161,10 @@ protected:
157 s32_le nvmap_fd{}; 161 s32_le nvmap_fd{};
158 u32_le submit_timeout{}; 162 u32_le submit_timeout{};
159 std::shared_ptr<nvmap> nvmap_dev; 163 std::shared_ptr<nvmap> nvmap_dev;
160 164 SyncpointManager& syncpoint_manager;
165 std::array<u32, MaxSyncPoints> device_syncpoints{};
161 // This is expected to be ordered, therefore we must use a map, not unordered_map 166 // This is expected to be ordered, therefore we must use a map, not unordered_map
162 std::map<GPUVAddr, BufferMap> buffer_mappings; 167 std::map<GPUVAddr, BufferMap> buffer_mappings;
163}; 168};
164}; // namespace Service::Nvidia::Devices 169}; // namespace Devices
170} // namespace Service::Nvidia
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_vic.cpp b/src/core/hle/service/nvdrv/devices/nvhost_vic.cpp
index 805fe86ae..72499654c 100644
--- a/src/core/hle/service/nvdrv/devices/nvhost_vic.cpp
+++ b/src/core/hle/service/nvdrv/devices/nvhost_vic.cpp
@@ -10,8 +10,9 @@
10#include "video_core/renderer_base.h" 10#include "video_core/renderer_base.h"
11 11
12namespace Service::Nvidia::Devices { 12namespace Service::Nvidia::Devices {
13nvhost_vic::nvhost_vic(Core::System& system, std::shared_ptr<nvmap> nvmap_dev) 13nvhost_vic::nvhost_vic(Core::System& system, std::shared_ptr<nvmap> nvmap_dev,
14 : nvhost_nvdec_common(system, std::move(nvmap_dev)) {} 14 SyncpointManager& syncpoint_manager)
15 : nvhost_nvdec_common(system, std::move(nvmap_dev), syncpoint_manager) {}
15 16
16nvhost_vic::~nvhost_vic() = default; 17nvhost_vic::~nvhost_vic() = default;
17 18
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_vic.h b/src/core/hle/service/nvdrv/devices/nvhost_vic.h
index b2e11f4d4..f401c61fa 100644
--- a/src/core/hle/service/nvdrv/devices/nvhost_vic.h
+++ b/src/core/hle/service/nvdrv/devices/nvhost_vic.h
@@ -7,11 +7,11 @@
7#include "core/hle/service/nvdrv/devices/nvhost_nvdec_common.h" 7#include "core/hle/service/nvdrv/devices/nvhost_nvdec_common.h"
8 8
9namespace Service::Nvidia::Devices { 9namespace Service::Nvidia::Devices {
10class nvmap;
11 10
12class nvhost_vic final : public nvhost_nvdec_common { 11class nvhost_vic final : public nvhost_nvdec_common {
13public: 12public:
14 explicit nvhost_vic(Core::System& system, std::shared_ptr<nvmap> nvmap_dev); 13 explicit nvhost_vic(Core::System& system, std::shared_ptr<nvmap> nvmap_dev,
14 SyncpointManager& syncpoint_manager);
15 ~nvhost_vic(); 15 ~nvhost_vic();
16 16
17 NvResult Ioctl1(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output) override; 17 NvResult Ioctl1(Ioctl command, const std::vector<u8>& input, std::vector<u8>& output) override;
diff --git a/src/core/hle/service/nvdrv/nvdrv.cpp b/src/core/hle/service/nvdrv/nvdrv.cpp
index e03195afe..620c18728 100644
--- a/src/core/hle/service/nvdrv/nvdrv.cpp
+++ b/src/core/hle/service/nvdrv/nvdrv.cpp
@@ -55,9 +55,11 @@ Module::Module(Core::System& system) : syncpoint_manager{system.GPU()} {
55 devices["/dev/nvdisp_disp0"] = std::make_shared<Devices::nvdisp_disp0>(system, nvmap_dev); 55 devices["/dev/nvdisp_disp0"] = std::make_shared<Devices::nvdisp_disp0>(system, nvmap_dev);
56 devices["/dev/nvhost-ctrl"] = 56 devices["/dev/nvhost-ctrl"] =
57 std::make_shared<Devices::nvhost_ctrl>(system, events_interface, syncpoint_manager); 57 std::make_shared<Devices::nvhost_ctrl>(system, events_interface, syncpoint_manager);
58 devices["/dev/nvhost-nvdec"] = std::make_shared<Devices::nvhost_nvdec>(system, nvmap_dev); 58 devices["/dev/nvhost-nvdec"] =
59 std::make_shared<Devices::nvhost_nvdec>(system, nvmap_dev, syncpoint_manager);
59 devices["/dev/nvhost-nvjpg"] = std::make_shared<Devices::nvhost_nvjpg>(system); 60 devices["/dev/nvhost-nvjpg"] = std::make_shared<Devices::nvhost_nvjpg>(system);
60 devices["/dev/nvhost-vic"] = std::make_shared<Devices::nvhost_vic>(system, nvmap_dev); 61 devices["/dev/nvhost-vic"] =
62 std::make_shared<Devices::nvhost_vic>(system, nvmap_dev, syncpoint_manager);
61} 63}
62 64
63Module::~Module() = default; 65Module::~Module() = default;
diff --git a/src/video_core/cdma_pusher.cpp b/src/video_core/cdma_pusher.cpp
index e3e7432f7..94679d5d1 100644
--- a/src/video_core/cdma_pusher.cpp
+++ b/src/video_core/cdma_pusher.cpp
@@ -33,8 +33,7 @@ CDmaPusher::CDmaPusher(GPU& gpu_)
33 : gpu{gpu_}, nvdec_processor(std::make_shared<Nvdec>(gpu)), 33 : gpu{gpu_}, nvdec_processor(std::make_shared<Nvdec>(gpu)),
34 vic_processor(std::make_unique<Vic>(gpu, nvdec_processor)), 34 vic_processor(std::make_unique<Vic>(gpu, nvdec_processor)),
35 host1x_processor(std::make_unique<Host1x>(gpu)), 35 host1x_processor(std::make_unique<Host1x>(gpu)),
36 nvdec_sync(std::make_unique<SyncptIncrManager>(gpu)), 36 sync_manager(std::make_unique<SyncptIncrManager>(gpu)) {}
37 vic_sync(std::make_unique<SyncptIncrManager>(gpu)) {}
38 37
39CDmaPusher::~CDmaPusher() = default; 38CDmaPusher::~CDmaPusher() = default;
40 39
@@ -110,10 +109,10 @@ void CDmaPusher::ExecuteCommand(u32 state_offset, u32 data) {
110 const auto syncpoint_id = static_cast<u32>(data & 0xFF); 109 const auto syncpoint_id = static_cast<u32>(data & 0xFF);
111 const auto cond = static_cast<u32>((data >> 8) & 0xFF); 110 const auto cond = static_cast<u32>((data >> 8) & 0xFF);
112 if (cond == 0) { 111 if (cond == 0) {
113 nvdec_sync->Increment(syncpoint_id); 112 sync_manager->Increment(syncpoint_id);
114 } else { 113 } else {
115 nvdec_sync->IncrementWhenDone(static_cast<u32>(current_class), syncpoint_id); 114 sync_manager->SignalDone(
116 nvdec_sync->SignalDone(syncpoint_id); 115 sync_manager->IncrementWhenDone(static_cast<u32>(current_class), syncpoint_id));
117 } 116 }
118 break; 117 break;
119 } 118 }
@@ -135,10 +134,10 @@ void CDmaPusher::ExecuteCommand(u32 state_offset, u32 data) {
135 const auto syncpoint_id = static_cast<u32>(data & 0xFF); 134 const auto syncpoint_id = static_cast<u32>(data & 0xFF);
136 const auto cond = static_cast<u32>((data >> 8) & 0xFF); 135 const auto cond = static_cast<u32>((data >> 8) & 0xFF);
137 if (cond == 0) { 136 if (cond == 0) {
138 vic_sync->Increment(syncpoint_id); 137 sync_manager->Increment(syncpoint_id);
139 } else { 138 } else {
140 vic_sync->IncrementWhenDone(static_cast<u32>(current_class), syncpoint_id); 139 sync_manager->SignalDone(
141 vic_sync->SignalDone(syncpoint_id); 140 sync_manager->IncrementWhenDone(static_cast<u32>(current_class), syncpoint_id));
142 } 141 }
143 break; 142 break;
144 } 143 }
diff --git a/src/video_core/cdma_pusher.h b/src/video_core/cdma_pusher.h
index 0db1cd646..8ca70b6dd 100644
--- a/src/video_core/cdma_pusher.h
+++ b/src/video_core/cdma_pusher.h
@@ -116,12 +116,10 @@ private:
116 void ThiStateWrite(ThiRegisters& state, u32 state_offset, const std::vector<u32>& arguments); 116 void ThiStateWrite(ThiRegisters& state, u32 state_offset, const std::vector<u32>& arguments);
117 117
118 GPU& gpu; 118 GPU& gpu;
119 119 std::shared_ptr<Tegra::Nvdec> nvdec_processor;
120 std::shared_ptr<Nvdec> nvdec_processor; 120 std::unique_ptr<Tegra::Vic> vic_processor;
121 std::unique_ptr<Vic> vic_processor; 121 std::unique_ptr<Tegra::Host1x> host1x_processor;
122 std::unique_ptr<Host1x> host1x_processor; 122 std::unique_ptr<SyncptIncrManager> sync_manager;
123 std::unique_ptr<SyncptIncrManager> nvdec_sync;
124 std::unique_ptr<SyncptIncrManager> vic_sync;
125 ChClassId current_class{}; 123 ChClassId current_class{};
126 ThiRegisters vic_thi_state{}; 124 ThiRegisters vic_thi_state{};
127 ThiRegisters nvdec_thi_state{}; 125 ThiRegisters nvdec_thi_state{};
diff --git a/src/video_core/command_classes/host1x.cpp b/src/video_core/command_classes/host1x.cpp
index c4dd4881a..b12494528 100644
--- a/src/video_core/command_classes/host1x.cpp
+++ b/src/video_core/command_classes/host1x.cpp
@@ -10,22 +10,14 @@ Tegra::Host1x::Host1x(GPU& gpu_) : gpu(gpu_) {}
10 10
11Tegra::Host1x::~Host1x() = default; 11Tegra::Host1x::~Host1x() = default;
12 12
13void Tegra::Host1x::StateWrite(u32 offset, u32 arguments) { 13void Tegra::Host1x::ProcessMethod(Method method, u32 argument) {
14 u8* const state_offset = reinterpret_cast<u8*>(&state) + offset * sizeof(u32);
15 std::memcpy(state_offset, &arguments, sizeof(u32));
16}
17
18void Tegra::Host1x::ProcessMethod(Method method, const std::vector<u32>& arguments) {
19 StateWrite(static_cast<u32>(method), arguments[0]);
20 switch (method) { 14 switch (method) {
21 case Method::WaitSyncpt:
22 Execute(arguments[0]);
23 break;
24 case Method::LoadSyncptPayload32: 15 case Method::LoadSyncptPayload32:
25 syncpoint_value = arguments[0]; 16 syncpoint_value = argument;
26 break; 17 break;
18 case Method::WaitSyncpt:
27 case Method::WaitSyncpt32: 19 case Method::WaitSyncpt32:
28 Execute(arguments[0]); 20 Execute(argument);
29 break; 21 break;
30 default: 22 default:
31 UNIMPLEMENTED_MSG("Host1x method 0x{:X}", static_cast<u32>(method)); 23 UNIMPLEMENTED_MSG("Host1x method 0x{:X}", static_cast<u32>(method));
@@ -34,6 +26,5 @@ void Tegra::Host1x::ProcessMethod(Method method, const std::vector<u32>& argumen
34} 26}
35 27
36void Tegra::Host1x::Execute(u32 data) { 28void Tegra::Host1x::Execute(u32 data) {
37 // This method waits on a valid syncpoint. 29 gpu.WaitFence(data, syncpoint_value);
38 // TODO: Implement when proper Async is in place
39} 30}
diff --git a/src/video_core/command_classes/host1x.h b/src/video_core/command_classes/host1x.h
index 013eaa0c1..7e94799dd 100644
--- a/src/video_core/command_classes/host1x.h
+++ b/src/video_core/command_classes/host1x.h
@@ -14,64 +14,23 @@ class Nvdec;
14 14
15class Host1x { 15class Host1x {
16public: 16public:
17 struct Host1xClassRegisters {
18 u32 incr_syncpt{};
19 u32 incr_syncpt_ctrl{};
20 u32 incr_syncpt_error{};
21 INSERT_PADDING_WORDS(5);
22 u32 wait_syncpt{};
23 u32 wait_syncpt_base{};
24 u32 wait_syncpt_incr{};
25 u32 load_syncpt_base{};
26 u32 incr_syncpt_base{};
27 u32 clear{};
28 u32 wait{};
29 u32 wait_with_interrupt{};
30 u32 delay_use{};
31 u32 tick_count_high{};
32 u32 tick_count_low{};
33 u32 tick_ctrl{};
34 INSERT_PADDING_WORDS(23);
35 u32 ind_ctrl{};
36 u32 ind_off2{};
37 u32 ind_off{};
38 std::array<u32, 31> ind_data{};
39 INSERT_PADDING_WORDS(1);
40 u32 load_syncpoint_payload32{};
41 u32 stall_ctrl{};
42 u32 wait_syncpt32{};
43 u32 wait_syncpt_base32{};
44 u32 load_syncpt_base32{};
45 u32 incr_syncpt_base32{};
46 u32 stall_count_high{};
47 u32 stall_count_low{};
48 u32 xref_ctrl{};
49 u32 channel_xref_high{};
50 u32 channel_xref_low{};
51 };
52 static_assert(sizeof(Host1xClassRegisters) == 0x164, "Host1xClassRegisters is an invalid size");
53
54 enum class Method : u32 { 17 enum class Method : u32 {
55 WaitSyncpt = offsetof(Host1xClassRegisters, wait_syncpt) / 4, 18 WaitSyncpt = 0x8,
56 LoadSyncptPayload32 = offsetof(Host1xClassRegisters, load_syncpoint_payload32) / 4, 19 LoadSyncptPayload32 = 0x4e,
57 WaitSyncpt32 = offsetof(Host1xClassRegisters, wait_syncpt32) / 4, 20 WaitSyncpt32 = 0x50,
58 }; 21 };
59 22
60 explicit Host1x(GPU& gpu); 23 explicit Host1x(GPU& gpu);
61 ~Host1x(); 24 ~Host1x();
62 25
63 /// Writes the method into the state, Invoke Execute() if encountered 26 /// Writes the method into the state, Invoke Execute() if encountered
64 void ProcessMethod(Method method, const std::vector<u32>& arguments); 27 void ProcessMethod(Method method, u32 argument);
65 28
66private: 29private:
67 /// For Host1x, execute is waiting on a syncpoint previously written into the state 30 /// For Host1x, execute is waiting on a syncpoint previously written into the state
68 void Execute(u32 data); 31 void Execute(u32 data);
69 32
70 /// Write argument into the provided offset
71 void StateWrite(u32 offset, u32 arguments);
72
73 u32 syncpoint_value{}; 33 u32 syncpoint_value{};
74 Host1xClassRegisters state{};
75 GPU& gpu; 34 GPU& gpu;
76}; 35};
77 36