diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/video_core/buffer_cache/buffer_cache.h | 33 | ||||
| -rw-r--r-- | src/video_core/renderer_opengl/gl_rasterizer.cpp | 12 | ||||
| -rw-r--r-- | src/video_core/renderer_opengl/gl_rasterizer.h | 2 | ||||
| -rw-r--r-- | src/video_core/renderer_vulkan/vk_rasterizer.cpp | 15 | ||||
| -rw-r--r-- | src/video_core/renderer_vulkan/vk_rasterizer.h | 2 |
5 files changed, 31 insertions, 33 deletions
diff --git a/src/video_core/buffer_cache/buffer_cache.h b/src/video_core/buffer_cache/buffer_cache.h index 2ba33543c..599551013 100644 --- a/src/video_core/buffer_cache/buffer_cache.h +++ b/src/video_core/buffer_cache/buffer_cache.h | |||
| @@ -992,7 +992,20 @@ void BufferCache<P>::BindHostIndexBuffer() { | |||
| 992 | TouchBuffer(buffer, index_buffer.buffer_id); | 992 | TouchBuffer(buffer, index_buffer.buffer_id); |
| 993 | const u32 offset = buffer.Offset(index_buffer.cpu_addr); | 993 | const u32 offset = buffer.Offset(index_buffer.cpu_addr); |
| 994 | const u32 size = index_buffer.size; | 994 | const u32 size = index_buffer.size; |
| 995 | SynchronizeBuffer(buffer, index_buffer.cpu_addr, size); | 995 | if (maxwell3d->inline_index_draw_indexes.size()) { |
| 996 | if constexpr (USE_MEMORY_MAPS) { | ||
| 997 | auto upload_staging = runtime.UploadStagingBuffer(size); | ||
| 998 | std::array<BufferCopy, 1> copies{ | ||
| 999 | {BufferCopy{.src_offset = upload_staging.offset, .dst_offset = 0, .size = size}}}; | ||
| 1000 | std::memcpy(upload_staging.mapped_span.data(), | ||
| 1001 | maxwell3d->inline_index_draw_indexes.data(), size); | ||
| 1002 | runtime.CopyBuffer(buffer, upload_staging.buffer, copies); | ||
| 1003 | } else { | ||
| 1004 | buffer.ImmediateUpload(0, maxwell3d->inline_index_draw_indexes); | ||
| 1005 | } | ||
| 1006 | } else { | ||
| 1007 | SynchronizeBuffer(buffer, index_buffer.cpu_addr, size); | ||
| 1008 | } | ||
| 996 | if constexpr (HAS_FULL_INDEX_AND_PRIMITIVE_SUPPORT) { | 1009 | if constexpr (HAS_FULL_INDEX_AND_PRIMITIVE_SUPPORT) { |
| 997 | const u32 new_offset = offset + maxwell3d->regs.index_buffer.first * | 1010 | const u32 new_offset = offset + maxwell3d->regs.index_buffer.first * |
| 998 | maxwell3d->regs.index_buffer.FormatSizeInBytes(); | 1011 | maxwell3d->regs.index_buffer.FormatSizeInBytes(); |
| @@ -1275,7 +1288,15 @@ void BufferCache<P>::UpdateIndexBuffer() { | |||
| 1275 | } | 1288 | } |
| 1276 | flags[Dirty::IndexBuffer] = false; | 1289 | flags[Dirty::IndexBuffer] = false; |
| 1277 | last_index_count = index_array.count; | 1290 | last_index_count = index_array.count; |
| 1278 | 1291 | if (maxwell3d->inline_index_draw_indexes.size()) { | |
| 1292 | auto inline_index_size = static_cast<u32>(maxwell3d->inline_index_draw_indexes.size()); | ||
| 1293 | index_buffer = Binding{ | ||
| 1294 | .cpu_addr = 0, | ||
| 1295 | .size = inline_index_size, | ||
| 1296 | .buffer_id = CreateBuffer(0, inline_index_size), | ||
| 1297 | }; | ||
| 1298 | return; | ||
| 1299 | } | ||
| 1279 | const GPUVAddr gpu_addr_begin = index_array.StartAddress(); | 1300 | const GPUVAddr gpu_addr_begin = index_array.StartAddress(); |
| 1280 | const GPUVAddr gpu_addr_end = index_array.EndAddress(); | 1301 | const GPUVAddr gpu_addr_end = index_array.EndAddress(); |
| 1281 | const std::optional<VAddr> cpu_addr = gpu_memory->GpuToCpuAddress(gpu_addr_begin); | 1302 | const std::optional<VAddr> cpu_addr = gpu_memory->GpuToCpuAddress(gpu_addr_begin); |
| @@ -1491,6 +1512,14 @@ typename BufferCache<P>::OverlapResult BufferCache<P>::ResolveOverlaps(VAddr cpu | |||
| 1491 | VAddr end = cpu_addr + wanted_size; | 1512 | VAddr end = cpu_addr + wanted_size; |
| 1492 | int stream_score = 0; | 1513 | int stream_score = 0; |
| 1493 | bool has_stream_leap = false; | 1514 | bool has_stream_leap = false; |
| 1515 | if (begin == 0) { | ||
| 1516 | return OverlapResult{ | ||
| 1517 | .ids = std::move(overlap_ids), | ||
| 1518 | .begin = begin, | ||
| 1519 | .end = end, | ||
| 1520 | .has_stream_leap = has_stream_leap, | ||
| 1521 | }; | ||
| 1522 | } | ||
| 1494 | for (; cpu_addr >> YUZU_PAGEBITS < Common::DivCeil(end, YUZU_PAGESIZE); | 1523 | for (; cpu_addr >> YUZU_PAGEBITS < Common::DivCeil(end, YUZU_PAGESIZE); |
| 1495 | cpu_addr += YUZU_PAGESIZE) { | 1524 | cpu_addr += YUZU_PAGESIZE) { |
| 1496 | const BufferId overlap_id = page_table[cpu_addr >> YUZU_PAGEBITS]; | 1525 | const BufferId overlap_id = page_table[cpu_addr >> YUZU_PAGEBITS]; |
diff --git a/src/video_core/renderer_opengl/gl_rasterizer.cpp b/src/video_core/renderer_opengl/gl_rasterizer.cpp index 115a5e010..354c6e429 100644 --- a/src/video_core/renderer_opengl/gl_rasterizer.cpp +++ b/src/video_core/renderer_opengl/gl_rasterizer.cpp | |||
| @@ -222,8 +222,6 @@ void RasterizerOpenGL::Draw(bool is_indexed, u32 instance_count) { | |||
| 222 | pipeline->SetEngine(maxwell3d, gpu_memory); | 222 | pipeline->SetEngine(maxwell3d, gpu_memory); |
| 223 | pipeline->Configure(is_indexed); | 223 | pipeline->Configure(is_indexed); |
| 224 | 224 | ||
| 225 | BindInlineIndexBuffer(); | ||
| 226 | |||
| 227 | SyncState(); | 225 | SyncState(); |
| 228 | 226 | ||
| 229 | const GLenum primitive_mode = MaxwellToGL::PrimitiveTopology(maxwell3d->regs.draw.topology); | 227 | const GLenum primitive_mode = MaxwellToGL::PrimitiveTopology(maxwell3d->regs.draw.topology); |
| @@ -1140,16 +1138,6 @@ void RasterizerOpenGL::ReleaseChannel(s32 channel_id) { | |||
| 1140 | query_cache.EraseChannel(channel_id); | 1138 | query_cache.EraseChannel(channel_id); |
| 1141 | } | 1139 | } |
| 1142 | 1140 | ||
| 1143 | void RasterizerOpenGL::BindInlineIndexBuffer() { | ||
| 1144 | if (maxwell3d->inline_index_draw_indexes.empty()) { | ||
| 1145 | return; | ||
| 1146 | } | ||
| 1147 | const auto data_count = static_cast<u32>(maxwell3d->inline_index_draw_indexes.size()); | ||
| 1148 | auto buffer = Buffer(buffer_cache_runtime, *this, 0, data_count); | ||
| 1149 | buffer.ImmediateUpload(0, maxwell3d->inline_index_draw_indexes); | ||
| 1150 | buffer_cache_runtime.BindIndexBuffer(buffer, 0, data_count); | ||
| 1151 | } | ||
| 1152 | |||
| 1153 | AccelerateDMA::AccelerateDMA(BufferCache& buffer_cache_) : buffer_cache{buffer_cache_} {} | 1141 | AccelerateDMA::AccelerateDMA(BufferCache& buffer_cache_) : buffer_cache{buffer_cache_} {} |
| 1154 | 1142 | ||
| 1155 | bool AccelerateDMA::BufferCopy(GPUVAddr src_address, GPUVAddr dest_address, u64 amount) { | 1143 | bool AccelerateDMA::BufferCopy(GPUVAddr src_address, GPUVAddr dest_address, u64 amount) { |
diff --git a/src/video_core/renderer_opengl/gl_rasterizer.h b/src/video_core/renderer_opengl/gl_rasterizer.h index 449a14f12..fc183c3ca 100644 --- a/src/video_core/renderer_opengl/gl_rasterizer.h +++ b/src/video_core/renderer_opengl/gl_rasterizer.h | |||
| @@ -199,8 +199,6 @@ private: | |||
| 199 | /// End a transform feedback | 199 | /// End a transform feedback |
| 200 | void EndTransformFeedback(); | 200 | void EndTransformFeedback(); |
| 201 | 201 | ||
| 202 | void BindInlineIndexBuffer(); | ||
| 203 | |||
| 204 | Tegra::GPU& gpu; | 202 | Tegra::GPU& gpu; |
| 205 | 203 | ||
| 206 | const Device& device; | 204 | const Device& device; |
diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.cpp b/src/video_core/renderer_vulkan/vk_rasterizer.cpp index 67b88621a..12b13cc59 100644 --- a/src/video_core/renderer_vulkan/vk_rasterizer.cpp +++ b/src/video_core/renderer_vulkan/vk_rasterizer.cpp | |||
| @@ -191,8 +191,6 @@ void RasterizerVulkan::Draw(bool is_indexed, u32 instance_count) { | |||
| 191 | pipeline->SetEngine(maxwell3d, gpu_memory); | 191 | pipeline->SetEngine(maxwell3d, gpu_memory); |
| 192 | pipeline->Configure(is_indexed); | 192 | pipeline->Configure(is_indexed); |
| 193 | 193 | ||
| 194 | BindInlineIndexBuffer(); | ||
| 195 | |||
| 196 | BeginTransformFeedback(); | 194 | BeginTransformFeedback(); |
| 197 | 195 | ||
| 198 | UpdateDynamicStates(); | 196 | UpdateDynamicStates(); |
| @@ -1029,17 +1027,4 @@ void RasterizerVulkan::ReleaseChannel(s32 channel_id) { | |||
| 1029 | query_cache.EraseChannel(channel_id); | 1027 | query_cache.EraseChannel(channel_id); |
| 1030 | } | 1028 | } |
| 1031 | 1029 | ||
| 1032 | void RasterizerVulkan::BindInlineIndexBuffer() { | ||
| 1033 | if (maxwell3d->inline_index_draw_indexes.empty()) { | ||
| 1034 | return; | ||
| 1035 | } | ||
| 1036 | const auto data_count = static_cast<u32>(maxwell3d->inline_index_draw_indexes.size()); | ||
| 1037 | auto buffer = buffer_cache_runtime.UploadStagingBuffer(data_count); | ||
| 1038 | std::memcpy(buffer.mapped_span.data(), maxwell3d->inline_index_draw_indexes.data(), data_count); | ||
| 1039 | buffer_cache_runtime.BindIndexBuffer( | ||
| 1040 | maxwell3d->regs.draw.topology, maxwell3d->regs.index_buffer.format, | ||
| 1041 | maxwell3d->regs.index_buffer.first, maxwell3d->regs.index_buffer.count, buffer.buffer, | ||
| 1042 | static_cast<u32>(buffer.offset), data_count); | ||
| 1043 | } | ||
| 1044 | |||
| 1045 | } // namespace Vulkan | 1030 | } // namespace Vulkan |
diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.h b/src/video_core/renderer_vulkan/vk_rasterizer.h index 70f36d58a..ee483cfd9 100644 --- a/src/video_core/renderer_vulkan/vk_rasterizer.h +++ b/src/video_core/renderer_vulkan/vk_rasterizer.h | |||
| @@ -141,8 +141,6 @@ private: | |||
| 141 | 141 | ||
| 142 | void UpdateVertexInput(Tegra::Engines::Maxwell3D::Regs& regs); | 142 | void UpdateVertexInput(Tegra::Engines::Maxwell3D::Regs& regs); |
| 143 | 143 | ||
| 144 | void BindInlineIndexBuffer(); | ||
| 145 | |||
| 146 | Tegra::GPU& gpu; | 144 | Tegra::GPU& gpu; |
| 147 | 145 | ||
| 148 | ScreenInfo& screen_info; | 146 | ScreenInfo& screen_info; |