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-rw-r--r--src/video_core/engines/shader_bytecode.h13
-rw-r--r--src/video_core/shader/decode/arithmetic_integer.cpp29
2 files changed, 42 insertions, 0 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h
index a6110bd86..28272ef6f 100644
--- a/src/video_core/engines/shader_bytecode.h
+++ b/src/video_core/engines/shader_bytecode.h
@@ -950,6 +950,11 @@ union Instruction {
950 } isetp; 950 } isetp;
951 951
952 union { 952 union {
953 BitField<48, 1, u64> is_signed;
954 BitField<49, 3, PredCondition> cond;
955 } icmp;
956
957 union {
953 BitField<0, 3, u64> pred0; 958 BitField<0, 3, u64> pred0;
954 BitField<3, 3, u64> pred3; 959 BitField<3, 3, u64> pred3;
955 BitField<12, 3, u64> pred12; 960 BitField<12, 3, u64> pred12;
@@ -1645,6 +1650,10 @@ public:
1645 SEL_C, 1650 SEL_C,
1646 SEL_R, 1651 SEL_R,
1647 SEL_IMM, 1652 SEL_IMM,
1653 ICMP_RC,
1654 ICMP_R,
1655 ICMP_CR,
1656 ICMP_IMM,
1648 MUFU, // Multi-Function Operator 1657 MUFU, // Multi-Function Operator
1649 RRO_C, // Range Reduction Operator 1658 RRO_C, // Range Reduction Operator
1650 RRO_R, 1659 RRO_R,
@@ -1910,6 +1919,10 @@ private:
1910 INST("0100110010100---", Id::SEL_C, Type::ArithmeticInteger, "SEL_C"), 1919 INST("0100110010100---", Id::SEL_C, Type::ArithmeticInteger, "SEL_C"),
1911 INST("0101110010100---", Id::SEL_R, Type::ArithmeticInteger, "SEL_R"), 1920 INST("0101110010100---", Id::SEL_R, Type::ArithmeticInteger, "SEL_R"),
1912 INST("0011100-10100---", Id::SEL_IMM, Type::ArithmeticInteger, "SEL_IMM"), 1921 INST("0011100-10100---", Id::SEL_IMM, Type::ArithmeticInteger, "SEL_IMM"),
1922 INST("010100110100----", Id::ICMP_RC, Type::ArithmeticInteger, "ICMP_RC"),
1923 INST("010110110100----", Id::ICMP_R, Type::ArithmeticInteger, "ICMP_R"),
1924 INST("010010110100----", Id::ICMP_CR, Type::ArithmeticInteger, "ICMP_CR"),
1925 INST("0011011-0100----", Id::ICMP_IMM, Type::ArithmeticInteger, "ICMP_IMM"),
1913 INST("0101101111011---", Id::LEA_R2, Type::ArithmeticInteger, "LEA_R2"), 1926 INST("0101101111011---", Id::LEA_R2, Type::ArithmeticInteger, "LEA_R2"),
1914 INST("0101101111010---", Id::LEA_R1, Type::ArithmeticInteger, "LEA_R1"), 1927 INST("0101101111010---", Id::LEA_R1, Type::ArithmeticInteger, "LEA_R1"),
1915 INST("001101101101----", Id::LEA_IMM, Type::ArithmeticInteger, "LEA_IMM"), 1928 INST("001101101101----", Id::LEA_IMM, Type::ArithmeticInteger, "LEA_IMM"),
diff --git a/src/video_core/shader/decode/arithmetic_integer.cpp b/src/video_core/shader/decode/arithmetic_integer.cpp
index c8c1a7f40..b73f6536e 100644
--- a/src/video_core/shader/decode/arithmetic_integer.cpp
+++ b/src/video_core/shader/decode/arithmetic_integer.cpp
@@ -138,6 +138,35 @@ u32 ShaderIR::DecodeArithmeticInteger(NodeBlock& bb, u32 pc) {
138 SetRegister(bb, instr.gpr0, value); 138 SetRegister(bb, instr.gpr0, value);
139 break; 139 break;
140 } 140 }
141 case OpCode::Id::ICMP_CR:
142 case OpCode::Id::ICMP_R:
143 case OpCode::Id::ICMP_RC:
144 case OpCode::Id::ICMP_IMM: {
145 const Node zero = Immediate(0);
146
147 const auto [op_b, test] = [&]() -> std::pair<Node, Node> {
148 switch (opcode->get().GetId()) {
149 case OpCode::Id::ICMP_CR:
150 return {GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset),
151 GetRegister(instr.gpr39)};
152 case OpCode::Id::ICMP_R:
153 return {GetRegister(instr.gpr20), GetRegister(instr.gpr39)};
154 case OpCode::Id::ICMP_RC:
155 return {GetRegister(instr.gpr39),
156 GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset)};
157 case OpCode::Id::ICMP_IMM:
158 return {Immediate(instr.alu.GetSignedImm20_20()), GetRegister(instr.gpr39)};
159 default:
160 UNREACHABLE();
161 return {zero, zero};
162 }
163 }();
164 const Node op_a = GetRegister(instr.gpr8);
165 const Node comparison =
166 GetPredicateComparisonInteger(instr.icmp.cond, instr.icmp.is_signed != 0, test, zero);
167 SetRegister(bb, instr.gpr0, Operation(OperationCode::Select, comparison, op_a, op_b));
168 break;
169 }
141 case OpCode::Id::LOP_C: 170 case OpCode::Id::LOP_C:
142 case OpCode::Id::LOP_R: 171 case OpCode::Id::LOP_R:
143 case OpCode::Id::LOP_IMM: { 172 case OpCode::Id::LOP_IMM: {