diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/video_core/renderer_opengl/gl_shader_decompiler.cpp | 27 |
1 files changed, 18 insertions, 9 deletions
diff --git a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp index b27543a65..618c603c2 100644 --- a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp +++ b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp | |||
| @@ -197,6 +197,11 @@ public: | |||
| 197 | return active_type == Type::Integer; | 197 | return active_type == Type::Integer; |
| 198 | } | 198 | } |
| 199 | 199 | ||
| 200 | /// Returns the current active type of the register | ||
| 201 | Type GetActiveType() const { | ||
| 202 | return active_type; | ||
| 203 | } | ||
| 204 | |||
| 200 | /// Returns the index of the register | 205 | /// Returns the index of the register |
| 201 | size_t GetIndex() const { | 206 | size_t GetIndex() const { |
| 202 | return index; | 207 | return index; |
| @@ -328,22 +333,28 @@ public: | |||
| 328 | shader.AddLine(dest + " = " + src + ';'); | 333 | shader.AddLine(dest + " = " + src + ';'); |
| 329 | } | 334 | } |
| 330 | 335 | ||
| 331 | /// Generates code representing a uniform (C buffer) register. | 336 | /// Generates code representing a uniform (C buffer) register, interpreted as the input type. |
| 332 | std::string GetUniform(const Uniform& uniform, const Register& dest_reg) { | 337 | std::string GetUniform(const Uniform& uniform, GLSLRegister::Type type) { |
| 333 | declr_const_buffers[uniform.index].MarkAsUsed(static_cast<unsigned>(uniform.index), | 338 | declr_const_buffers[uniform.index].MarkAsUsed(static_cast<unsigned>(uniform.index), |
| 334 | static_cast<unsigned>(uniform.offset), stage); | 339 | static_cast<unsigned>(uniform.offset), stage); |
| 335 | std::string value = | 340 | std::string value = |
| 336 | 'c' + std::to_string(uniform.index) + '[' + std::to_string(uniform.offset) + ']'; | 341 | 'c' + std::to_string(uniform.index) + '[' + std::to_string(uniform.offset) + ']'; |
| 337 | 342 | ||
| 338 | if (regs[dest_reg].IsFloat()) { | 343 | if (type == GLSLRegister::Type::Float) { |
| 339 | return value; | 344 | return value; |
| 340 | } else if (regs[dest_reg].IsInteger()) { | 345 | } else if (type == GLSLRegister::Type::Integer) { |
| 341 | return "floatBitsToInt(" + value + ')'; | 346 | return "floatBitsToInt(" + value + ')'; |
| 342 | } else { | 347 | } else { |
| 343 | UNREACHABLE(); | 348 | UNREACHABLE(); |
| 344 | } | 349 | } |
| 345 | } | 350 | } |
| 346 | 351 | ||
| 352 | /// Generates code representing a uniform (C buffer) register, interpreted as the type of the | ||
| 353 | /// destination register. | ||
| 354 | std::string GetUniform(const Uniform& uniform, const Register& dest_reg) { | ||
| 355 | return GetUniform(uniform, regs[dest_reg].GetActiveType()); | ||
| 356 | } | ||
| 357 | |||
| 347 | /// Add declarations for registers | 358 | /// Add declarations for registers |
| 348 | void GenerateDeclarations() { | 359 | void GenerateDeclarations() { |
| 349 | for (const auto& reg : regs) { | 360 | for (const auto& reg : regs) { |
| @@ -986,7 +997,7 @@ private: | |||
| 986 | if (instr.is_b_gpr) { | 997 | if (instr.is_b_gpr) { |
| 987 | op_b += regs.GetRegisterAsFloat(instr.gpr20); | 998 | op_b += regs.GetRegisterAsFloat(instr.gpr20); |
| 988 | } else { | 999 | } else { |
| 989 | op_b += regs.GetUniform(instr.uniform, instr.gpr0); | 1000 | op_b += regs.GetUniform(instr.uniform, GLSLRegister::Type::Float); |
| 990 | } | 1001 | } |
| 991 | } | 1002 | } |
| 992 | 1003 | ||
| @@ -1027,9 +1038,7 @@ private: | |||
| 1027 | if (instr.is_b_gpr) { | 1038 | if (instr.is_b_gpr) { |
| 1028 | op_b += regs.GetRegisterAsInteger(instr.gpr20, 0, instr.isetp.is_signed); | 1039 | op_b += regs.GetRegisterAsInteger(instr.gpr20, 0, instr.isetp.is_signed); |
| 1029 | } else { | 1040 | } else { |
| 1030 | // TODO(Subv): This family of instructions don't store to a GPR, but GetUniform | 1041 | op_b += regs.GetUniform(instr.uniform, GLSLRegister::Type::Integer); |
| 1031 | // needs to know the type of the output register. | ||
| 1032 | op_b += regs.GetUniform(instr.uniform, instr.gpr0); | ||
| 1033 | } | 1042 | } |
| 1034 | 1043 | ||
| 1035 | using Tegra::Shader::Pred; | 1044 | using Tegra::Shader::Pred; |
| @@ -1075,7 +1084,7 @@ private: | |||
| 1075 | if (instr.is_b_gpr) { | 1084 | if (instr.is_b_gpr) { |
| 1076 | op_b += regs.GetRegisterAsFloat(instr.gpr20); | 1085 | op_b += regs.GetRegisterAsFloat(instr.gpr20); |
| 1077 | } else { | 1086 | } else { |
| 1078 | op_b += regs.GetUniform(instr.uniform, instr.gpr0); | 1087 | op_b += regs.GetUniform(instr.uniform, GLSLRegister::Type::Float); |
| 1079 | } | 1088 | } |
| 1080 | } | 1089 | } |
| 1081 | 1090 | ||