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-rw-r--r--src/core/arm/interpreter/arminit.cpp8
-rw-r--r--src/core/core.cpp5
2 files changed, 5 insertions, 8 deletions
diff --git a/src/core/arm/interpreter/arminit.cpp b/src/core/arm/interpreter/arminit.cpp
index 7254a16f3..1d732fe84 100644
--- a/src/core/arm/interpreter/arminit.cpp
+++ b/src/core/arm/interpreter/arminit.cpp
@@ -139,16 +139,8 @@ void ARMul_Reset(ARMul_State* state)
139 state->Bank = SVCBANK; 139 state->Bank = SVCBANK;
140 FLUSHPIPE; 140 FLUSHPIPE;
141 141
142 // Reset CP15
143 ResetMPCoreCP15Registers(state); 142 ResetMPCoreCP15Registers(state);
144 143
145 // This is separate from the CP15 register reset function, as
146 // this isn't an ARM-defined reset value; it's set by the 3DS.
147 //
148 // TODO: Whenever TLS is implemented, this should contain
149 // the address of the 0x200-byte TLS
150 state->CP15[CP15_THREAD_URO] = Memory::KERNEL_MEMORY_VADDR;
151
152 state->EndCondition = 0; 144 state->EndCondition = 0;
153 state->ErrorCode = 0; 145 state->ErrorCode = 0;
154 146
diff --git a/src/core/core.cpp b/src/core/core.cpp
index 15787bc17..81e642318 100644
--- a/src/core/core.cpp
+++ b/src/core/core.cpp
@@ -7,6 +7,7 @@
7#include "core/core.h" 7#include "core/core.h"
8#include "core/core_timing.h" 8#include "core/core_timing.h"
9 9
10#include "core/mem_map.h"
10#include "core/settings.h" 11#include "core/settings.h"
11#include "core/arm/arm_interface.h" 12#include "core/arm/arm_interface.h"
12#include "core/arm/disassembler/arm_disasm.h" 13#include "core/arm/disassembler/arm_disasm.h"
@@ -59,6 +60,10 @@ int Init() {
59 g_sys_core = new ARM_DynCom(USER32MODE); 60 g_sys_core = new ARM_DynCom(USER32MODE);
60 g_app_core = new ARM_DynCom(USER32MODE); 61 g_app_core = new ARM_DynCom(USER32MODE);
61 62
63 // TODO: Whenever TLS is implemented, this should contain
64 // the address of the 0x200-byte TLS
65 g_app_core->SetCP15Register(CP15_THREAD_URO, Memory::KERNEL_MEMORY_VADDR);
66
62 LOG_DEBUG(Core, "Initialized OK"); 67 LOG_DEBUG(Core, "Initialized OK");
63 return 0; 68 return 0;
64} 69}