diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 0c20c2bc3..bb0cbb4dc 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp | |||
| @@ -3886,7 +3886,6 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 3886 | #endif | 3886 | #endif |
| 3887 | arm_inst* inst_base; | 3887 | arm_inst* inst_base; |
| 3888 | unsigned int addr; | 3888 | unsigned int addr; |
| 3889 | unsigned int phys_addr; | ||
| 3890 | unsigned int num_instrs = 0; | 3889 | unsigned int num_instrs = 0; |
| 3891 | 3890 | ||
| 3892 | int ptr; | 3891 | int ptr; |
| @@ -3905,8 +3904,6 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 3905 | else | 3904 | else |
| 3906 | cpu->Reg[15] &= 0xfffffffc; | 3905 | cpu->Reg[15] &= 0xfffffffc; |
| 3907 | 3906 | ||
| 3908 | phys_addr = cpu->Reg[15]; | ||
| 3909 | |||
| 3910 | // Find the cached instruction cream, otherwise translate it... | 3907 | // Find the cached instruction cream, otherwise translate it... |
| 3911 | auto itr = cpu->instruction_cache.find(cpu->Reg[15]); | 3908 | auto itr = cpu->instruction_cache.find(cpu->Reg[15]); |
| 3912 | if (itr != cpu->instruction_cache.end()) { | 3909 | if (itr != cpu->instruction_cache.end()) { |