summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/video_core/shader/node.h8
-rw-r--r--src/video_core/shader/shader_ir.cpp51
-rw-r--r--src/video_core/shader/shader_ir.h3
3 files changed, 59 insertions, 3 deletions
diff --git a/src/video_core/shader/node.h b/src/video_core/shader/node.h
index b54d33763..c9840b75e 100644
--- a/src/video_core/shader/node.h
+++ b/src/video_core/shader/node.h
@@ -465,6 +465,14 @@ public:
465 return operands.size(); 465 return operands.size();
466 } 466 }
467 467
468 NodeBlock& GetOperands() {
469 return operands;
470 }
471
472 const NodeBlock& GetOperands() const {
473 return operands;
474 }
475
468 [[nodiscard]] const Node& operator[](std::size_t operand_index) const { 476 [[nodiscard]] const Node& operator[](std::size_t operand_index) const {
469 return operands.at(operand_index); 477 return operands.at(operand_index);
470 } 478 }
diff --git a/src/video_core/shader/shader_ir.cpp b/src/video_core/shader/shader_ir.cpp
index a4987ffc6..caf5ff362 100644
--- a/src/video_core/shader/shader_ir.cpp
+++ b/src/video_core/shader/shader_ir.cpp
@@ -388,9 +388,54 @@ void ShaderIR::SetInternalFlagsFromInteger(NodeBlock& bb, Node value, bool sets_
388 if (!sets_cc) { 388 if (!sets_cc) {
389 return; 389 return;
390 } 390 }
391 Node zerop = Operation(OperationCode::LogicalIEqual, std::move(value), Immediate(0)); 391 switch (value->index()) {
392 SetInternalFlag(bb, InternalFlag::Zero, std::move(zerop)); 392 case 0: // Operation Node
393 LOG_WARNING(HW_GPU, "Condition codes implementation is incomplete"); 393 SearchOperands(bb, value);
394 break;
395 case 2: // Genral Purpose Node
396 if (const auto* gpr = std::get_if<GprNode>(value.get())) {
397 LOG_DEBUG(HW_GPU, "GprNode: index={}", gpr->GetIndex());
398 Node zerop = Operation(OperationCode::LogicalIEqual, std::move(value),
399 Immediate(gpr->GetIndex()));
400 SetInternalFlag(bb, InternalFlag::Zero, std::move(zerop));
401 }
402 break;
403
404 default:
405 Node zerop = Operation(OperationCode::LogicalIEqual, std::move(value), Immediate(0));
406 SetInternalFlag(bb, InternalFlag::Zero, std::move(zerop));
407 LOG_WARNING(HW_GPU, "Node Type: {}", value->index());
408 break;
409 }
410}
411
412void ShaderIR::SearchOperands(NodeBlock& nb, Node var) {
413 const auto* op = std::get_if<OperationNode>(var.get());
414 if (op == nullptr) {
415 return;
416 }
417
418 if (op->GetOperandsCount() == 0) {
419 return;
420 }
421
422 for (auto& operand : op->GetOperands()) {
423 switch (operand->index()) {
424 case 0: // Operation Node
425 return SearchOperands(nb, operand);
426 case 2: // General Purpose Node
427 if (const auto* gpr = std::get_if<GprNode>(operand.get())) {
428 LOG_DEBUG(HW_GPU, "Child GprNode: index={}", gpr->GetIndex());
429 Node zerop = Operation(OperationCode::LogicalIEqual, std::move(operand),
430 Immediate(gpr->GetIndex()));
431 SetInternalFlag(nb, InternalFlag::Zero, std::move(zerop));
432 }
433 break;
434 default:
435 LOG_WARNING(HW_GPU, "Child Node Type: {}", operand->index());
436 break;
437 }
438 }
394} 439}
395 440
396Node ShaderIR::BitfieldExtract(Node value, u32 offset, u32 bits) { 441Node ShaderIR::BitfieldExtract(Node value, u32 offset, u32 bits) {
diff --git a/src/video_core/shader/shader_ir.h b/src/video_core/shader/shader_ir.h
index 0c6ab0f07..0afa39531 100644
--- a/src/video_core/shader/shader_ir.h
+++ b/src/video_core/shader/shader_ir.h
@@ -346,6 +346,9 @@ private:
346 /// Access a bindless image sampler. 346 /// Access a bindless image sampler.
347 ImageEntry& GetBindlessImage(Tegra::Shader::Register reg, Tegra::Shader::ImageType type); 347 ImageEntry& GetBindlessImage(Tegra::Shader::Register reg, Tegra::Shader::ImageType type);
348 348
349 /// Recursive Iteration over the OperationNode operands, searching for GprNodes.
350 void SearchOperands(NodeBlock& nb, Node var);
351
349 /// Extracts a sequence of bits from a node 352 /// Extracts a sequence of bits from a node
350 Node BitfieldExtract(Node value, u32 offset, u32 bits); 353 Node BitfieldExtract(Node value, u32 offset, u32 bits);
351 354