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-rw-r--r--src/core/arm/dyncom/arm_dyncom_interpreter.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
index a6faf42b9..647784208 100644
--- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
+++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
@@ -4080,11 +4080,12 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
4080 if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) { 4080 if ((inst_base->cond == ConditionCode::AL) || CondPassed(cpu, inst_base->cond)) {
4081 unsigned int inst = inst_cream->inst; 4081 unsigned int inst = inst_cream->inst;
4082 if (BITS(inst, 20, 27) == 0x12 && BITS(inst, 4, 7) == 0x3) { 4082 if (BITS(inst, 20, 27) == 0x12 && BITS(inst, 4, 7) == 0x3) {
4083 const u32 jump_address = cpu->Reg[inst_cream->val.Rm];
4083 cpu->Reg[14] = (cpu->Reg[15] + cpu->GetInstructionSize()); 4084 cpu->Reg[14] = (cpu->Reg[15] + cpu->GetInstructionSize());
4084 if(cpu->TFlag) 4085 if(cpu->TFlag)
4085 cpu->Reg[14] |= 0x1; 4086 cpu->Reg[14] |= 0x1;
4086 cpu->Reg[15] = cpu->Reg[inst_cream->val.Rm] & 0xfffffffe; 4087 cpu->Reg[15] = jump_address & 0xfffffffe;
4087 cpu->TFlag = cpu->Reg[inst_cream->val.Rm] & 0x1; 4088 cpu->TFlag = jump_address & 0x1;
4088 } else { 4089 } else {
4089 cpu->Reg[14] = (cpu->Reg[15] + cpu->GetInstructionSize()); 4090 cpu->Reg[14] = (cpu->Reg[15] + cpu->GetInstructionSize());
4090 cpu->TFlag = 0x1; 4091 cpu->TFlag = 0x1;