diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 40 |
1 files changed, 33 insertions, 7 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index d022546ed..0c20c2bc3 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp | |||
| @@ -3924,9 +3924,13 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 3924 | if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { | 3924 | if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { |
| 3925 | adc_inst* const inst_cream = (adc_inst*)inst_base->component; | 3925 | adc_inst* const inst_cream = (adc_inst*)inst_base->component; |
| 3926 | 3926 | ||
| 3927 | u32 rn_val = RN; | ||
| 3928 | if (inst_cream->Rn == 15) | ||
| 3929 | rn_val += 2 * cpu->GetInstructionSize(); | ||
| 3930 | |||
| 3927 | bool carry; | 3931 | bool carry; |
| 3928 | bool overflow; | 3932 | bool overflow; |
| 3929 | RD = AddWithCarry(RN, SHIFTER_OPERAND, cpu->CFlag, &carry, &overflow); | 3933 | RD = AddWithCarry(rn_val, SHIFTER_OPERAND, cpu->CFlag, &carry, &overflow); |
| 3930 | 3934 | ||
| 3931 | if (inst_cream->S && (inst_cream->Rd == 15)) { | 3935 | if (inst_cream->S && (inst_cream->Rd == 15)) { |
| 3932 | if (CurrentModeHasSPSR) { | 3936 | if (CurrentModeHasSPSR) { |
| @@ -3987,11 +3991,17 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 3987 | } | 3991 | } |
| 3988 | AND_INST: | 3992 | AND_INST: |
| 3989 | { | 3993 | { |
| 3990 | and_inst *inst_cream = (and_inst *)inst_base->component; | 3994 | if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { |
| 3991 | if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) { | 3995 | and_inst* const inst_cream = (and_inst*)inst_base->component; |
| 3996 | |||
| 3992 | u32 lop = RN; | 3997 | u32 lop = RN; |
| 3993 | u32 rop = SHIFTER_OPERAND; | 3998 | u32 rop = SHIFTER_OPERAND; |
| 3999 | |||
| 4000 | if (inst_cream->Rn == 15) | ||
| 4001 | lop += 2 * cpu->GetInstructionSize(); | ||
| 4002 | |||
| 3994 | RD = lop & rop; | 4003 | RD = lop & rop; |
| 4004 | |||
| 3995 | if (inst_cream->S && (inst_cream->Rd == 15)) { | 4005 | if (inst_cream->S && (inst_cream->Rd == 15)) { |
| 3996 | if (CurrentModeHasSPSR) { | 4006 | if (CurrentModeHasSPSR) { |
| 3997 | cpu->Cpsr = cpu->Spsr_copy; | 4007 | cpu->Cpsr = cpu->Spsr_copy; |
| @@ -4164,9 +4174,13 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 4164 | if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { | 4174 | if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { |
| 4165 | cmn_inst* const inst_cream = (cmn_inst*)inst_base->component; | 4175 | cmn_inst* const inst_cream = (cmn_inst*)inst_base->component; |
| 4166 | 4176 | ||
| 4177 | u32 rn_val = RN; | ||
| 4178 | if (inst_cream->Rn == 15) | ||
| 4179 | rn_val += 2 * cpu->GetInstructionSize(); | ||
| 4180 | |||
| 4167 | bool carry; | 4181 | bool carry; |
| 4168 | bool overflow; | 4182 | bool overflow; |
| 4169 | u32 result = AddWithCarry(RN, SHIFTER_OPERAND, 0, &carry, &overflow); | 4183 | u32 result = AddWithCarry(rn_val, SHIFTER_OPERAND, 0, &carry, &overflow); |
| 4170 | 4184 | ||
| 4171 | UPDATE_NFLAG(result); | 4185 | UPDATE_NFLAG(result); |
| 4172 | UPDATE_ZFLAG(result); | 4186 | UPDATE_ZFLAG(result); |
| @@ -4905,6 +4919,10 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 4905 | 4919 | ||
| 4906 | u32 lop = RN; | 4920 | u32 lop = RN; |
| 4907 | u32 rop = SHIFTER_OPERAND; | 4921 | u32 rop = SHIFTER_OPERAND; |
| 4922 | |||
| 4923 | if (inst_cream->Rn == 15) | ||
| 4924 | lop += 2 * cpu->GetInstructionSize(); | ||
| 4925 | |||
| 4908 | RD = lop | rop; | 4926 | RD = lop | rop; |
| 4909 | 4927 | ||
| 4910 | if (inst_cream->S && (inst_cream->Rd == 15)) { | 4928 | if (inst_cream->S && (inst_cream->Rd == 15)) { |
| @@ -5195,9 +5213,13 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 5195 | if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { | 5213 | if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { |
| 5196 | rsc_inst* const inst_cream = (rsc_inst*)inst_base->component; | 5214 | rsc_inst* const inst_cream = (rsc_inst*)inst_base->component; |
| 5197 | 5215 | ||
| 5216 | u32 rn_val = RN; | ||
| 5217 | if (inst_cream->Rn == 15) | ||
| 5218 | rn_val += 2 * cpu->GetInstructionSize(); | ||
| 5219 | |||
| 5198 | bool carry; | 5220 | bool carry; |
| 5199 | bool overflow; | 5221 | bool overflow; |
| 5200 | RD = AddWithCarry(~RN, SHIFTER_OPERAND, cpu->CFlag, &carry, &overflow); | 5222 | RD = AddWithCarry(~rn_val, SHIFTER_OPERAND, cpu->CFlag, &carry, &overflow); |
| 5201 | 5223 | ||
| 5202 | if (inst_cream->S && (inst_cream->Rd == 15)) { | 5224 | if (inst_cream->S && (inst_cream->Rd == 15)) { |
| 5203 | if (CurrentModeHasSPSR) { | 5225 | if (CurrentModeHasSPSR) { |
| @@ -5335,9 +5357,13 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 5335 | if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { | 5357 | if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { |
| 5336 | sbc_inst* const inst_cream = (sbc_inst*)inst_base->component; | 5358 | sbc_inst* const inst_cream = (sbc_inst*)inst_base->component; |
| 5337 | 5359 | ||
| 5360 | u32 rn_val = RN; | ||
| 5361 | if (inst_cream->Rn == 15) | ||
| 5362 | rn_val += 2 * cpu->GetInstructionSize(); | ||
| 5363 | |||
| 5338 | bool carry; | 5364 | bool carry; |
| 5339 | bool overflow; | 5365 | bool overflow; |
| 5340 | RD = AddWithCarry(RN, ~SHIFTER_OPERAND, cpu->CFlag, &carry, &overflow); | 5366 | RD = AddWithCarry(rn_val, ~SHIFTER_OPERAND, cpu->CFlag, &carry, &overflow); |
| 5341 | 5367 | ||
| 5342 | if (inst_cream->S && (inst_cream->Rd == 15)) { | 5368 | if (inst_cream->S && (inst_cream->Rd == 15)) { |
| 5343 | if (CurrentModeHasSPSR) { | 5369 | if (CurrentModeHasSPSR) { |
| @@ -6171,7 +6197,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | |||
| 6171 | 6197 | ||
| 6172 | u32 rn_val = RN; | 6198 | u32 rn_val = RN; |
| 6173 | if (inst_cream->Rn == 15) | 6199 | if (inst_cream->Rn == 15) |
| 6174 | rn_val += 8; | 6200 | rn_val += 2 * cpu->GetInstructionSize(); |
| 6175 | 6201 | ||
| 6176 | bool carry; | 6202 | bool carry; |
| 6177 | bool overflow; | 6203 | bool overflow; |