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-rw-r--r--src/core/arm/dyncom/arm_dyncom_interpreter.cpp680
-rw-r--r--src/core/arm/skyeye_common/vfp/vfpinstr.cpp224
2 files changed, 372 insertions, 532 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
index 890f8a86b..e4b5486e0 100644
--- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
+++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
@@ -284,7 +284,7 @@ static unsigned int DPO(RotateRightByRegister)(ARMul_State* cpu, unsigned int sh
284 return shifter_operand; 284 return shifter_operand;
285} 285}
286 286
287typedef void (*get_addr_fp_t)(ARMul_State *cpu, unsigned int inst, unsigned int &virt_addr, unsigned int rw); 287typedef void (*get_addr_fp_t)(ARMul_State *cpu, unsigned int inst, unsigned int &virt_addr);
288 288
289struct ldst_inst { 289struct ldst_inst {
290 unsigned int inst; 290 unsigned int inst;
@@ -302,7 +302,7 @@ struct ldst_inst {
302#define P_BIT BIT(inst, 24) 302#define P_BIT BIT(inst, 24)
303#define OFFSET_12 BITS(inst, 0, 11) 303#define OFFSET_12 BITS(inst, 0, 11)
304 304
305static void LnSWoUB(ImmediateOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { 305static void LnSWoUB(ImmediateOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
306 unsigned int Rn = BITS(inst, 16, 19); 306 unsigned int Rn = BITS(inst, 16, 19);
307 unsigned int addr; 307 unsigned int addr;
308 308
@@ -314,7 +314,7 @@ static void LnSWoUB(ImmediateOffset)(ARMul_State* cpu, unsigned int inst, unsign
314 virt_addr = addr; 314 virt_addr = addr;
315} 315}
316 316
317static void LnSWoUB(RegisterOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { 317static void LnSWoUB(RegisterOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
318 unsigned int Rn = BITS(inst, 16, 19); 318 unsigned int Rn = BITS(inst, 16, 19);
319 unsigned int Rm = BITS(inst, 0, 3); 319 unsigned int Rm = BITS(inst, 0, 3);
320 unsigned int rn = CHECK_READ_REG15_WA(cpu, Rn); 320 unsigned int rn = CHECK_READ_REG15_WA(cpu, Rn);
@@ -329,7 +329,7 @@ static void LnSWoUB(RegisterOffset)(ARMul_State* cpu, unsigned int inst, unsigne
329 virt_addr = addr; 329 virt_addr = addr;
330} 330}
331 331
332static void LnSWoUB(ImmediatePostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { 332static void LnSWoUB(ImmediatePostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
333 unsigned int Rn = BITS(inst, 16, 19); 333 unsigned int Rn = BITS(inst, 16, 19);
334 unsigned int addr = CHECK_READ_REG15_WA(cpu, Rn); 334 unsigned int addr = CHECK_READ_REG15_WA(cpu, Rn);
335 335
@@ -341,7 +341,7 @@ static void LnSWoUB(ImmediatePostIndexed)(ARMul_State* cpu, unsigned int inst, u
341 virt_addr = addr; 341 virt_addr = addr;
342} 342}
343 343
344static void LnSWoUB(ImmediatePreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { 344static void LnSWoUB(ImmediatePreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
345 unsigned int Rn = BITS(inst, 16, 19); 345 unsigned int Rn = BITS(inst, 16, 19);
346 unsigned int addr; 346 unsigned int addr;
347 347
@@ -356,7 +356,7 @@ static void LnSWoUB(ImmediatePreIndexed)(ARMul_State* cpu, unsigned int inst, un
356 cpu->Reg[Rn] = addr; 356 cpu->Reg[Rn] = addr;
357} 357}
358 358
359static void MLnS(RegisterPreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { 359static void MLnS(RegisterPreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
360 unsigned int addr; 360 unsigned int addr;
361 unsigned int Rn = BITS(inst, 16, 19); 361 unsigned int Rn = BITS(inst, 16, 19);
362 unsigned int Rm = BITS(inst, 0, 3); 362 unsigned int Rm = BITS(inst, 0, 3);
@@ -374,7 +374,7 @@ static void MLnS(RegisterPreIndexed)(ARMul_State* cpu, unsigned int inst, unsign
374 cpu->Reg[Rn] = addr; 374 cpu->Reg[Rn] = addr;
375} 375}
376 376
377static void LnSWoUB(RegisterPreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { 377static void LnSWoUB(RegisterPreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
378 unsigned int Rn = BITS(inst, 16, 19); 378 unsigned int Rn = BITS(inst, 16, 19);
379 unsigned int Rm = BITS(inst, 0, 3); 379 unsigned int Rm = BITS(inst, 0, 3);
380 unsigned int rn = CHECK_READ_REG15_WA(cpu, Rn); 380 unsigned int rn = CHECK_READ_REG15_WA(cpu, Rn);
@@ -393,7 +393,7 @@ static void LnSWoUB(RegisterPreIndexed)(ARMul_State* cpu, unsigned int inst, uns
393 } 393 }
394} 394}
395 395
396static void LnSWoUB(ScaledRegisterPreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { 396static void LnSWoUB(ScaledRegisterPreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
397 unsigned int shift = BITS(inst, 5, 6); 397 unsigned int shift = BITS(inst, 5, 6);
398 unsigned int shift_imm = BITS(inst, 7, 11); 398 unsigned int shift_imm = BITS(inst, 7, 11);
399 unsigned int Rn = BITS(inst, 16, 19); 399 unsigned int Rn = BITS(inst, 16, 19);
@@ -444,7 +444,7 @@ static void LnSWoUB(ScaledRegisterPreIndexed)(ARMul_State* cpu, unsigned int ins
444 cpu->Reg[Rn] = addr; 444 cpu->Reg[Rn] = addr;
445} 445}
446 446
447static void LnSWoUB(ScaledRegisterPostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { 447static void LnSWoUB(ScaledRegisterPostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
448 unsigned int shift = BITS(inst, 5, 6); 448 unsigned int shift = BITS(inst, 5, 6);
449 unsigned int shift_imm = BITS(inst, 7, 11); 449 unsigned int shift_imm = BITS(inst, 7, 11);
450 unsigned int Rn = BITS(inst, 16, 19); 450 unsigned int Rn = BITS(inst, 16, 19);
@@ -493,7 +493,7 @@ static void LnSWoUB(ScaledRegisterPostIndexed)(ARMul_State* cpu, unsigned int in
493 } 493 }
494} 494}
495 495
496static void LnSWoUB(RegisterPostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { 496static void LnSWoUB(RegisterPostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
497 unsigned int Rn = BITS(inst, 16, 19); 497 unsigned int Rn = BITS(inst, 16, 19);
498 unsigned int Rm = BITS(inst, 0, 3); 498 unsigned int Rm = BITS(inst, 0, 3);
499 unsigned int rm = CHECK_READ_REG15_WA(cpu, Rm); 499 unsigned int rm = CHECK_READ_REG15_WA(cpu, Rm);
@@ -509,7 +509,7 @@ static void LnSWoUB(RegisterPostIndexed)(ARMul_State* cpu, unsigned int inst, un
509 } 509 }
510} 510}
511 511
512static void MLnS(ImmediateOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { 512static void MLnS(ImmediateOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
513 unsigned int immedL = BITS(inst, 0, 3); 513 unsigned int immedL = BITS(inst, 0, 3);
514 unsigned int immedH = BITS(inst, 8, 11); 514 unsigned int immedH = BITS(inst, 8, 11);
515 unsigned int Rn = BITS(inst, 16, 19); 515 unsigned int Rn = BITS(inst, 16, 19);
@@ -525,7 +525,7 @@ static void MLnS(ImmediateOffset)(ARMul_State* cpu, unsigned int inst, unsigned
525 virt_addr = addr; 525 virt_addr = addr;
526} 526}
527 527
528static void MLnS(RegisterOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { 528static void MLnS(RegisterOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
529 unsigned int addr; 529 unsigned int addr;
530 unsigned int Rn = BITS(inst, 16, 19); 530 unsigned int Rn = BITS(inst, 16, 19);
531 unsigned int Rm = BITS(inst, 0, 3); 531 unsigned int Rm = BITS(inst, 0, 3);
@@ -540,7 +540,7 @@ static void MLnS(RegisterOffset)(ARMul_State* cpu, unsigned int inst, unsigned i
540 virt_addr = addr; 540 virt_addr = addr;
541} 541}
542 542
543static void MLnS(ImmediatePreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { 543static void MLnS(ImmediatePreIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
544 unsigned int Rn = BITS(inst, 16, 19); 544 unsigned int Rn = BITS(inst, 16, 19);
545 unsigned int immedH = BITS(inst, 8, 11); 545 unsigned int immedH = BITS(inst, 8, 11);
546 unsigned int immedL = BITS(inst, 0, 3); 546 unsigned int immedL = BITS(inst, 0, 3);
@@ -559,7 +559,7 @@ static void MLnS(ImmediatePreIndexed)(ARMul_State* cpu, unsigned int inst, unsig
559 cpu->Reg[Rn] = addr; 559 cpu->Reg[Rn] = addr;
560} 560}
561 561
562static void MLnS(ImmediatePostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { 562static void MLnS(ImmediatePostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
563 unsigned int Rn = BITS(inst, 16, 19); 563 unsigned int Rn = BITS(inst, 16, 19);
564 unsigned int immedH = BITS(inst, 8, 11); 564 unsigned int immedH = BITS(inst, 8, 11);
565 unsigned int immedL = BITS(inst, 0, 3); 565 unsigned int immedL = BITS(inst, 0, 3);
@@ -578,7 +578,7 @@ static void MLnS(ImmediatePostIndexed)(ARMul_State* cpu, unsigned int inst, unsi
578 } 578 }
579} 579}
580 580
581static void MLnS(RegisterPostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { 581static void MLnS(RegisterPostIndexed)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
582 unsigned int Rn = BITS(inst, 16, 19); 582 unsigned int Rn = BITS(inst, 16, 19);
583 unsigned int Rm = BITS(inst, 0, 3); 583 unsigned int Rm = BITS(inst, 0, 3);
584 unsigned int rm = CHECK_READ_REG15_WA(cpu, Rm); 584 unsigned int rm = CHECK_READ_REG15_WA(cpu, Rm);
@@ -593,7 +593,7 @@ static void MLnS(RegisterPostIndexed)(ARMul_State* cpu, unsigned int inst, unsig
593 } 593 }
594} 594}
595 595
596static void LdnStM(DecrementBefore)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { 596static void LdnStM(DecrementBefore)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
597 unsigned int Rn = BITS(inst, 16, 19); 597 unsigned int Rn = BITS(inst, 16, 19);
598 unsigned int i = BITS(inst, 0, 15); 598 unsigned int i = BITS(inst, 0, 15);
599 int count = 0; 599 int count = 0;
@@ -609,7 +609,7 @@ static void LdnStM(DecrementBefore)(ARMul_State* cpu, unsigned int inst, unsigne
609 cpu->Reg[Rn] -= count * 4; 609 cpu->Reg[Rn] -= count * 4;
610} 610}
611 611
612static void LdnStM(IncrementBefore)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { 612static void LdnStM(IncrementBefore)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
613 unsigned int Rn = BITS(inst, 16, 19); 613 unsigned int Rn = BITS(inst, 16, 19);
614 unsigned int i = BITS(inst, 0, 15); 614 unsigned int i = BITS(inst, 0, 15);
615 int count = 0; 615 int count = 0;
@@ -625,7 +625,7 @@ static void LdnStM(IncrementBefore)(ARMul_State* cpu, unsigned int inst, unsigne
625 cpu->Reg[Rn] += count * 4; 625 cpu->Reg[Rn] += count * 4;
626} 626}
627 627
628static void LdnStM(IncrementAfter)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { 628static void LdnStM(IncrementAfter)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
629 unsigned int Rn = BITS(inst, 16, 19); 629 unsigned int Rn = BITS(inst, 16, 19);
630 unsigned int i = BITS(inst, 0, 15); 630 unsigned int i = BITS(inst, 0, 15);
631 int count = 0; 631 int count = 0;
@@ -641,7 +641,7 @@ static void LdnStM(IncrementAfter)(ARMul_State* cpu, unsigned int inst, unsigned
641 cpu->Reg[Rn] += count * 4; 641 cpu->Reg[Rn] += count * 4;
642} 642}
643 643
644static void LdnStM(DecrementAfter)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { 644static void LdnStM(DecrementAfter)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
645 unsigned int Rn = BITS(inst, 16, 19); 645 unsigned int Rn = BITS(inst, 16, 19);
646 unsigned int i = BITS(inst, 0, 15); 646 unsigned int i = BITS(inst, 0, 15);
647 int count = 0; 647 int count = 0;
@@ -659,7 +659,7 @@ static void LdnStM(DecrementAfter)(ARMul_State* cpu, unsigned int inst, unsigned
659 } 659 }
660} 660}
661 661
662static void LnSWoUB(ScaledRegisterOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr, unsigned int rw) { 662static void LnSWoUB(ScaledRegisterOffset)(ARMul_State* cpu, unsigned int inst, unsigned int& virt_addr) {
663 unsigned int shift = BITS(inst, 5, 6); 663 unsigned int shift = BITS(inst, 5, 6);
664 unsigned int shift_imm = BITS(inst, 7, 11); 664 unsigned int shift_imm = BITS(inst, 7, 11);
665 unsigned int Rn = BITS(inst, 16, 19); 665 unsigned int Rn = BITS(inst, 16, 19);
@@ -711,7 +711,6 @@ struct arm_inst {
711 unsigned int idx; 711 unsigned int idx;
712 unsigned int cond; 712 unsigned int cond;
713 int br; 713 int br;
714 int load_r15;
715 char component[0]; 714 char component[0];
716}; 715};
717 716
@@ -1250,31 +1249,25 @@ static get_addr_fp_t get_calc_addr_op(unsigned int inst) {
1250 1249
1251#define INTERPRETER_TRANSLATE(s) glue(InterpreterTranslate_, s) 1250#define INTERPRETER_TRANSLATE(s) glue(InterpreterTranslate_, s)
1252 1251
1253#define CHECK_RN (inst_cream->Rn == 15)
1254#define CHECK_RM (inst_cream->Rm == 15)
1255#define CHECK_RS (inst_cream->Rs == 15)
1256
1257static ARM_INST_PTR INTERPRETER_TRANSLATE(adc)(unsigned int inst, int index) 1252static ARM_INST_PTR INTERPRETER_TRANSLATE(adc)(unsigned int inst, int index)
1258{ 1253{
1259 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(adc_inst)); 1254 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(adc_inst));
1260 adc_inst *inst_cream = (adc_inst *)inst_base->component; 1255 adc_inst *inst_cream = (adc_inst *)inst_base->component;
1261 1256
1262 inst_base->cond = BITS(inst, 28, 31); 1257 inst_base->cond = BITS(inst, 28, 31);
1263 inst_base->idx = index; 1258 inst_base->idx = index;
1264 inst_base->br = NON_BRANCH; 1259 inst_base->br = NON_BRANCH;
1265 inst_base->load_r15 = 0;
1266 1260
1267 inst_cream->I = BIT(inst, 25); 1261 inst_cream->I = BIT(inst, 25);
1268 inst_cream->S = BIT(inst, 20); 1262 inst_cream->S = BIT(inst, 20);
1269 inst_cream->Rn = BITS(inst, 16, 19); 1263 inst_cream->Rn = BITS(inst, 16, 19);
1270 inst_cream->Rd = BITS(inst, 12, 15); 1264 inst_cream->Rd = BITS(inst, 12, 15);
1271 if (CHECK_RN)
1272 inst_base->load_r15 = 1;
1273 inst_cream->shifter_operand = BITS(inst, 0, 11); 1265 inst_cream->shifter_operand = BITS(inst, 0, 11);
1274 inst_cream->shtop_func = get_shtop(inst); 1266 inst_cream->shtop_func = get_shtop(inst);
1275 if (inst_cream->Rd == 15) { 1267
1268 if (inst_cream->Rd == 15)
1276 inst_base->br = INDIRECT_BRANCH; 1269 inst_base->br = INDIRECT_BRANCH;
1277 } 1270
1278 return inst_base; 1271 return inst_base;
1279} 1272}
1280static ARM_INST_PTR INTERPRETER_TRANSLATE(add)(unsigned int inst, int index) 1273static ARM_INST_PTR INTERPRETER_TRANSLATE(add)(unsigned int inst, int index)
@@ -1282,22 +1275,20 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(add)(unsigned int inst, int index)
1282 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(add_inst)); 1275 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(add_inst));
1283 add_inst *inst_cream = (add_inst *)inst_base->component; 1276 add_inst *inst_cream = (add_inst *)inst_base->component;
1284 1277
1285 inst_base->cond = BITS(inst, 28, 31); 1278 inst_base->cond = BITS(inst, 28, 31);
1286 inst_base->idx = index; 1279 inst_base->idx = index;
1287 inst_base->br = NON_BRANCH; 1280 inst_base->br = NON_BRANCH;
1288 inst_base->load_r15 = 0;
1289 1281
1290 inst_cream->I = BIT(inst, 25); 1282 inst_cream->I = BIT(inst, 25);
1291 inst_cream->S = BIT(inst, 20); 1283 inst_cream->S = BIT(inst, 20);
1292 inst_cream->Rn = BITS(inst, 16, 19); 1284 inst_cream->Rn = BITS(inst, 16, 19);
1293 inst_cream->Rd = BITS(inst, 12, 15); 1285 inst_cream->Rd = BITS(inst, 12, 15);
1294 if (CHECK_RN)
1295 inst_base->load_r15 = 1;
1296 inst_cream->shifter_operand = BITS(inst, 0, 11); 1286 inst_cream->shifter_operand = BITS(inst, 0, 11);
1297 inst_cream->shtop_func = get_shtop(inst); 1287 inst_cream->shtop_func = get_shtop(inst);
1298 if (inst_cream->Rd == 15) { 1288
1289 if (inst_cream->Rd == 15)
1299 inst_base->br = INDIRECT_BRANCH; 1290 inst_base->br = INDIRECT_BRANCH;
1300 } 1291
1301 return inst_base; 1292 return inst_base;
1302} 1293}
1303static ARM_INST_PTR INTERPRETER_TRANSLATE(and)(unsigned int inst, int index) 1294static ARM_INST_PTR INTERPRETER_TRANSLATE(and)(unsigned int inst, int index)
@@ -1305,21 +1296,20 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(and)(unsigned int inst, int index)
1305 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(and_inst)); 1296 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(and_inst));
1306 and_inst *inst_cream = (and_inst *)inst_base->component; 1297 and_inst *inst_cream = (and_inst *)inst_base->component;
1307 1298
1308 inst_base->cond = BITS(inst, 28, 31); 1299 inst_base->cond = BITS(inst, 28, 31);
1309 inst_base->idx = index; 1300 inst_base->idx = index;
1310 inst_base->br = NON_BRANCH; 1301 inst_base->br = NON_BRANCH;
1311 inst_base->load_r15 = 0;
1312 1302
1313 inst_cream->I = BIT(inst, 25); 1303 inst_cream->I = BIT(inst, 25);
1314 inst_cream->S = BIT(inst, 20); 1304 inst_cream->S = BIT(inst, 20);
1315 inst_cream->Rn = BITS(inst, 16, 19); 1305 inst_cream->Rn = BITS(inst, 16, 19);
1316 inst_cream->Rd = BITS(inst, 12, 15); 1306 inst_cream->Rd = BITS(inst, 12, 15);
1317 if (CHECK_RN)
1318 inst_base->load_r15 = 1;
1319 inst_cream->shifter_operand = BITS(inst, 0, 11); 1307 inst_cream->shifter_operand = BITS(inst, 0, 11);
1320 inst_cream->shtop_func = get_shtop(inst); 1308 inst_cream->shtop_func = get_shtop(inst);
1309
1321 if (inst_cream->Rd == 15) 1310 if (inst_cream->Rd == 15)
1322 inst_base->br = INDIRECT_BRANCH; 1311 inst_base->br = INDIRECT_BRANCH;
1312
1323 return inst_base; 1313 return inst_base;
1324} 1314}
1325static ARM_INST_PTR INTERPRETER_TRANSLATE(bbl)(unsigned int inst, int index) 1315static ARM_INST_PTR INTERPRETER_TRANSLATE(bbl)(unsigned int inst, int index)
@@ -1349,17 +1339,14 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(bic)(unsigned int inst, int index)
1349 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bic_inst)); 1339 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(bic_inst));
1350 bic_inst *inst_cream = (bic_inst *)inst_base->component; 1340 bic_inst *inst_cream = (bic_inst *)inst_base->component;
1351 1341
1352 inst_base->cond = BITS(inst, 28, 31); 1342 inst_base->cond = BITS(inst, 28, 31);
1353 inst_base->idx = index; 1343 inst_base->idx = index;
1354 inst_base->br = NON_BRANCH; 1344 inst_base->br = NON_BRANCH;
1355 inst_base->load_r15 = 0;
1356 1345
1357 inst_cream->I = BIT(inst, 25); 1346 inst_cream->I = BIT(inst, 25);
1358 inst_cream->S = BIT(inst, 20); 1347 inst_cream->S = BIT(inst, 20);
1359 inst_cream->Rn = BITS(inst, 16, 19); 1348 inst_cream->Rn = BITS(inst, 16, 19);
1360 inst_cream->Rd = BITS(inst, 12, 15); 1349 inst_cream->Rd = BITS(inst, 12, 15);
1361 if (CHECK_RN)
1362 inst_base->load_r15 = 1;
1363 inst_cream->shifter_operand = BITS(inst, 0, 11); 1350 inst_cream->shifter_operand = BITS(inst, 0, 11);
1364 inst_cream->shtop_func = get_shtop(inst); 1351 inst_cream->shtop_func = get_shtop(inst);
1365 1352
@@ -1373,10 +1360,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(bkpt)(unsigned int inst, int index)
1373 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(bkpt_inst)); 1360 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(bkpt_inst));
1374 bkpt_inst* const inst_cream = (bkpt_inst*)inst_base->component; 1361 bkpt_inst* const inst_cream = (bkpt_inst*)inst_base->component;
1375 1362
1376 inst_base->cond = BITS(inst, 28, 31); 1363 inst_base->cond = BITS(inst, 28, 31);
1377 inst_base->idx = index; 1364 inst_base->idx = index;
1378 inst_base->br = NON_BRANCH; 1365 inst_base->br = NON_BRANCH;
1379 inst_base->load_r15 = 0;
1380 1366
1381 inst_cream->imm = (BITS(inst, 8, 19) << 4) | BITS(inst, 0, 3); 1367 inst_cream->imm = (BITS(inst, 8, 19) << 4) | BITS(inst, 0, 3);
1382 1368
@@ -1423,10 +1409,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(cdp)(unsigned int inst, int index) {
1423 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cdp_inst)); 1409 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cdp_inst));
1424 cdp_inst *inst_cream = (cdp_inst *)inst_base->component; 1410 cdp_inst *inst_cream = (cdp_inst *)inst_base->component;
1425 1411
1426 inst_base->cond = BITS(inst, 28, 31); 1412 inst_base->cond = BITS(inst, 28, 31);
1427 inst_base->idx = index; 1413 inst_base->idx = index;
1428 inst_base->br = NON_BRANCH; 1414 inst_base->br = NON_BRANCH;
1429 inst_base->load_r15 = 0;
1430 1415
1431 inst_cream->CRm = BITS(inst, 0, 3); 1416 inst_cream->CRm = BITS(inst, 0, 3);
1432 inst_cream->CRd = BITS(inst, 12, 15); 1417 inst_cream->CRd = BITS(inst, 12, 15);
@@ -1453,15 +1438,12 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(clz)(unsigned int inst, int index)
1453 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(clz_inst)); 1438 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(clz_inst));
1454 clz_inst *inst_cream = (clz_inst *)inst_base->component; 1439 clz_inst *inst_cream = (clz_inst *)inst_base->component;
1455 1440
1456 inst_base->cond = BITS(inst, 28, 31); 1441 inst_base->cond = BITS(inst, 28, 31);
1457 inst_base->idx = index; 1442 inst_base->idx = index;
1458 inst_base->br = NON_BRANCH; 1443 inst_base->br = NON_BRANCH;
1459 inst_base->load_r15 = 0;
1460 1444
1461 inst_cream->Rm = BITS(inst, 0, 3); 1445 inst_cream->Rm = BITS(inst, 0, 3);
1462 inst_cream->Rd = BITS(inst, 12, 15); 1446 inst_cream->Rd = BITS(inst, 12, 15);
1463 if (CHECK_RM)
1464 inst_base->load_r15 = 1;
1465 1447
1466 return inst_base; 1448 return inst_base;
1467} 1449}
@@ -1470,18 +1452,15 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(cmn)(unsigned int inst, int index)
1470 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cmn_inst)); 1452 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cmn_inst));
1471 cmn_inst *inst_cream = (cmn_inst *)inst_base->component; 1453 cmn_inst *inst_cream = (cmn_inst *)inst_base->component;
1472 1454
1473 inst_base->cond = BITS(inst, 28, 31); 1455 inst_base->cond = BITS(inst, 28, 31);
1474 inst_base->idx = index; 1456 inst_base->idx = index;
1475 inst_base->br = NON_BRANCH; 1457 inst_base->br = NON_BRANCH;
1476 inst_base->load_r15 = 0;
1477 1458
1478 inst_cream->I = BIT(inst, 25); 1459 inst_cream->I = BIT(inst, 25);
1479 inst_cream->Rn = BITS(inst, 16, 19); 1460 inst_cream->Rn = BITS(inst, 16, 19);
1480
1481 if (CHECK_RN)
1482 inst_base->load_r15 = 1;
1483 inst_cream->shifter_operand = BITS(inst, 0, 11); 1461 inst_cream->shifter_operand = BITS(inst, 0, 11);
1484 inst_cream->shtop_func = get_shtop(inst); 1462 inst_cream->shtop_func = get_shtop(inst);
1463
1485 return inst_base; 1464 return inst_base;
1486} 1465}
1487static ARM_INST_PTR INTERPRETER_TRANSLATE(cmp)(unsigned int inst, int index) 1466static ARM_INST_PTR INTERPRETER_TRANSLATE(cmp)(unsigned int inst, int index)
@@ -1489,17 +1468,15 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(cmp)(unsigned int inst, int index)
1489 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cmp_inst)); 1468 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(cmp_inst));
1490 cmp_inst *inst_cream = (cmp_inst *)inst_base->component; 1469 cmp_inst *inst_cream = (cmp_inst *)inst_base->component;
1491 1470
1492 inst_base->cond = BITS(inst, 28, 31); 1471 inst_base->cond = BITS(inst, 28, 31);
1493 inst_base->idx = index; 1472 inst_base->idx = index;
1494 inst_base->br = NON_BRANCH; 1473 inst_base->br = NON_BRANCH;
1495 inst_base->load_r15 = 0;
1496 1474
1497 inst_cream->I = BIT(inst, 25); 1475 inst_cream->I = BIT(inst, 25);
1498 inst_cream->Rn = BITS(inst, 16, 19); 1476 inst_cream->Rn = BITS(inst, 16, 19);
1499 if (CHECK_RN)
1500 inst_base->load_r15 = 1;
1501 inst_cream->shifter_operand = BITS(inst, 0, 11); 1477 inst_cream->shifter_operand = BITS(inst, 0, 11);
1502 inst_cream->shtop_func = get_shtop(inst); 1478 inst_cream->shtop_func = get_shtop(inst);
1479
1503 return inst_base; 1480 return inst_base;
1504} 1481}
1505static ARM_INST_PTR INTERPRETER_TRANSLATE(cps)(unsigned int inst, int index) 1482static ARM_INST_PTR INTERPRETER_TRANSLATE(cps)(unsigned int inst, int index)
@@ -1546,22 +1523,20 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(eor)(unsigned int inst, int index)
1546 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(eor_inst)); 1523 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(eor_inst));
1547 eor_inst *inst_cream = (eor_inst *)inst_base->component; 1524 eor_inst *inst_cream = (eor_inst *)inst_base->component;
1548 1525
1549 inst_base->cond = BITS(inst, 28, 31); 1526 inst_base->cond = BITS(inst, 28, 31);
1550 inst_base->idx = index; 1527 inst_base->idx = index;
1551 inst_base->br = NON_BRANCH; 1528 inst_base->br = NON_BRANCH;
1552 inst_base->load_r15 = 0;
1553 1529
1554 inst_cream->I = BIT(inst, 25); 1530 inst_cream->I = BIT(inst, 25);
1555 inst_cream->S = BIT(inst, 20); 1531 inst_cream->S = BIT(inst, 20);
1556 inst_cream->Rn = BITS(inst, 16, 19); 1532 inst_cream->Rn = BITS(inst, 16, 19);
1557 inst_cream->Rd = BITS(inst, 12, 15); 1533 inst_cream->Rd = BITS(inst, 12, 15);
1558 if (CHECK_RN)
1559 inst_base->load_r15 = 1;
1560 inst_cream->shifter_operand = BITS(inst, 0, 11); 1534 inst_cream->shifter_operand = BITS(inst, 0, 11);
1561 inst_cream->shtop_func = get_shtop(inst); 1535 inst_cream->shtop_func = get_shtop(inst);
1562 if (inst_cream->Rd == 15) { 1536
1537 if (inst_cream->Rd == 15)
1563 inst_base->br = INDIRECT_BRANCH; 1538 inst_base->br = INDIRECT_BRANCH;
1564 } 1539
1565 return inst_base; 1540 return inst_base;
1566} 1541}
1567static ARM_INST_PTR INTERPRETER_TRANSLATE(ldc)(unsigned int inst, int index) 1542static ARM_INST_PTR INTERPRETER_TRANSLATE(ldc)(unsigned int inst, int index)
@@ -1595,16 +1570,13 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sxth)(unsigned int inst, int index)
1595 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtb_inst)); 1570 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtb_inst));
1596 sxtb_inst *inst_cream = (sxtb_inst *)inst_base->component; 1571 sxtb_inst *inst_cream = (sxtb_inst *)inst_base->component;
1597 1572
1598 inst_base->cond = BITS(inst, 28, 31); 1573 inst_base->cond = BITS(inst, 28, 31);
1599 inst_base->idx = index; 1574 inst_base->idx = index;
1600 inst_base->br = NON_BRANCH; 1575 inst_base->br = NON_BRANCH;
1601 inst_base->load_r15 = 0;
1602 1576
1603 inst_cream->Rd = BITS(inst, 12, 15); 1577 inst_cream->Rd = BITS(inst, 12, 15);
1604 inst_cream->Rm = BITS(inst, 0, 3); 1578 inst_cream->Rm = BITS(inst, 0, 3);
1605 inst_cream->rotate = BITS(inst, 10, 11); 1579 inst_cream->rotate = BITS(inst, 10, 11);
1606 if (CHECK_RM)
1607 inst_base->load_r15 = 1;
1608 1580
1609 return inst_base; 1581 return inst_base;
1610} 1582}
@@ -1613,17 +1585,16 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(ldr)(unsigned int inst, int index)
1613 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); 1585 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
1614 ldst_inst *inst_cream = (ldst_inst *)inst_base->component; 1586 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
1615 1587
1616 inst_base->cond = BITS(inst, 28, 31); 1588 inst_base->cond = BITS(inst, 28, 31);
1617 inst_base->idx = index; 1589 inst_base->idx = index;
1618 inst_base->br = NON_BRANCH; 1590 inst_base->br = NON_BRANCH;
1619 inst_base->load_r15 = 0;
1620 1591
1621 inst_cream->inst = inst; 1592 inst_cream->inst = inst;
1622 inst_cream->get_addr = get_calc_addr_op(inst); 1593 inst_cream->get_addr = get_calc_addr_op(inst);
1623 1594
1624 if (BITS(inst, 12, 15) == 15) { 1595 if (BITS(inst, 12, 15) == 15)
1625 inst_base->br = INDIRECT_BRANCH; 1596 inst_base->br = INDIRECT_BRANCH;
1626 } 1597
1627 return inst_base; 1598 return inst_base;
1628} 1599}
1629 1600
@@ -1632,17 +1603,16 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrcond)(unsigned int inst, int index)
1632 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); 1603 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
1633 ldst_inst *inst_cream = (ldst_inst *)inst_base->component; 1604 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
1634 1605
1635 inst_base->cond = BITS(inst, 28, 31); 1606 inst_base->cond = BITS(inst, 28, 31);
1636 inst_base->idx = index; 1607 inst_base->idx = index;
1637 inst_base->br = NON_BRANCH; 1608 inst_base->br = NON_BRANCH;
1638 inst_base->load_r15 = 0;
1639 1609
1640 inst_cream->inst = inst; 1610 inst_cream->inst = inst;
1641 inst_cream->get_addr = get_calc_addr_op(inst); 1611 inst_cream->get_addr = get_calc_addr_op(inst);
1642 1612
1643 if (BITS(inst, 12, 15) == 15) { 1613 if (BITS(inst, 12, 15) == 15)
1644 inst_base->br = INDIRECT_BRANCH; 1614 inst_base->br = INDIRECT_BRANCH;
1645 } 1615
1646 return inst_base; 1616 return inst_base;
1647} 1617}
1648 1618
@@ -1651,16 +1621,13 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(uxth)(unsigned int inst, int index)
1651 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxth_inst)); 1621 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxth_inst));
1652 uxth_inst *inst_cream = (uxth_inst *)inst_base->component; 1622 uxth_inst *inst_cream = (uxth_inst *)inst_base->component;
1653 1623
1654 inst_base->cond = BITS(inst, 28, 31); 1624 inst_base->cond = BITS(inst, 28, 31);
1655 inst_base->idx = index; 1625 inst_base->idx = index;
1656 inst_base->br = NON_BRANCH; 1626 inst_base->br = NON_BRANCH;
1657 inst_base->load_r15 = 0;
1658 1627
1659 inst_cream->Rd = BITS(inst, 12, 15); 1628 inst_cream->Rd = BITS(inst, 12, 15);
1660 inst_cream->rotate = BITS(inst, 10, 11); 1629 inst_cream->rotate = BITS(inst, 10, 11);
1661 inst_cream->Rm = BITS(inst, 0, 3); 1630 inst_cream->Rm = BITS(inst, 0, 3);
1662 if (CHECK_RM)
1663 inst_base->load_r15 = 1;
1664 1631
1665 return inst_base; 1632 return inst_base;
1666} 1633}
@@ -1669,17 +1636,14 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtah)(unsigned int inst, int index)
1669 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxtah_inst)); 1636 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxtah_inst));
1670 uxtah_inst *inst_cream = (uxtah_inst *)inst_base->component; 1637 uxtah_inst *inst_cream = (uxtah_inst *)inst_base->component;
1671 1638
1672 inst_base->cond = BITS(inst, 28, 31); 1639 inst_base->cond = BITS(inst, 28, 31);
1673 inst_base->idx = index; 1640 inst_base->idx = index;
1674 inst_base->br = NON_BRANCH; 1641 inst_base->br = NON_BRANCH;
1675 inst_base->load_r15 = 0;
1676 1642
1677 inst_cream->Rn = BITS(inst, 16, 19); 1643 inst_cream->Rn = BITS(inst, 16, 19);
1678 inst_cream->Rd = BITS(inst, 12, 15); 1644 inst_cream->Rd = BITS(inst, 12, 15);
1679 inst_cream->rotate = BITS(inst, 10, 11); 1645 inst_cream->rotate = BITS(inst, 10, 11);
1680 inst_cream->Rm = BITS(inst, 0, 3); 1646 inst_cream->Rm = BITS(inst, 0, 3);
1681 if (CHECK_RM || CHECK_RN)
1682 inst_base->load_r15 = 1;
1683 1647
1684 return inst_base; 1648 return inst_base;
1685} 1649}
@@ -1865,10 +1829,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(mcrr)(unsigned int inst, int index)
1865 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(mcrr_inst)); 1829 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(mcrr_inst));
1866 mcrr_inst* const inst_cream = (mcrr_inst*)inst_base->component; 1830 mcrr_inst* const inst_cream = (mcrr_inst*)inst_base->component;
1867 1831
1868 inst_base->cond = BITS(inst, 28, 31); 1832 inst_base->cond = BITS(inst, 28, 31);
1869 inst_base->idx = index; 1833 inst_base->idx = index;
1870 inst_base->br = NON_BRANCH; 1834 inst_base->br = NON_BRANCH;
1871 inst_base->load_r15 = 0;
1872 1835
1873 inst_cream->crm = BITS(inst, 0, 3); 1836 inst_cream->crm = BITS(inst, 0, 3);
1874 inst_cream->opcode_1 = BITS(inst, 4, 7); 1837 inst_cream->opcode_1 = BITS(inst, 4, 7);
@@ -1884,10 +1847,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(mla)(unsigned int inst, int index)
1884 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mla_inst)); 1847 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mla_inst));
1885 mla_inst *inst_cream = (mla_inst *)inst_base->component; 1848 mla_inst *inst_cream = (mla_inst *)inst_base->component;
1886 1849
1887 inst_base->cond = BITS(inst, 28, 31); 1850 inst_base->cond = BITS(inst, 28, 31);
1888 inst_base->idx = index; 1851 inst_base->idx = index;
1889 inst_base->br = NON_BRANCH; 1852 inst_base->br = NON_BRANCH;
1890 inst_base->load_r15 = 0;
1891 1853
1892 inst_cream->S = BIT(inst, 20); 1854 inst_cream->S = BIT(inst, 20);
1893 inst_cream->Rn = BITS(inst, 12, 15); 1855 inst_cream->Rn = BITS(inst, 12, 15);
@@ -1895,9 +1857,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(mla)(unsigned int inst, int index)
1895 inst_cream->Rs = BITS(inst, 8, 11); 1857 inst_cream->Rs = BITS(inst, 8, 11);
1896 inst_cream->Rm = BITS(inst, 0, 3); 1858 inst_cream->Rm = BITS(inst, 0, 3);
1897 1859
1898 if (CHECK_RM || CHECK_RN || CHECK_RS)
1899 inst_base->load_r15 = 1;
1900
1901 return inst_base; 1860 return inst_base;
1902} 1861}
1903static ARM_INST_PTR INTERPRETER_TRANSLATE(mov)(unsigned int inst, int index) 1862static ARM_INST_PTR INTERPRETER_TRANSLATE(mov)(unsigned int inst, int index)
@@ -1977,18 +1936,15 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(mul)(unsigned int inst, int index)
1977 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mul_inst)); 1936 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(mul_inst));
1978 mul_inst *inst_cream = (mul_inst *)inst_base->component; 1937 mul_inst *inst_cream = (mul_inst *)inst_base->component;
1979 1938
1980 inst_base->cond = BITS(inst, 28, 31); 1939 inst_base->cond = BITS(inst, 28, 31);
1981 inst_base->idx = index; 1940 inst_base->idx = index;
1982 inst_base->br = NON_BRANCH; 1941 inst_base->br = NON_BRANCH;
1983 inst_base->load_r15 = 0;
1984 1942
1985 inst_cream->S = BIT(inst, 20); 1943 inst_cream->S = BIT(inst, 20);
1986 inst_cream->Rm = BITS(inst, 0, 3); 1944 inst_cream->Rm = BITS(inst, 0, 3);
1987 inst_cream->Rs = BITS(inst, 8, 11); 1945 inst_cream->Rs = BITS(inst, 8, 11);
1988 inst_cream->Rd = BITS(inst, 16, 19); 1946 inst_cream->Rd = BITS(inst, 16, 19);
1989 1947
1990 if (CHECK_RM || CHECK_RS)
1991 inst_base->load_r15 = 1;
1992 return inst_base; 1948 return inst_base;
1993} 1949}
1994static ARM_INST_PTR INTERPRETER_TRANSLATE(mvn)(unsigned int inst, int index) 1950static ARM_INST_PTR INTERPRETER_TRANSLATE(mvn)(unsigned int inst, int index)
@@ -2017,10 +1973,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(orr)(unsigned int inst, int index)
2017 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(orr_inst)); 1973 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(orr_inst));
2018 orr_inst *inst_cream = (orr_inst *)inst_base->component; 1974 orr_inst *inst_cream = (orr_inst *)inst_base->component;
2019 1975
2020 inst_base->cond = BITS(inst, 28, 31); 1976 inst_base->cond = BITS(inst, 28, 31);
2021 inst_base->idx = index; 1977 inst_base->idx = index;
2022 inst_base->br = NON_BRANCH; 1978 inst_base->br = NON_BRANCH;
2023 inst_base->load_r15 = 0;
2024 1979
2025 inst_cream->I = BIT(inst, 25); 1980 inst_cream->I = BIT(inst, 25);
2026 inst_cream->S = BIT(inst, 20); 1981 inst_cream->S = BIT(inst, 20);
@@ -2029,11 +1984,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(orr)(unsigned int inst, int index)
2029 inst_cream->shifter_operand = BITS(inst, 0, 11); 1984 inst_cream->shifter_operand = BITS(inst, 0, 11);
2030 inst_cream->shtop_func = get_shtop(inst); 1985 inst_cream->shtop_func = get_shtop(inst);
2031 1986
2032 if (CHECK_RN) 1987 if (inst_cream->Rd == 15)
2033 inst_base->load_r15 = 1;
2034 if (inst_cream->Rd == 15) {
2035 inst_base->br = INDIRECT_BRANCH; 1988 inst_base->br = INDIRECT_BRANCH;
2036 } 1989
2037 return inst_base; 1990 return inst_base;
2038} 1991}
2039 1992
@@ -2042,10 +1995,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(nop)(unsigned int inst, int index)
2042{ 1995{
2043 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst)); 1996 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst));
2044 1997
2045 inst_base->cond = BITS(inst, 28, 31); 1998 inst_base->cond = BITS(inst, 28, 31);
2046 inst_base->idx = index; 1999 inst_base->idx = index;
2047 inst_base->br = NON_BRANCH; 2000 inst_base->br = NON_BRANCH;
2048 inst_base->load_r15 = 0;
2049 2001
2050 return inst_base; 2002 return inst_base;
2051} 2003}
@@ -2056,13 +2008,12 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(pkhbt)(unsigned int inst, int index)
2056 pkh_inst *inst_cream = (pkh_inst *)inst_base->component; 2008 pkh_inst *inst_cream = (pkh_inst *)inst_base->component;
2057 2009
2058 inst_base->cond = BITS(inst, 28, 31); 2010 inst_base->cond = BITS(inst, 28, 31);
2059 inst_base->idx = index; 2011 inst_base->idx = index;
2060 inst_base->br = NON_BRANCH; 2012 inst_base->br = NON_BRANCH;
2061 inst_base->load_r15 = 0;
2062 2013
2063 inst_cream->Rd = BITS(inst, 12, 15); 2014 inst_cream->Rd = BITS(inst, 12, 15);
2064 inst_cream->Rn = BITS(inst, 16, 19); 2015 inst_cream->Rn = BITS(inst, 16, 19);
2065 inst_cream->Rm = BITS(inst, 0, 3); 2016 inst_cream->Rm = BITS(inst, 0, 3);
2066 inst_cream->imm = BITS(inst, 7, 11); 2017 inst_cream->imm = BITS(inst, 7, 11);
2067 2018
2068 return inst_base; 2019 return inst_base;
@@ -2077,10 +2028,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(pld)(unsigned int inst, int index)
2077{ 2028{
2078 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(pld_inst)); 2029 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(pld_inst));
2079 2030
2080 inst_base->cond = BITS(inst, 28, 31); 2031 inst_base->cond = BITS(inst, 28, 31);
2081 inst_base->idx = index; 2032 inst_base->idx = index;
2082 inst_base->br = NON_BRANCH; 2033 inst_base->br = NON_BRANCH;
2083 inst_base->load_r15 = 0;
2084 2034
2085 return inst_base; 2035 return inst_base;
2086} 2036}
@@ -2090,10 +2040,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(qadd)(unsigned int inst, int index)
2090 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); 2040 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
2091 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; 2041 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
2092 2042
2093 inst_base->cond = BITS(inst, 28, 31); 2043 inst_base->cond = BITS(inst, 28, 31);
2094 inst_base->idx = index; 2044 inst_base->idx = index;
2095 inst_base->br = NON_BRANCH; 2045 inst_base->br = NON_BRANCH;
2096 inst_base->load_r15 = 0;
2097 2046
2098 inst_cream->op1 = BITS(inst, 21, 22); 2047 inst_cream->op1 = BITS(inst, 21, 22);
2099 inst_cream->Rm = BITS(inst, 0, 3); 2048 inst_cream->Rm = BITS(inst, 0, 3);
@@ -2120,10 +2069,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(qadd8)(unsigned int inst, int index)
2120 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); 2069 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
2121 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; 2070 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
2122 2071
2123 inst_base->cond = BITS(inst, 28, 31); 2072 inst_base->cond = BITS(inst, 28, 31);
2124 inst_base->idx = index; 2073 inst_base->idx = index;
2125 inst_base->br = NON_BRANCH; 2074 inst_base->br = NON_BRANCH;
2126 inst_base->load_r15 = 0;
2127 2075
2128 inst_cream->Rm = BITS(inst, 0, 3); 2076 inst_cream->Rm = BITS(inst, 0, 3);
2129 inst_cream->Rn = BITS(inst, 16, 19); 2077 inst_cream->Rn = BITS(inst, 16, 19);
@@ -2159,10 +2107,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(rev)(unsigned int inst, int index)
2159 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(rev_inst)); 2107 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(rev_inst));
2160 rev_inst* const inst_cream = (rev_inst*)inst_base->component; 2108 rev_inst* const inst_cream = (rev_inst*)inst_base->component;
2161 2109
2162 inst_base->cond = BITS(inst, 28, 31); 2110 inst_base->cond = BITS(inst, 28, 31);
2163 inst_base->idx = index; 2111 inst_base->idx = index;
2164 inst_base->br = NON_BRANCH; 2112 inst_base->br = NON_BRANCH;
2165 inst_base->load_r15 = 0;
2166 2113
2167 inst_cream->Rm = BITS(inst, 0, 3); 2114 inst_cream->Rm = BITS(inst, 0, 3);
2168 inst_cream->Rd = BITS(inst, 12, 15); 2115 inst_cream->Rd = BITS(inst, 12, 15);
@@ -2185,10 +2132,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(rfe)(unsigned int inst, int index)
2185 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); 2132 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
2186 ldst_inst* const inst_cream = (ldst_inst*)inst_base->component; 2133 ldst_inst* const inst_cream = (ldst_inst*)inst_base->component;
2187 2134
2188 inst_base->cond = AL; 2135 inst_base->cond = AL;
2189 inst_base->idx = index; 2136 inst_base->idx = index;
2190 inst_base->br = INDIRECT_BRANCH; 2137 inst_base->br = INDIRECT_BRANCH;
2191 inst_base->load_r15 = 0;
2192 2138
2193 inst_cream->inst = inst; 2139 inst_cream->inst = inst;
2194 inst_cream->get_addr = get_calc_addr_op(inst); 2140 inst_cream->get_addr = get_calc_addr_op(inst);
@@ -2201,10 +2147,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(rsb)(unsigned int inst, int index)
2201 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(rsb_inst)); 2147 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(rsb_inst));
2202 rsb_inst *inst_cream = (rsb_inst *)inst_base->component; 2148 rsb_inst *inst_cream = (rsb_inst *)inst_base->component;
2203 2149
2204 inst_base->cond = BITS(inst, 28, 31); 2150 inst_base->cond = BITS(inst, 28, 31);
2205 inst_base->idx = index; 2151 inst_base->idx = index;
2206 inst_base->br = NON_BRANCH; 2152 inst_base->br = NON_BRANCH;
2207 inst_base->load_r15 = 0;
2208 2153
2209 inst_cream->I = BIT(inst, 25); 2154 inst_cream->I = BIT(inst, 25);
2210 inst_cream->S = BIT(inst, 20); 2155 inst_cream->S = BIT(inst, 20);
@@ -2212,12 +2157,10 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(rsb)(unsigned int inst, int index)
2212 inst_cream->Rd = BITS(inst, 12, 15); 2157 inst_cream->Rd = BITS(inst, 12, 15);
2213 inst_cream->shifter_operand = BITS(inst, 0, 11); 2158 inst_cream->shifter_operand = BITS(inst, 0, 11);
2214 inst_cream->shtop_func = get_shtop(inst); 2159 inst_cream->shtop_func = get_shtop(inst);
2215 if (CHECK_RN)
2216 inst_base->load_r15 = 1;
2217 2160
2218 if (inst_cream->Rd == 15) { 2161 if (inst_cream->Rd == 15)
2219 inst_base->br = INDIRECT_BRANCH; 2162 inst_base->br = INDIRECT_BRANCH;
2220 } 2163
2221 return inst_base; 2164 return inst_base;
2222} 2165}
2223static ARM_INST_PTR INTERPRETER_TRANSLATE(rsc)(unsigned int inst, int index) 2166static ARM_INST_PTR INTERPRETER_TRANSLATE(rsc)(unsigned int inst, int index)
@@ -2225,10 +2168,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(rsc)(unsigned int inst, int index)
2225 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(rsc_inst)); 2168 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(rsc_inst));
2226 rsc_inst *inst_cream = (rsc_inst *)inst_base->component; 2169 rsc_inst *inst_cream = (rsc_inst *)inst_base->component;
2227 2170
2228 inst_base->cond = BITS(inst, 28, 31); 2171 inst_base->cond = BITS(inst, 28, 31);
2229 inst_base->idx = index; 2172 inst_base->idx = index;
2230 inst_base->br = NON_BRANCH; 2173 inst_base->br = NON_BRANCH;
2231 inst_base->load_r15 = 0;
2232 2174
2233 inst_cream->I = BIT(inst, 25); 2175 inst_cream->I = BIT(inst, 25);
2234 inst_cream->S = BIT(inst, 20); 2176 inst_cream->S = BIT(inst, 20);
@@ -2236,12 +2178,10 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(rsc)(unsigned int inst, int index)
2236 inst_cream->Rd = BITS(inst, 12, 15); 2178 inst_cream->Rd = BITS(inst, 12, 15);
2237 inst_cream->shifter_operand = BITS(inst, 0, 11); 2179 inst_cream->shifter_operand = BITS(inst, 0, 11);
2238 inst_cream->shtop_func = get_shtop(inst); 2180 inst_cream->shtop_func = get_shtop(inst);
2239 if (CHECK_RN)
2240 inst_base->load_r15 = 1;
2241 2181
2242 if (inst_cream->Rd == 15) { 2182 if (inst_cream->Rd == 15)
2243 inst_base->br = INDIRECT_BRANCH; 2183 inst_base->br = INDIRECT_BRANCH;
2244 } 2184
2245 return inst_base; 2185 return inst_base;
2246} 2186}
2247static ARM_INST_PTR INTERPRETER_TRANSLATE(sadd8)(unsigned int inst, int index) 2187static ARM_INST_PTR INTERPRETER_TRANSLATE(sadd8)(unsigned int inst, int index)
@@ -2249,10 +2189,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sadd8)(unsigned int inst, int index)
2249 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); 2189 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
2250 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; 2190 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
2251 2191
2252 inst_base->cond = BITS(inst, 28, 31); 2192 inst_base->cond = BITS(inst, 28, 31);
2253 inst_base->idx = index; 2193 inst_base->idx = index;
2254 inst_base->br = NON_BRANCH; 2194 inst_base->br = NON_BRANCH;
2255 inst_base->load_r15 = 0;
2256 2195
2257 inst_cream->Rm = BITS(inst, 0, 3); 2196 inst_cream->Rm = BITS(inst, 0, 3);
2258 inst_cream->Rn = BITS(inst, 16, 19); 2197 inst_cream->Rn = BITS(inst, 16, 19);
@@ -2288,10 +2227,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sbc)(unsigned int inst, int index)
2288 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sbc_inst)); 2227 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sbc_inst));
2289 sbc_inst *inst_cream = (sbc_inst *)inst_base->component; 2228 sbc_inst *inst_cream = (sbc_inst *)inst_base->component;
2290 2229
2291 inst_base->cond = BITS(inst, 28, 31); 2230 inst_base->cond = BITS(inst, 28, 31);
2292 inst_base->idx = index; 2231 inst_base->idx = index;
2293 inst_base->br = NON_BRANCH; 2232 inst_base->br = NON_BRANCH;
2294 inst_base->load_r15 = 0;
2295 2233
2296 inst_cream->I = BIT(inst, 25); 2234 inst_cream->I = BIT(inst, 25);
2297 inst_cream->S = BIT(inst, 20); 2235 inst_cream->S = BIT(inst, 20);
@@ -2299,12 +2237,10 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sbc)(unsigned int inst, int index)
2299 inst_cream->Rd = BITS(inst, 12, 15); 2237 inst_cream->Rd = BITS(inst, 12, 15);
2300 inst_cream->shifter_operand = BITS(inst, 0, 11); 2238 inst_cream->shifter_operand = BITS(inst, 0, 11);
2301 inst_cream->shtop_func = get_shtop(inst); 2239 inst_cream->shtop_func = get_shtop(inst);
2302 if (CHECK_RN)
2303 inst_base->load_r15 = 1;
2304 2240
2305 if (inst_cream->Rd == 15) { 2241 if (inst_cream->Rd == 15)
2306 inst_base->br = INDIRECT_BRANCH; 2242 inst_base->br = INDIRECT_BRANCH;
2307 } 2243
2308 return inst_base; 2244 return inst_base;
2309} 2245}
2310static ARM_INST_PTR INTERPRETER_TRANSLATE(sel)(unsigned int inst, int index) 2246static ARM_INST_PTR INTERPRETER_TRANSLATE(sel)(unsigned int inst, int index)
@@ -2312,10 +2248,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sel)(unsigned int inst, int index)
2312 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); 2248 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
2313 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; 2249 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
2314 2250
2315 inst_base->cond = BITS(inst, 28, 31); 2251 inst_base->cond = BITS(inst, 28, 31);
2316 inst_base->idx = index; 2252 inst_base->idx = index;
2317 inst_base->br = NON_BRANCH; 2253 inst_base->br = NON_BRANCH;
2318 inst_base->load_r15 = 0;
2319 2254
2320 inst_cream->Rm = BITS(inst, 0, 3); 2255 inst_cream->Rm = BITS(inst, 0, 3);
2321 inst_cream->Rn = BITS(inst, 16, 19); 2256 inst_cream->Rn = BITS(inst, 16, 19);
@@ -2331,10 +2266,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(setend)(unsigned int inst, int index)
2331 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(setend_inst)); 2266 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(setend_inst));
2332 setend_inst* const inst_cream = (setend_inst*)inst_base->component; 2267 setend_inst* const inst_cream = (setend_inst*)inst_base->component;
2333 2268
2334 inst_base->cond = AL; 2269 inst_base->cond = AL;
2335 inst_base->idx = index; 2270 inst_base->idx = index;
2336 inst_base->br = NON_BRANCH; 2271 inst_base->br = NON_BRANCH;
2337 inst_base->load_r15 = 0;
2338 2272
2339 inst_cream->set_bigend = BIT(inst, 9); 2273 inst_cream->set_bigend = BIT(inst, 9);
2340 2274
@@ -2345,10 +2279,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sev)(unsigned int inst, int index)
2345{ 2279{
2346 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst)); 2280 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst));
2347 2281
2348 inst_base->cond = BITS(inst, 28, 31); 2282 inst_base->cond = BITS(inst, 28, 31);
2349 inst_base->idx = index; 2283 inst_base->idx = index;
2350 inst_base->br = NON_BRANCH; 2284 inst_base->br = NON_BRANCH;
2351 inst_base->load_r15 = 0;
2352 2285
2353 return inst_base; 2286 return inst_base;
2354} 2287}
@@ -2358,10 +2291,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(shadd8)(unsigned int inst, int index)
2358 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); 2291 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
2359 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; 2292 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
2360 2293
2361 inst_base->cond = BITS(inst, 28, 31); 2294 inst_base->cond = BITS(inst, 28, 31);
2362 inst_base->idx = index; 2295 inst_base->idx = index;
2363 inst_base->br = NON_BRANCH; 2296 inst_base->br = NON_BRANCH;
2364 inst_base->load_r15 = 0;
2365 2297
2366 inst_cream->op1 = BITS(inst, 20, 21); 2298 inst_cream->op1 = BITS(inst, 20, 21);
2367 inst_cream->op2 = BITS(inst, 5, 7); 2299 inst_cream->op2 = BITS(inst, 5, 7);
@@ -2397,10 +2329,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smla)(unsigned int inst, int index)
2397 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smla_inst)); 2329 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smla_inst));
2398 smla_inst *inst_cream = (smla_inst *)inst_base->component; 2330 smla_inst *inst_cream = (smla_inst *)inst_base->component;
2399 2331
2400 inst_base->cond = BITS(inst, 28, 31); 2332 inst_base->cond = BITS(inst, 28, 31);
2401 inst_base->idx = index; 2333 inst_base->idx = index;
2402 inst_base->br = NON_BRANCH; 2334 inst_base->br = NON_BRANCH;
2403 inst_base->load_r15 = 0;
2404 2335
2405 inst_cream->x = BIT(inst, 5); 2336 inst_cream->x = BIT(inst, 5);
2406 inst_cream->y = BIT(inst, 6); 2337 inst_cream->y = BIT(inst, 6);
@@ -2417,10 +2348,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smlad)(unsigned int inst, int index)
2417 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst)); 2348 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst));
2418 smlad_inst* const inst_cream = (smlad_inst*)inst_base->component; 2349 smlad_inst* const inst_cream = (smlad_inst*)inst_base->component;
2419 2350
2420 inst_base->cond = BITS(inst, 28, 31); 2351 inst_base->cond = BITS(inst, 28, 31);
2421 inst_base->idx = index; 2352 inst_base->idx = index;
2422 inst_base->br = NON_BRANCH; 2353 inst_base->br = NON_BRANCH;
2423 inst_base->load_r15 = 0;
2424 2354
2425 inst_cream->m = BIT(inst, 5); 2355 inst_cream->m = BIT(inst, 5);
2426 inst_cream->Rn = BITS(inst, 0, 3); 2356 inst_cream->Rn = BITS(inst, 0, 3);
@@ -2450,10 +2380,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smlal)(unsigned int inst, int index)
2450 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umlal_inst)); 2380 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umlal_inst));
2451 umlal_inst *inst_cream = (umlal_inst *)inst_base->component; 2381 umlal_inst *inst_cream = (umlal_inst *)inst_base->component;
2452 2382
2453 inst_base->cond = BITS(inst, 28, 31); 2383 inst_base->cond = BITS(inst, 28, 31);
2454 inst_base->idx = index; 2384 inst_base->idx = index;
2455 inst_base->br = NON_BRANCH; 2385 inst_base->br = NON_BRANCH;
2456 inst_base->load_r15 = 0;
2457 2386
2458 inst_cream->S = BIT(inst, 20); 2387 inst_cream->S = BIT(inst, 20);
2459 inst_cream->Rm = BITS(inst, 0, 3); 2388 inst_cream->Rm = BITS(inst, 0, 3);
@@ -2461,8 +2390,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smlal)(unsigned int inst, int index)
2461 inst_cream->RdHi = BITS(inst, 16, 19); 2390 inst_cream->RdHi = BITS(inst, 16, 19);
2462 inst_cream->RdLo = BITS(inst, 12, 15); 2391 inst_cream->RdLo = BITS(inst, 12, 15);
2463 2392
2464 if (CHECK_RM || CHECK_RS)
2465 inst_base->load_r15 = 1;
2466 return inst_base; 2393 return inst_base;
2467} 2394}
2468 2395
@@ -2471,10 +2398,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smlalxy)(unsigned int inst, int index)
2471 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlalxy_inst)); 2398 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlalxy_inst));
2472 smlalxy_inst* const inst_cream = (smlalxy_inst*)inst_base->component; 2399 smlalxy_inst* const inst_cream = (smlalxy_inst*)inst_base->component;
2473 2400
2474 inst_base->cond = BITS(inst, 28, 31); 2401 inst_base->cond = BITS(inst, 28, 31);
2475 inst_base->idx = index; 2402 inst_base->idx = index;
2476 inst_base->br = NON_BRANCH; 2403 inst_base->br = NON_BRANCH;
2477 inst_base->load_r15 = 0;
2478 2404
2479 inst_cream->x = BIT(inst, 5); 2405 inst_cream->x = BIT(inst, 5);
2480 inst_cream->y = BIT(inst, 6); 2406 inst_cream->y = BIT(inst, 6);
@@ -2491,10 +2417,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smlaw)(unsigned int inst, int index)
2491 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst)); 2417 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst));
2492 smlad_inst* const inst_cream = (smlad_inst*)inst_base->component; 2418 smlad_inst* const inst_cream = (smlad_inst*)inst_base->component;
2493 2419
2494 inst_base->cond = BITS(inst, 28, 31); 2420 inst_base->cond = BITS(inst, 28, 31);
2495 inst_base->idx = index; 2421 inst_base->idx = index;
2496 inst_base->br = NON_BRANCH; 2422 inst_base->br = NON_BRANCH;
2497 inst_base->load_r15 = 0;
2498 2423
2499 inst_cream->Ra = BITS(inst, 12, 15); 2424 inst_cream->Ra = BITS(inst, 12, 15);
2500 inst_cream->Rm = BITS(inst, 8, 11); 2425 inst_cream->Rm = BITS(inst, 8, 11);
@@ -2510,10 +2435,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smlald)(unsigned int inst, int index)
2510 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlald_inst)); 2435 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlald_inst));
2511 smlald_inst* const inst_cream = (smlald_inst*)inst_base->component; 2436 smlald_inst* const inst_cream = (smlald_inst*)inst_base->component;
2512 2437
2513 inst_base->cond = BITS(inst, 28, 31); 2438 inst_base->cond = BITS(inst, 28, 31);
2514 inst_base->idx = index; 2439 inst_base->idx = index;
2515 inst_base->br = NON_BRANCH; 2440 inst_base->br = NON_BRANCH;
2516 inst_base->load_r15 = 0;
2517 2441
2518 inst_cream->Rm = BITS(inst, 8, 11); 2442 inst_cream->Rm = BITS(inst, 8, 11);
2519 inst_cream->Rn = BITS(inst, 0, 3); 2443 inst_cream->Rn = BITS(inst, 0, 3);
@@ -2535,10 +2459,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smmla)(unsigned int inst, int index)
2535 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst)); 2459 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst));
2536 smlad_inst* const inst_cream = (smlad_inst*)inst_base->component; 2460 smlad_inst* const inst_cream = (smlad_inst*)inst_base->component;
2537 2461
2538 inst_base->cond = BITS(inst, 28, 31); 2462 inst_base->cond = BITS(inst, 28, 31);
2539 inst_base->idx = index; 2463 inst_base->idx = index;
2540 inst_base->br = NON_BRANCH; 2464 inst_base->br = NON_BRANCH;
2541 inst_base->load_r15 = 0;
2542 2465
2543 inst_cream->m = BIT(inst, 5); 2466 inst_cream->m = BIT(inst, 5);
2544 inst_cream->Ra = BITS(inst, 12, 15); 2467 inst_cream->Ra = BITS(inst, 12, 15);
@@ -2564,10 +2487,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smul)(unsigned int inst, int index)
2564 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smul_inst)); 2487 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smul_inst));
2565 smul_inst *inst_cream = (smul_inst *)inst_base->component; 2488 smul_inst *inst_cream = (smul_inst *)inst_base->component;
2566 2489
2567 inst_base->cond = BITS(inst, 28, 31); 2490 inst_base->cond = BITS(inst, 28, 31);
2568 inst_base->idx = index; 2491 inst_base->idx = index;
2569 inst_base->br = NON_BRANCH; 2492 inst_base->br = NON_BRANCH;
2570 inst_base->load_r15 = 0;
2571 2493
2572 inst_cream->Rd = BITS(inst, 16, 19); 2494 inst_cream->Rd = BITS(inst, 16, 19);
2573 inst_cream->Rs = BITS(inst, 8, 11); 2495 inst_cream->Rs = BITS(inst, 8, 11);
@@ -2576,8 +2498,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smul)(unsigned int inst, int index)
2576 inst_cream->x = BIT(inst, 5); 2498 inst_cream->x = BIT(inst, 5);
2577 inst_cream->y = BIT(inst, 6); 2499 inst_cream->y = BIT(inst, 6);
2578 2500
2579 if (CHECK_RM || CHECK_RS)
2580 inst_base->load_r15 = 1;
2581 return inst_base; 2501 return inst_base;
2582 2502
2583} 2503}
@@ -2586,10 +2506,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smull)(unsigned int inst, int index)
2586 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umull_inst)); 2506 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umull_inst));
2587 umull_inst *inst_cream = (umull_inst *)inst_base->component; 2507 umull_inst *inst_cream = (umull_inst *)inst_base->component;
2588 2508
2589 inst_base->cond = BITS(inst, 28, 31); 2509 inst_base->cond = BITS(inst, 28, 31);
2590 inst_base->idx = index; 2510 inst_base->idx = index;
2591 inst_base->br = NON_BRANCH; 2511 inst_base->br = NON_BRANCH;
2592 inst_base->load_r15 = 0;
2593 2512
2594 inst_cream->S = BIT(inst, 20); 2513 inst_cream->S = BIT(inst, 20);
2595 inst_cream->Rm = BITS(inst, 0, 3); 2514 inst_cream->Rm = BITS(inst, 0, 3);
@@ -2597,8 +2516,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smull)(unsigned int inst, int index)
2597 inst_cream->RdHi = BITS(inst, 16, 19); 2516 inst_cream->RdHi = BITS(inst, 16, 19);
2598 inst_cream->RdLo = BITS(inst, 12, 15); 2517 inst_cream->RdLo = BITS(inst, 12, 15);
2599 2518
2600 if (CHECK_RM || CHECK_RS)
2601 inst_base->load_r15 = 1;
2602 return inst_base; 2519 return inst_base;
2603} 2520}
2604 2521
@@ -2607,18 +2524,15 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smulw)(unsigned int inst, int index)
2607 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst)); 2524 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(smlad_inst));
2608 smlad_inst *inst_cream = (smlad_inst *)inst_base->component; 2525 smlad_inst *inst_cream = (smlad_inst *)inst_base->component;
2609 2526
2610 inst_base->cond = BITS(inst, 28, 31); 2527 inst_base->cond = BITS(inst, 28, 31);
2611 inst_base->idx = index; 2528 inst_base->idx = index;
2612 inst_base->br = NON_BRANCH; 2529 inst_base->br = NON_BRANCH;
2613 inst_base->load_r15 = 0;
2614 2530
2615 inst_cream->m = BIT(inst, 6); 2531 inst_cream->m = BIT(inst, 6);
2616 inst_cream->Rm = BITS(inst, 8, 11); 2532 inst_cream->Rm = BITS(inst, 8, 11);
2617 inst_cream->Rn = BITS(inst, 0, 3); 2533 inst_cream->Rn = BITS(inst, 0, 3);
2618 inst_cream->Rd = BITS(inst, 16, 19); 2534 inst_cream->Rd = BITS(inst, 16, 19);
2619 2535
2620 if (CHECK_RM || CHECK_RN)
2621 inst_base->load_r15 = 1;
2622 return inst_base; 2536 return inst_base;
2623} 2537}
2624 2538
@@ -2627,10 +2541,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(srs)(unsigned int inst, int index)
2627 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst)); 2541 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
2628 ldst_inst* const inst_cream = (ldst_inst*)inst_base->component; 2542 ldst_inst* const inst_cream = (ldst_inst*)inst_base->component;
2629 2543
2630 inst_base->cond = AL; 2544 inst_base->cond = AL;
2631 inst_base->idx = index; 2545 inst_base->idx = index;
2632 inst_base->br = NON_BRANCH; 2546 inst_base->br = NON_BRANCH;
2633 inst_base->load_r15 = 0;
2634 2547
2635 inst_cream->inst = inst; 2548 inst_cream->inst = inst;
2636 inst_cream->get_addr = get_calc_addr_op(inst); 2549 inst_cream->get_addr = get_calc_addr_op(inst);
@@ -2644,9 +2557,8 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(ssat)(unsigned int inst, int index)
2644 ssat_inst* const inst_cream = (ssat_inst*)inst_base->component; 2557 ssat_inst* const inst_cream = (ssat_inst*)inst_base->component;
2645 2558
2646 inst_base->cond = BITS(inst, 28, 31); 2559 inst_base->cond = BITS(inst, 28, 31);
2647 inst_base->idx = index; 2560 inst_base->idx = index;
2648 inst_base->br = NON_BRANCH; 2561 inst_base->br = NON_BRANCH;
2649 inst_base->load_r15 = 0;
2650 2562
2651 inst_cream->Rn = BITS(inst, 0, 3); 2563 inst_cream->Rn = BITS(inst, 0, 3);
2652 inst_cream->Rd = BITS(inst, 12, 15); 2564 inst_cream->Rd = BITS(inst, 12, 15);
@@ -2661,10 +2573,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(ssat16)(unsigned int inst, int index)
2661 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ssat_inst)); 2573 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ssat_inst));
2662 ssat_inst* const inst_cream = (ssat_inst*)inst_base->component; 2574 ssat_inst* const inst_cream = (ssat_inst*)inst_base->component;
2663 2575
2664 inst_base->cond = BITS(inst, 28, 31); 2576 inst_base->cond = BITS(inst, 28, 31);
2665 inst_base->idx = index; 2577 inst_base->idx = index;
2666 inst_base->br = NON_BRANCH; 2578 inst_base->br = NON_BRANCH;
2667 inst_base->load_r15 = 0;
2668 2579
2669 inst_cream->Rn = BITS(inst, 0, 3); 2580 inst_cream->Rn = BITS(inst, 0, 3);
2670 inst_cream->Rd = BITS(inst, 12, 15); 2581 inst_cream->Rd = BITS(inst, 12, 15);
@@ -2700,17 +2611,14 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtb)(unsigned int inst, int index)
2700 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtb_inst)); 2611 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtb_inst));
2701 sxtb_inst *inst_cream = (sxtb_inst *)inst_base->component; 2612 sxtb_inst *inst_cream = (sxtb_inst *)inst_base->component;
2702 2613
2703 inst_base->cond = BITS(inst, 28, 31); 2614 inst_base->cond = BITS(inst, 28, 31);
2704 inst_base->idx = index; 2615 inst_base->idx = index;
2705 inst_base->br = NON_BRANCH; 2616 inst_base->br = NON_BRANCH;
2706 inst_base->load_r15 = 0;
2707 2617
2708 inst_cream->Rd = BITS(inst, 12, 15); 2618 inst_cream->Rd = BITS(inst, 12, 15);
2709 inst_cream->Rm = BITS(inst, 0, 3); 2619 inst_cream->Rm = BITS(inst, 0, 3);
2710 inst_cream->rotate = BITS(inst, 10, 11); 2620 inst_cream->rotate = BITS(inst, 10, 11);
2711 2621
2712 if (CHECK_RM)
2713 inst_base->load_r15 = 1;
2714 return inst_base; 2622 return inst_base;
2715} 2623}
2716static ARM_INST_PTR INTERPRETER_TRANSLATE(str)(unsigned int inst, int index) 2624static ARM_INST_PTR INTERPRETER_TRANSLATE(str)(unsigned int inst, int index)
@@ -2735,17 +2643,14 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtb)(unsigned int inst, int index)
2735 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxth_inst)); 2643 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxth_inst));
2736 uxth_inst *inst_cream = (uxth_inst *)inst_base->component; 2644 uxth_inst *inst_cream = (uxth_inst *)inst_base->component;
2737 2645
2738 inst_base->cond = BITS(inst, 28, 31); 2646 inst_base->cond = BITS(inst, 28, 31);
2739 inst_base->idx = index; 2647 inst_base->idx = index;
2740 inst_base->br = NON_BRANCH; 2648 inst_base->br = NON_BRANCH;
2741 inst_base->load_r15 = 0;
2742 2649
2743 inst_cream->Rd = BITS(inst, 12, 15); 2650 inst_cream->Rd = BITS(inst, 12, 15);
2744 inst_cream->rotate = BITS(inst, 10, 11); 2651 inst_cream->rotate = BITS(inst, 10, 11);
2745 inst_cream->Rm = BITS(inst, 0, 3); 2652 inst_cream->Rm = BITS(inst, 0, 3);
2746 2653
2747 if (CHECK_RM)
2748 inst_base->load_r15 = 1;
2749 return inst_base; 2654 return inst_base;
2750} 2655}
2751static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab)(unsigned int inst, int index) 2656static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab)(unsigned int inst, int index)
@@ -2753,10 +2658,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab)(unsigned int inst, int index)
2753 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxtab_inst)); 2658 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(uxtab_inst));
2754 uxtab_inst *inst_cream = (uxtab_inst *)inst_base->component; 2659 uxtab_inst *inst_cream = (uxtab_inst *)inst_base->component;
2755 2660
2756 inst_base->cond = BITS(inst, 28, 31); 2661 inst_base->cond = BITS(inst, 28, 31);
2757 inst_base->idx = index; 2662 inst_base->idx = index;
2758 inst_base->br = NON_BRANCH; 2663 inst_base->br = NON_BRANCH;
2759 inst_base->load_r15 = 0;
2760 2664
2761 inst_cream->Rd = BITS(inst, 12, 15); 2665 inst_cream->Rd = BITS(inst, 12, 15);
2762 inst_cream->rotate = BITS(inst, 10, 11); 2666 inst_cream->rotate = BITS(inst, 10, 11);
@@ -2899,10 +2803,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sub)(unsigned int inst, int index)
2899 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sub_inst)); 2803 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sub_inst));
2900 sub_inst *inst_cream = (sub_inst *)inst_base->component; 2804 sub_inst *inst_cream = (sub_inst *)inst_base->component;
2901 2805
2902 inst_base->cond = BITS(inst, 28, 31); 2806 inst_base->cond = BITS(inst, 28, 31);
2903 inst_base->idx = index; 2807 inst_base->idx = index;
2904 inst_base->br = NON_BRANCH; 2808 inst_base->br = NON_BRANCH;
2905 inst_base->load_r15 = 0;
2906 2809
2907 inst_cream->I = BIT(inst, 25); 2810 inst_cream->I = BIT(inst, 25);
2908 inst_cream->S = BIT(inst, 20); 2811 inst_cream->S = BIT(inst, 20);
@@ -2910,11 +2813,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sub)(unsigned int inst, int index)
2910 inst_cream->Rd = BITS(inst, 12, 15); 2813 inst_cream->Rd = BITS(inst, 12, 15);
2911 inst_cream->shifter_operand = BITS(inst, 0, 11); 2814 inst_cream->shifter_operand = BITS(inst, 0, 11);
2912 inst_cream->shtop_func = get_shtop(inst); 2815 inst_cream->shtop_func = get_shtop(inst);
2913 if (inst_cream->Rd == 15) { 2816
2817 if (inst_cream->Rd == 15)
2914 inst_base->br = INDIRECT_BRANCH; 2818 inst_base->br = INDIRECT_BRANCH;
2915 }
2916 if (CHECK_RN)
2917 inst_base->load_r15 = 1;
2918 2819
2919 return inst_base; 2820 return inst_base;
2920} 2821}
@@ -2969,10 +2870,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab)(unsigned int inst, int index){
2969 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtab_inst)); 2870 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtab_inst));
2970 sxtab_inst *inst_cream = (sxtab_inst *)inst_base->component; 2871 sxtab_inst *inst_cream = (sxtab_inst *)inst_base->component;
2971 2872
2972 inst_base->cond = BITS(inst, 28, 31); 2873 inst_base->cond = BITS(inst, 28, 31);
2973 inst_base->idx = index; 2874 inst_base->idx = index;
2974 inst_base->br = NON_BRANCH; 2875 inst_base->br = NON_BRANCH;
2975 inst_base->load_r15 = 0;
2976 2876
2977 inst_cream->Rd = BITS(inst, 12, 15); 2877 inst_cream->Rd = BITS(inst, 12, 15);
2978 inst_cream->rotate = BITS(inst, 10, 11); 2878 inst_cream->rotate = BITS(inst, 10, 11);
@@ -2987,10 +2887,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab16)(unsigned int inst, int index)
2987 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(sxtab_inst)); 2887 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(sxtab_inst));
2988 sxtab_inst* const inst_cream = (sxtab_inst*)inst_base->component; 2888 sxtab_inst* const inst_cream = (sxtab_inst*)inst_base->component;
2989 2889
2990 inst_base->cond = BITS(inst, 28, 31); 2890 inst_base->cond = BITS(inst, 28, 31);
2991 inst_base->idx = index; 2891 inst_base->idx = index;
2992 inst_base->br = NON_BRANCH; 2892 inst_base->br = NON_BRANCH;
2993 inst_base->load_r15 = 0;
2994 2893
2995 inst_cream->Rm = BITS(inst, 0, 3); 2894 inst_cream->Rm = BITS(inst, 0, 3);
2996 inst_cream->Rn = BITS(inst, 16, 19); 2895 inst_cream->Rn = BITS(inst, 16, 19);
@@ -3008,10 +2907,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtah)(unsigned int inst, int index) {
3008 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtah_inst)); 2907 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(sxtah_inst));
3009 sxtah_inst *inst_cream = (sxtah_inst *)inst_base->component; 2908 sxtah_inst *inst_cream = (sxtah_inst *)inst_base->component;
3010 2909
3011 inst_base->cond = BITS(inst, 28, 31); 2910 inst_base->cond = BITS(inst, 28, 31);
3012 inst_base->idx = index; 2911 inst_base->idx = index;
3013 inst_base->br = NON_BRANCH; 2912 inst_base->br = NON_BRANCH;
3014 inst_base->load_r15 = 0;
3015 2913
3016 inst_cream->Rd = BITS(inst, 12, 15); 2914 inst_cream->Rd = BITS(inst, 12, 15);
3017 inst_cream->rotate = BITS(inst, 10, 11); 2915 inst_cream->rotate = BITS(inst, 10, 11);
@@ -3026,18 +2924,15 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(teq)(unsigned int inst, int index)
3026 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(teq_inst)); 2924 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(teq_inst));
3027 teq_inst *inst_cream = (teq_inst *)inst_base->component; 2925 teq_inst *inst_cream = (teq_inst *)inst_base->component;
3028 2926
3029 inst_base->cond = BITS(inst, 28, 31); 2927 inst_base->cond = BITS(inst, 28, 31);
3030 inst_base->idx = index; 2928 inst_base->idx = index;
3031 inst_base->br = NON_BRANCH; 2929 inst_base->br = NON_BRANCH;
3032 inst_base->load_r15 = 0;
3033 2930
3034 inst_cream->I = BIT(inst, 25); 2931 inst_cream->I = BIT(inst, 25);
3035 inst_cream->Rn = BITS(inst, 16, 19); 2932 inst_cream->Rn = BITS(inst, 16, 19);
3036 inst_cream->shifter_operand = BITS(inst, 0, 11); 2933 inst_cream->shifter_operand = BITS(inst, 0, 11);
3037 inst_cream->shtop_func = get_shtop(inst); 2934 inst_cream->shtop_func = get_shtop(inst);
3038 2935
3039 if (CHECK_RN)
3040 inst_base->load_r15 = 1;
3041 return inst_base; 2936 return inst_base;
3042} 2937}
3043static ARM_INST_PTR INTERPRETER_TRANSLATE(tst)(unsigned int inst, int index) 2938static ARM_INST_PTR INTERPRETER_TRANSLATE(tst)(unsigned int inst, int index)
@@ -3045,23 +2940,20 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(tst)(unsigned int inst, int index)
3045 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(tst_inst)); 2940 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(tst_inst));
3046 tst_inst *inst_cream = (tst_inst *)inst_base->component; 2941 tst_inst *inst_cream = (tst_inst *)inst_base->component;
3047 2942
3048 inst_base->cond = BITS(inst, 28, 31); 2943 inst_base->cond = BITS(inst, 28, 31);
3049 inst_base->idx = index; 2944 inst_base->idx = index;
3050 inst_base->br = NON_BRANCH; 2945 inst_base->br = NON_BRANCH;
3051 inst_base->load_r15 = 0;
3052 2946
3053 inst_cream->I = BIT(inst, 25); 2947 inst_cream->I = BIT(inst, 25);
3054 inst_cream->S = BIT(inst, 20); 2948 inst_cream->S = BIT(inst, 20);
3055 inst_cream->Rn = BITS(inst, 16, 19); 2949 inst_cream->Rn = BITS(inst, 16, 19);
3056 inst_cream->Rd = BITS(inst, 12, 15); 2950 inst_cream->Rd = BITS(inst, 12, 15);
3057 inst_cream->shifter_operand = BITS(inst, 0, 11); 2951 inst_cream->shifter_operand = BITS(inst, 0, 11);
3058 inst_cream->shtop_func = get_shtop(inst); 2952 inst_cream->shtop_func = get_shtop(inst);
3059 if (inst_cream->Rd == 15) { 2953
2954 if (inst_cream->Rd == 15)
3060 inst_base->br = INDIRECT_BRANCH; 2955 inst_base->br = INDIRECT_BRANCH;
3061 }
3062 2956
3063 if (CHECK_RN)
3064 inst_base->load_r15 = 1;
3065 return inst_base; 2957 return inst_base;
3066} 2958}
3067 2959
@@ -3070,10 +2962,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(uadd8)(unsigned int inst, int index)
3070 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); 2962 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
3071 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; 2963 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
3072 2964
3073 inst_base->cond = BITS(inst, 28, 31); 2965 inst_base->cond = BITS(inst, 28, 31);
3074 inst_base->idx = index; 2966 inst_base->idx = index;
3075 inst_base->br = NON_BRANCH; 2967 inst_base->br = NON_BRANCH;
3076 inst_base->load_r15 = 0;
3077 2968
3078 inst_cream->op1 = BITS(inst, 20, 21); 2969 inst_cream->op1 = BITS(inst, 20, 21);
3079 inst_cream->op2 = BITS(inst, 5, 7); 2970 inst_cream->op2 = BITS(inst, 5, 7);
@@ -3109,10 +3000,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd8)(unsigned int inst, int index)
3109 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); 3000 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
3110 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; 3001 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
3111 3002
3112 inst_base->cond = BITS(inst, 28, 31); 3003 inst_base->cond = BITS(inst, 28, 31);
3113 inst_base->idx = index; 3004 inst_base->idx = index;
3114 inst_base->br = NON_BRANCH; 3005 inst_base->br = NON_BRANCH;
3115 inst_base->load_r15 = 0;
3116 3006
3117 inst_cream->op1 = BITS(inst, 20, 21); 3007 inst_cream->op1 = BITS(inst, 20, 21);
3118 inst_cream->op2 = BITS(inst, 5, 7); 3008 inst_cream->op2 = BITS(inst, 5, 7);
@@ -3147,19 +3037,15 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(umaal)(unsigned int inst, int index)
3147 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(umaal_inst)); 3037 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(umaal_inst));
3148 umaal_inst* const inst_cream = (umaal_inst*)inst_base->component; 3038 umaal_inst* const inst_cream = (umaal_inst*)inst_base->component;
3149 3039
3150 inst_base->cond = BITS(inst, 28, 31); 3040 inst_base->cond = BITS(inst, 28, 31);
3151 inst_base->idx = index; 3041 inst_base->idx = index;
3152 inst_base->br = NON_BRANCH; 3042 inst_base->br = NON_BRANCH;
3153 inst_base->load_r15 = 0;
3154 3043
3155 inst_cream->Rm = BITS(inst, 8, 11); 3044 inst_cream->Rm = BITS(inst, 8, 11);
3156 inst_cream->Rn = BITS(inst, 0, 3); 3045 inst_cream->Rn = BITS(inst, 0, 3);
3157 inst_cream->RdLo = BITS(inst, 12, 15); 3046 inst_cream->RdLo = BITS(inst, 12, 15);
3158 inst_cream->RdHi = BITS(inst, 16, 19); 3047 inst_cream->RdHi = BITS(inst, 16, 19);
3159 3048
3160 if (CHECK_RM || CHECK_RN)
3161 inst_base->load_r15 = 1;
3162
3163 return inst_base; 3049 return inst_base;
3164} 3050}
3165static ARM_INST_PTR INTERPRETER_TRANSLATE(umlal)(unsigned int inst, int index) 3051static ARM_INST_PTR INTERPRETER_TRANSLATE(umlal)(unsigned int inst, int index)
@@ -3167,10 +3053,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(umlal)(unsigned int inst, int index)
3167 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umlal_inst)); 3053 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umlal_inst));
3168 umlal_inst *inst_cream = (umlal_inst *)inst_base->component; 3054 umlal_inst *inst_cream = (umlal_inst *)inst_base->component;
3169 3055
3170 inst_base->cond = BITS(inst, 28, 31); 3056 inst_base->cond = BITS(inst, 28, 31);
3171 inst_base->idx = index; 3057 inst_base->idx = index;
3172 inst_base->br = NON_BRANCH; 3058 inst_base->br = NON_BRANCH;
3173 inst_base->load_r15 = 0;
3174 3059
3175 inst_cream->S = BIT(inst, 20); 3060 inst_cream->S = BIT(inst, 20);
3176 inst_cream->Rm = BITS(inst, 0, 3); 3061 inst_cream->Rm = BITS(inst, 0, 3);
@@ -3178,9 +3063,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(umlal)(unsigned int inst, int index)
3178 inst_cream->RdHi = BITS(inst, 16, 19); 3063 inst_cream->RdHi = BITS(inst, 16, 19);
3179 inst_cream->RdLo = BITS(inst, 12, 15); 3064 inst_cream->RdLo = BITS(inst, 12, 15);
3180 3065
3181 if (CHECK_RM || CHECK_RS)
3182 inst_base->load_r15 = 1;
3183
3184 return inst_base; 3066 return inst_base;
3185} 3067}
3186static ARM_INST_PTR INTERPRETER_TRANSLATE(umull)(unsigned int inst, int index) 3068static ARM_INST_PTR INTERPRETER_TRANSLATE(umull)(unsigned int inst, int index)
@@ -3188,10 +3070,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(umull)(unsigned int inst, int index)
3188 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umull_inst)); 3070 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(umull_inst));
3189 umull_inst *inst_cream = (umull_inst *)inst_base->component; 3071 umull_inst *inst_cream = (umull_inst *)inst_base->component;
3190 3072
3191 inst_base->cond = BITS(inst, 28, 31); 3073 inst_base->cond = BITS(inst, 28, 31);
3192 inst_base->idx = index; 3074 inst_base->idx = index;
3193 inst_base->br = NON_BRANCH; 3075 inst_base->br = NON_BRANCH;
3194 inst_base->load_r15 = 0;
3195 3076
3196 inst_cream->S = BIT(inst, 20); 3077 inst_cream->S = BIT(inst, 20);
3197 inst_cream->Rm = BITS(inst, 0, 3); 3078 inst_cream->Rm = BITS(inst, 0, 3);
@@ -3199,8 +3080,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(umull)(unsigned int inst, int index)
3199 inst_cream->RdHi = BITS(inst, 16, 19); 3080 inst_cream->RdHi = BITS(inst, 16, 19);
3200 inst_cream->RdLo = BITS(inst, 12, 15); 3081 inst_cream->RdLo = BITS(inst, 12, 15);
3201 3082
3202 if (CHECK_RM || CHECK_RS)
3203 inst_base->load_r15 = 1;
3204 return inst_base; 3083 return inst_base;
3205} 3084}
3206 3085
@@ -3270,10 +3149,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd8)(unsigned int inst, int index)
3270 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); 3149 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
3271 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; 3150 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
3272 3151
3273 inst_base->cond = BITS(inst, 28, 31); 3152 inst_base->cond = BITS(inst, 28, 31);
3274 inst_base->idx = index; 3153 inst_base->idx = index;
3275 inst_base->br = NON_BRANCH; 3154 inst_base->br = NON_BRANCH;
3276 inst_base->load_r15 = 0;
3277 3155
3278 inst_cream->Rm = BITS(inst, 0, 3); 3156 inst_cream->Rm = BITS(inst, 0, 3);
3279 inst_cream->Rn = BITS(inst, 16, 19); 3157 inst_cream->Rn = BITS(inst, 16, 19);
@@ -3308,10 +3186,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(usada8)(unsigned int inst, int index)
3308 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst)); 3186 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(generic_arm_inst));
3309 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component; 3187 generic_arm_inst* const inst_cream = (generic_arm_inst*)inst_base->component;
3310 3188
3311 inst_base->cond = BITS(inst, 28, 31); 3189 inst_base->cond = BITS(inst, 28, 31);
3312 inst_base->idx = index; 3190 inst_base->idx = index;
3313 inst_base->br = NON_BRANCH; 3191 inst_base->br = NON_BRANCH;
3314 inst_base->load_r15 = 0;
3315 3192
3316 inst_cream->op1 = BITS(inst, 20, 24); 3193 inst_cream->op1 = BITS(inst, 20, 24);
3317 inst_cream->op2 = BITS(inst, 5, 7); 3194 inst_cream->op2 = BITS(inst, 5, 7);
@@ -3340,10 +3217,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab16)(unsigned int inst, int index)
3340 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(uxtab_inst)); 3217 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(uxtab_inst));
3341 uxtab_inst* const inst_cream = (uxtab_inst*)inst_base->component; 3218 uxtab_inst* const inst_cream = (uxtab_inst*)inst_base->component;
3342 3219
3343 inst_base->cond = BITS(inst, 28, 31); 3220 inst_base->cond = BITS(inst, 28, 31);
3344 inst_base->idx = index; 3221 inst_base->idx = index;
3345 inst_base->br = NON_BRANCH; 3222 inst_base->br = NON_BRANCH;
3346 inst_base->load_r15 = 0;
3347 3223
3348 inst_cream->Rm = BITS(inst, 0, 3); 3224 inst_cream->Rm = BITS(inst, 0, 3);
3349 inst_cream->Rn = BITS(inst, 16, 19); 3225 inst_cream->Rn = BITS(inst, 16, 19);
@@ -3361,10 +3237,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(wfe)(unsigned int inst, int index)
3361{ 3237{
3362 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst)); 3238 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst));
3363 3239
3364 inst_base->cond = BITS(inst, 28, 31); 3240 inst_base->cond = BITS(inst, 28, 31);
3365 inst_base->idx = index; 3241 inst_base->idx = index;
3366 inst_base->br = NON_BRANCH; 3242 inst_base->br = NON_BRANCH;
3367 inst_base->load_r15 = 0;
3368 3243
3369 return inst_base; 3244 return inst_base;
3370} 3245}
@@ -3372,10 +3247,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(wfi)(unsigned int inst, int index)
3372{ 3247{
3373 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst)); 3248 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst));
3374 3249
3375 inst_base->cond = BITS(inst, 28, 31); 3250 inst_base->cond = BITS(inst, 28, 31);
3376 inst_base->idx = index; 3251 inst_base->idx = index;
3377 inst_base->br = NON_BRANCH; 3252 inst_base->br = NON_BRANCH;
3378 inst_base->load_r15 = 0;
3379 3253
3380 return inst_base; 3254 return inst_base;
3381} 3255}
@@ -3383,10 +3257,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(yield)(unsigned int inst, int index)
3383{ 3257{
3384 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst)); 3258 arm_inst* const inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst));
3385 3259
3386 inst_base->cond = BITS(inst, 28, 31); 3260 inst_base->cond = BITS(inst, 28, 31);
3387 inst_base->idx = index; 3261 inst_base->idx = index;
3388 inst_base->br = NON_BRANCH; 3262 inst_base->br = NON_BRANCH;
3389 inst_base->load_r15 = 0;
3390 3263
3391 return inst_base; 3264 return inst_base;
3392} 3265}
@@ -3617,7 +3490,7 @@ enum {
3617 FETCH_FAILURE 3490 FETCH_FAILURE
3618}; 3491};
3619 3492
3620static tdstate decode_thumb_instr(ARMul_State* cpu, u32 inst, u32 addr, u32* arm_inst, u32* inst_size, ARM_INST_PTR* ptr_inst_base) { 3493static tdstate decode_thumb_instr(u32 inst, u32 addr, u32* arm_inst, u32* inst_size, ARM_INST_PTR* ptr_inst_base) {
3621 // Check if in Thumb mode 3494 // Check if in Thumb mode
3622 tdstate ret = thumb_translate (addr, inst, arm_inst, inst_size); 3495 tdstate ret = thumb_translate (addr, inst, arm_inst, inst_size);
3623 if(ret == t_branch){ 3496 if(ret == t_branch){
@@ -3708,8 +3581,7 @@ static int InterpreterTranslate(ARMul_State* cpu, int& bb_start, u32 addr) {
3708 // If we are in thumb instruction, we will translate one thumb to one corresponding arm instruction 3581 // If we are in thumb instruction, we will translate one thumb to one corresponding arm instruction
3709 if (cpu->TFlag) { 3582 if (cpu->TFlag) {
3710 uint32_t arm_inst; 3583 uint32_t arm_inst;
3711 tdstate state; 3584 tdstate state = decode_thumb_instr(inst, phys_addr, &arm_inst, &inst_size, &inst_base);
3712 state = decode_thumb_instr(cpu, inst, phys_addr, &arm_inst, &inst_size, &inst_base);
3713 3585
3714 // We have translated the branch instruction of thumb in thumb decoder 3586 // We have translated the branch instruction of thumb in thumb decoder
3715 if(state == t_branch){ 3587 if(state == t_branch){
@@ -4460,7 +4332,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
4460 { 4332 {
4461 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { 4333 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
4462 ldst_inst* inst_cream = (ldst_inst*)inst_base->component; 4334 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
4463 inst_cream->get_addr(cpu, inst_cream->inst, addr, 1); 4335 inst_cream->get_addr(cpu, inst_cream->inst, addr);
4464 4336
4465 unsigned int inst = inst_cream->inst; 4337 unsigned int inst = inst_cream->inst;
4466 if (BIT(inst, 22) && !BIT(inst, 15)) { 4338 if (BIT(inst, 22) && !BIT(inst, 15)) {
@@ -4549,7 +4421,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
4549 LDR_INST: 4421 LDR_INST:
4550 { 4422 {
4551 ldst_inst *inst_cream = (ldst_inst *)inst_base->component; 4423 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
4552 inst_cream->get_addr(cpu, inst_cream->inst, addr, 1); 4424 inst_cream->get_addr(cpu, inst_cream->inst, addr);
4553 4425
4554 unsigned int value = ReadMemory32(cpu, addr); 4426 unsigned int value = ReadMemory32(cpu, addr);
4555 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value; 4427 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value;
@@ -4571,7 +4443,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
4571 { 4443 {
4572 if (CondPassed(cpu, inst_base->cond)) { 4444 if (CondPassed(cpu, inst_base->cond)) {
4573 ldst_inst *inst_cream = (ldst_inst *)inst_base->component; 4445 ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
4574 inst_cream->get_addr(cpu, inst_cream->inst, addr, 1); 4446 inst_cream->get_addr(cpu, inst_cream->inst, addr);
4575 4447
4576 unsigned int value = ReadMemory32(cpu, addr); 4448 unsigned int value = ReadMemory32(cpu, addr);
4577 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value; 4449 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value;
@@ -4617,7 +4489,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
4617 { 4489 {
4618 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { 4490 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
4619 ldst_inst* inst_cream = (ldst_inst*)inst_base->component; 4491 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
4620 inst_cream->get_addr(cpu, inst_cream->inst, addr, 1); 4492 inst_cream->get_addr(cpu, inst_cream->inst, addr);
4621 4493
4622 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = Memory::Read8(addr); 4494 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = Memory::Read8(addr);
4623 4495
@@ -4635,7 +4507,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
4635 { 4507 {
4636 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { 4508 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
4637 ldst_inst* inst_cream = (ldst_inst*)inst_base->component; 4509 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
4638 inst_cream->get_addr(cpu, inst_cream->inst, addr, 1); 4510 inst_cream->get_addr(cpu, inst_cream->inst, addr);
4639 4511
4640 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = Memory::Read8(addr); 4512 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = Memory::Read8(addr);
4641 4513
@@ -4654,7 +4526,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
4654 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { 4526 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
4655 ldst_inst* inst_cream = (ldst_inst*)inst_base->component; 4527 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
4656 // Should check if RD is even-numbered, Rd != 14, addr[0:1] == 0, (CP15_reg1_U == 1 || addr[2] == 0) 4528 // Should check if RD is even-numbered, Rd != 14, addr[0:1] == 0, (CP15_reg1_U == 1 || addr[2] == 0)
4657 inst_cream->get_addr(cpu, inst_cream->inst, addr, 1); 4529 inst_cream->get_addr(cpu, inst_cream->inst, addr);
4658 4530
4659 // The 3DS doesn't have LPAE (Large Physical Access Extension), so it 4531 // The 3DS doesn't have LPAE (Large Physical Access Extension), so it
4660 // wouldn't do this as a single read. 4532 // wouldn't do this as a single read.
@@ -4755,7 +4627,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
4755 { 4627 {
4756 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { 4628 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
4757 ldst_inst* inst_cream = (ldst_inst*)inst_base->component; 4629 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
4758 inst_cream->get_addr(cpu, inst_cream->inst, addr, 1); 4630 inst_cream->get_addr(cpu, inst_cream->inst, addr);
4759 4631
4760 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = ReadMemory16(cpu, addr); 4632 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = ReadMemory16(cpu, addr);
4761 if (BITS(inst_cream->inst, 12, 15) == 15) { 4633 if (BITS(inst_cream->inst, 12, 15) == 15) {
@@ -4772,7 +4644,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
4772 { 4644 {
4773 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { 4645 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
4774 ldst_inst* inst_cream = (ldst_inst*)inst_base->component; 4646 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
4775 inst_cream->get_addr(cpu, inst_cream->inst, addr, 1); 4647 inst_cream->get_addr(cpu, inst_cream->inst, addr);
4776 unsigned int value = Memory::Read8(addr); 4648 unsigned int value = Memory::Read8(addr);
4777 if (BIT(value, 7)) { 4649 if (BIT(value, 7)) {
4778 value |= 0xffffff00; 4650 value |= 0xffffff00;
@@ -4792,7 +4664,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
4792 { 4664 {
4793 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { 4665 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
4794 ldst_inst* inst_cream = (ldst_inst*)inst_base->component; 4666 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
4795 inst_cream->get_addr(cpu, inst_cream->inst, addr, 1); 4667 inst_cream->get_addr(cpu, inst_cream->inst, addr);
4796 4668
4797 unsigned int value = ReadMemory16(cpu, addr); 4669 unsigned int value = ReadMemory16(cpu, addr);
4798 if (BIT(value, 15)) { 4670 if (BIT(value, 15)) {
@@ -4813,7 +4685,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
4813 { 4685 {
4814 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { 4686 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
4815 ldst_inst* inst_cream = (ldst_inst*)inst_base->component; 4687 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
4816 inst_cream->get_addr(cpu, inst_cream->inst, addr, 1); 4688 inst_cream->get_addr(cpu, inst_cream->inst, addr);
4817 4689
4818 unsigned int value = ReadMemory32(cpu, addr); 4690 unsigned int value = ReadMemory32(cpu, addr);
4819 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value; 4691 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value;
@@ -5316,7 +5188,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
5316 ldst_inst* const inst_cream = (ldst_inst*)inst_base->component; 5188 ldst_inst* const inst_cream = (ldst_inst*)inst_base->component;
5317 5189
5318 u32 address = 0; 5190 u32 address = 0;
5319 inst_cream->get_addr(cpu, inst_cream->inst, address, 1); 5191 inst_cream->get_addr(cpu, inst_cream->inst, address);
5320 5192
5321 cpu->Cpsr = ReadMemory32(cpu, address); 5193 cpu->Cpsr = ReadMemory32(cpu, address);
5322 cpu->Reg[15] = ReadMemory32(cpu, address + 4); 5194 cpu->Reg[15] = ReadMemory32(cpu, address + 4);
@@ -5984,7 +5856,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
5984 ldst_inst* const inst_cream = (ldst_inst*)inst_base->component; 5856 ldst_inst* const inst_cream = (ldst_inst*)inst_base->component;
5985 5857
5986 u32 address = 0; 5858 u32 address = 0;
5987 inst_cream->get_addr(cpu, inst_cream->inst, address, 1); 5859 inst_cream->get_addr(cpu, inst_cream->inst, address);
5988 5860
5989 WriteMemory32(cpu, address + 0, cpu->Reg[14]); 5861 WriteMemory32(cpu, address + 0, cpu->Reg[14]);
5990 WriteMemory32(cpu, address + 4, cpu->Spsr_copy); 5862 WriteMemory32(cpu, address + 4, cpu->Spsr_copy);
@@ -6068,7 +5940,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
6068 unsigned int Rn = BITS(inst, 16, 19); 5940 unsigned int Rn = BITS(inst, 16, 19);
6069 unsigned int old_RN = cpu->Reg[Rn]; 5941 unsigned int old_RN = cpu->Reg[Rn];
6070 5942
6071 inst_cream->get_addr(cpu, inst_cream->inst, addr, 0); 5943 inst_cream->get_addr(cpu, inst_cream->inst, addr);
6072 if (BIT(inst_cream->inst, 22) == 1) { 5944 if (BIT(inst_cream->inst, 22) == 1) {
6073 for (int i = 0; i < 13; i++) { 5945 for (int i = 0; i < 13; i++) {
6074 if (BIT(inst_cream->inst, i)) { 5946 if (BIT(inst_cream->inst, i)) {
@@ -6139,7 +6011,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
6139 { 6011 {
6140 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { 6012 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
6141 ldst_inst* inst_cream = (ldst_inst*)inst_base->component; 6013 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
6142 inst_cream->get_addr(cpu, inst_cream->inst, addr, 0); 6014 inst_cream->get_addr(cpu, inst_cream->inst, addr);
6143 6015
6144 unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)]; 6016 unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)];
6145 WriteMemory32(cpu, addr, value); 6017 WriteMemory32(cpu, addr, value);
@@ -6177,7 +6049,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
6177 { 6049 {
6178 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { 6050 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
6179 ldst_inst* inst_cream = (ldst_inst*)inst_base->component; 6051 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
6180 inst_cream->get_addr(cpu, inst_cream->inst, addr, 0); 6052 inst_cream->get_addr(cpu, inst_cream->inst, addr);
6181 unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)] & 0xff; 6053 unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)] & 0xff;
6182 Memory::Write8(addr, value); 6054 Memory::Write8(addr, value);
6183 } 6055 }
@@ -6190,7 +6062,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
6190 { 6062 {
6191 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { 6063 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
6192 ldst_inst* inst_cream = (ldst_inst*)inst_base->component; 6064 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
6193 inst_cream->get_addr(cpu, inst_cream->inst, addr, 0); 6065 inst_cream->get_addr(cpu, inst_cream->inst, addr);
6194 unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)] & 0xff; 6066 unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)] & 0xff;
6195 Memory::Write8(addr, value); 6067 Memory::Write8(addr, value);
6196 } 6068 }
@@ -6203,7 +6075,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
6203 { 6075 {
6204 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { 6076 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
6205 ldst_inst* inst_cream = (ldst_inst*)inst_base->component; 6077 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
6206 inst_cream->get_addr(cpu, inst_cream->inst, addr, 0); 6078 inst_cream->get_addr(cpu, inst_cream->inst, addr);
6207 6079
6208 // The 3DS doesn't have the Large Physical Access Extension (LPAE) 6080 // The 3DS doesn't have the Large Physical Access Extension (LPAE)
6209 // so STRD wouldn't store these as a single write. 6081 // so STRD wouldn't store these as a single write.
@@ -6317,7 +6189,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
6317 { 6189 {
6318 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { 6190 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
6319 ldst_inst* inst_cream = (ldst_inst*)inst_base->component; 6191 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
6320 inst_cream->get_addr(cpu, inst_cream->inst, addr, 0); 6192 inst_cream->get_addr(cpu, inst_cream->inst, addr);
6321 6193
6322 unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)] & 0xffff; 6194 unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)] & 0xffff;
6323 WriteMemory16(cpu, addr, value); 6195 WriteMemory16(cpu, addr, value);
@@ -6331,7 +6203,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
6331 { 6203 {
6332 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { 6204 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
6333 ldst_inst* inst_cream = (ldst_inst*)inst_base->component; 6205 ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
6334 inst_cream->get_addr(cpu, inst_cream->inst, addr, 0); 6206 inst_cream->get_addr(cpu, inst_cream->inst, addr);
6335 6207
6336 unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)]; 6208 unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)];
6337 WriteMemory32(cpu, addr, value); 6209 WriteMemory32(cpu, addr, value);
diff --git a/src/core/arm/skyeye_common/vfp/vfpinstr.cpp b/src/core/arm/skyeye_common/vfp/vfpinstr.cpp
index 0f8e95d63..3ed918a93 100644
--- a/src/core/arm/skyeye_common/vfp/vfpinstr.cpp
+++ b/src/core/arm/skyeye_common/vfp/vfpinstr.cpp
@@ -24,10 +24,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmla)(unsigned int inst, int index)
24 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmla_inst)); 24 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmla_inst));
25 vmla_inst *inst_cream = (vmla_inst *)inst_base->component; 25 vmla_inst *inst_cream = (vmla_inst *)inst_base->component;
26 26
27 inst_base->cond = BITS(inst, 28, 31); 27 inst_base->cond = BITS(inst, 28, 31);
28 inst_base->idx = index; 28 inst_base->idx = index;
29 inst_base->br = NON_BRANCH; 29 inst_base->br = NON_BRANCH;
30 inst_base->load_r15 = 0;
31 30
32 inst_cream->dp_operation = BIT(inst, 8); 31 inst_cream->dp_operation = BIT(inst, 8);
33 inst_cream->instr = inst; 32 inst_cream->instr = inst;
@@ -74,10 +73,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmls)(unsigned int inst, int index)
74 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmls_inst)); 73 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmls_inst));
75 vmls_inst *inst_cream = (vmls_inst *)inst_base->component; 74 vmls_inst *inst_cream = (vmls_inst *)inst_base->component;
76 75
77 inst_base->cond = BITS(inst, 28, 31); 76 inst_base->cond = BITS(inst, 28, 31);
78 inst_base->idx = index; 77 inst_base->idx = index;
79 inst_base->br = NON_BRANCH; 78 inst_base->br = NON_BRANCH;
80 inst_base->load_r15 = 0;
81 79
82 inst_cream->dp_operation = BIT(inst, 8); 80 inst_cream->dp_operation = BIT(inst, 8);
83 inst_cream->instr = inst; 81 inst_cream->instr = inst;
@@ -124,10 +122,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmla)(unsigned int inst, int index)
124 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vnmla_inst)); 122 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vnmla_inst));
125 vnmla_inst *inst_cream = (vnmla_inst *)inst_base->component; 123 vnmla_inst *inst_cream = (vnmla_inst *)inst_base->component;
126 124
127 inst_base->cond = BITS(inst, 28, 31); 125 inst_base->cond = BITS(inst, 28, 31);
128 inst_base->idx = index; 126 inst_base->idx = index;
129 inst_base->br = NON_BRANCH; 127 inst_base->br = NON_BRANCH;
130 inst_base->load_r15 = 0;
131 128
132 inst_cream->dp_operation = BIT(inst, 8); 129 inst_cream->dp_operation = BIT(inst, 8);
133 inst_cream->instr = inst; 130 inst_cream->instr = inst;
@@ -175,10 +172,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmls)(unsigned int inst, int index)
175 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vnmls_inst)); 172 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vnmls_inst));
176 vnmls_inst *inst_cream = (vnmls_inst *)inst_base->component; 173 vnmls_inst *inst_cream = (vnmls_inst *)inst_base->component;
177 174
178 inst_base->cond = BITS(inst, 28, 31); 175 inst_base->cond = BITS(inst, 28, 31);
179 inst_base->idx = index; 176 inst_base->idx = index;
180 inst_base->br = NON_BRANCH; 177 inst_base->br = NON_BRANCH;
181 inst_base->load_r15 = 0;
182 178
183 inst_cream->dp_operation = BIT(inst, 8); 179 inst_cream->dp_operation = BIT(inst, 8);
184 inst_cream->instr = inst; 180 inst_cream->instr = inst;
@@ -225,10 +221,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmul)(unsigned int inst, int index)
225 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vnmul_inst)); 221 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vnmul_inst));
226 vnmul_inst *inst_cream = (vnmul_inst *)inst_base->component; 222 vnmul_inst *inst_cream = (vnmul_inst *)inst_base->component;
227 223
228 inst_base->cond = BITS(inst, 28, 31); 224 inst_base->cond = BITS(inst, 28, 31);
229 inst_base->idx = index; 225 inst_base->idx = index;
230 inst_base->br = NON_BRANCH; 226 inst_base->br = NON_BRANCH;
231 inst_base->load_r15 = 0;
232 227
233 inst_cream->dp_operation = BIT(inst, 8); 228 inst_cream->dp_operation = BIT(inst, 8);
234 inst_cream->instr = inst; 229 inst_cream->instr = inst;
@@ -275,10 +270,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmul)(unsigned int inst, int index)
275 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmul_inst)); 270 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmul_inst));
276 vmul_inst *inst_cream = (vmul_inst *)inst_base->component; 271 vmul_inst *inst_cream = (vmul_inst *)inst_base->component;
277 272
278 inst_base->cond = BITS(inst, 28, 31); 273 inst_base->cond = BITS(inst, 28, 31);
279 inst_base->idx = index; 274 inst_base->idx = index;
280 inst_base->br = NON_BRANCH; 275 inst_base->br = NON_BRANCH;
281 inst_base->load_r15 = 0;
282 276
283 inst_cream->dp_operation = BIT(inst, 8); 277 inst_cream->dp_operation = BIT(inst, 8);
284 inst_cream->instr = inst; 278 inst_cream->instr = inst;
@@ -325,10 +319,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vadd)(unsigned int inst, int index)
325 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vadd_inst)); 319 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vadd_inst));
326 vadd_inst *inst_cream = (vadd_inst *)inst_base->component; 320 vadd_inst *inst_cream = (vadd_inst *)inst_base->component;
327 321
328 inst_base->cond = BITS(inst, 28, 31); 322 inst_base->cond = BITS(inst, 28, 31);
329 inst_base->idx = index; 323 inst_base->idx = index;
330 inst_base->br = NON_BRANCH; 324 inst_base->br = NON_BRANCH;
331 inst_base->load_r15 = 0;
332 325
333 inst_cream->dp_operation = BIT(inst, 8); 326 inst_cream->dp_operation = BIT(inst, 8);
334 inst_cream->instr = inst; 327 inst_cream->instr = inst;
@@ -375,10 +368,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vsub)(unsigned int inst, int index)
375 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vsub_inst)); 368 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vsub_inst));
376 vsub_inst *inst_cream = (vsub_inst *)inst_base->component; 369 vsub_inst *inst_cream = (vsub_inst *)inst_base->component;
377 370
378 inst_base->cond = BITS(inst, 28, 31); 371 inst_base->cond = BITS(inst, 28, 31);
379 inst_base->idx = index; 372 inst_base->idx = index;
380 inst_base->br = NON_BRANCH; 373 inst_base->br = NON_BRANCH;
381 inst_base->load_r15 = 0;
382 374
383 inst_cream->dp_operation = BIT(inst, 8); 375 inst_cream->dp_operation = BIT(inst, 8);
384 inst_cream->instr = inst; 376 inst_cream->instr = inst;
@@ -425,10 +417,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vdiv)(unsigned int inst, int index)
425 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vdiv_inst)); 417 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vdiv_inst));
426 vdiv_inst *inst_cream = (vdiv_inst *)inst_base->component; 418 vdiv_inst *inst_cream = (vdiv_inst *)inst_base->component;
427 419
428 inst_base->cond = BITS(inst, 28, 31); 420 inst_base->cond = BITS(inst, 28, 31);
429 inst_base->idx = index; 421 inst_base->idx = index;
430 inst_base->br = NON_BRANCH; 422 inst_base->br = NON_BRANCH;
431 inst_base->load_r15 = 0;
432 423
433 inst_cream->dp_operation = BIT(inst, 8); 424 inst_cream->dp_operation = BIT(inst, 8);
434 inst_cream->instr = inst; 425 inst_cream->instr = inst;
@@ -477,10 +468,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovi)(unsigned int inst, int index)
477 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovi_inst)); 468 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovi_inst));
478 vmovi_inst *inst_cream = (vmovi_inst *)inst_base->component; 469 vmovi_inst *inst_cream = (vmovi_inst *)inst_base->component;
479 470
480 inst_base->cond = BITS(inst, 28, 31); 471 inst_base->cond = BITS(inst, 28, 31);
481 inst_base->idx = index; 472 inst_base->idx = index;
482 inst_base->br = NON_BRANCH; 473 inst_base->br = NON_BRANCH;
483 inst_base->load_r15 = 0;
484 474
485 inst_cream->single = BIT(inst, 8) == 0; 475 inst_cream->single = BIT(inst, 8) == 0;
486 inst_cream->d = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4); 476 inst_cream->d = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4);
@@ -526,10 +516,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovr)(unsigned int inst, int index)
526 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovr_inst)); 516 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovr_inst));
527 vmovr_inst *inst_cream = (vmovr_inst *)inst_base->component; 517 vmovr_inst *inst_cream = (vmovr_inst *)inst_base->component;
528 518
529 inst_base->cond = BITS(inst, 28, 31); 519 inst_base->cond = BITS(inst, 28, 31);
530 inst_base->idx = index; 520 inst_base->idx = index;
531 inst_base->br = NON_BRANCH; 521 inst_base->br = NON_BRANCH;
532 inst_base->load_r15 = 0;
533 522
534 inst_cream->single = BIT(inst, 8) == 0; 523 inst_cream->single = BIT(inst, 8) == 0;
535 inst_cream->d = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4); 524 inst_cream->d = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4);
@@ -569,10 +558,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vabs)(unsigned int inst, int index)
569 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vabs_inst)); 558 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vabs_inst));
570 vabs_inst *inst_cream = (vabs_inst *)inst_base->component; 559 vabs_inst *inst_cream = (vabs_inst *)inst_base->component;
571 560
572 inst_base->cond = BITS(inst, 28, 31); 561 inst_base->cond = BITS(inst, 28, 31);
573 inst_base->idx = index; 562 inst_base->idx = index;
574 inst_base->br = NON_BRANCH; 563 inst_base->br = NON_BRANCH;
575 inst_base->load_r15 = 0;
576 564
577 inst_cream->dp_operation = BIT(inst, 8); 565 inst_cream->dp_operation = BIT(inst, 8);
578 inst_cream->instr = inst; 566 inst_cream->instr = inst;
@@ -620,10 +608,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vneg)(unsigned int inst, int index)
620 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vneg_inst)); 608 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vneg_inst));
621 vneg_inst *inst_cream = (vneg_inst *)inst_base->component; 609 vneg_inst *inst_cream = (vneg_inst *)inst_base->component;
622 610
623 inst_base->cond = BITS(inst, 28, 31); 611 inst_base->cond = BITS(inst, 28, 31);
624 inst_base->idx = index; 612 inst_base->idx = index;
625 inst_base->br = NON_BRANCH; 613 inst_base->br = NON_BRANCH;
626 inst_base->load_r15 = 0;
627 614
628 inst_cream->dp_operation = BIT(inst, 8); 615 inst_cream->dp_operation = BIT(inst, 8);
629 inst_cream->instr = inst; 616 inst_cream->instr = inst;
@@ -670,10 +657,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vsqrt)(unsigned int inst, int index)
670 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vsqrt_inst)); 657 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vsqrt_inst));
671 vsqrt_inst *inst_cream = (vsqrt_inst *)inst_base->component; 658 vsqrt_inst *inst_cream = (vsqrt_inst *)inst_base->component;
672 659
673 inst_base->cond = BITS(inst, 28, 31); 660 inst_base->cond = BITS(inst, 28, 31);
674 inst_base->idx = index; 661 inst_base->idx = index;
675 inst_base->br = NON_BRANCH; 662 inst_base->br = NON_BRANCH;
676 inst_base->load_r15 = 0;
677 663
678 inst_cream->dp_operation = BIT(inst, 8); 664 inst_cream->dp_operation = BIT(inst, 8);
679 inst_cream->instr = inst; 665 inst_cream->instr = inst;
@@ -720,10 +706,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp)(unsigned int inst, int index)
720 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcmp_inst)); 706 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcmp_inst));
721 vcmp_inst *inst_cream = (vcmp_inst *)inst_base->component; 707 vcmp_inst *inst_cream = (vcmp_inst *)inst_base->component;
722 708
723 inst_base->cond = BITS(inst, 28, 31); 709 inst_base->cond = BITS(inst, 28, 31);
724 inst_base->idx = index; 710 inst_base->idx = index;
725 inst_base->br = NON_BRANCH; 711 inst_base->br = NON_BRANCH;
726 inst_base->load_r15 = 0;
727 712
728 inst_cream->dp_operation = BIT(inst, 8); 713 inst_cream->dp_operation = BIT(inst, 8);
729 inst_cream->instr = inst; 714 inst_cream->instr = inst;
@@ -770,10 +755,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp2)(unsigned int inst, int index)
770 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcmp2_inst)); 755 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcmp2_inst));
771 vcmp2_inst *inst_cream = (vcmp2_inst *)inst_base->component; 756 vcmp2_inst *inst_cream = (vcmp2_inst *)inst_base->component;
772 757
773 inst_base->cond = BITS(inst, 28, 31); 758 inst_base->cond = BITS(inst, 28, 31);
774 inst_base->idx = index; 759 inst_base->idx = index;
775 inst_base->br = NON_BRANCH; 760 inst_base->br = NON_BRANCH;
776 inst_base->load_r15 = 0;
777 761
778 inst_cream->dp_operation = BIT(inst, 8); 762 inst_cream->dp_operation = BIT(inst, 8);
779 inst_cream->instr = inst; 763 inst_cream->instr = inst;
@@ -820,10 +804,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbds)(unsigned int inst, int index)
820 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcvtbds_inst)); 804 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcvtbds_inst));
821 vcvtbds_inst *inst_cream = (vcvtbds_inst *)inst_base->component; 805 vcvtbds_inst *inst_cream = (vcvtbds_inst *)inst_base->component;
822 806
823 inst_base->cond = BITS(inst, 28, 31); 807 inst_base->cond = BITS(inst, 28, 31);
824 inst_base->idx = index; 808 inst_base->idx = index;
825 inst_base->br = NON_BRANCH; 809 inst_base->br = NON_BRANCH;
826 inst_base->load_r15 = 0;
827 810
828 inst_cream->dp_operation = BIT(inst, 8); 811 inst_cream->dp_operation = BIT(inst, 8);
829 inst_cream->instr = inst; 812 inst_cream->instr = inst;
@@ -872,10 +855,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbff)(unsigned int inst, int index)
872 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcvtbff_inst)); 855 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcvtbff_inst));
873 vcvtbff_inst *inst_cream = (vcvtbff_inst *)inst_base->component; 856 vcvtbff_inst *inst_cream = (vcvtbff_inst *)inst_base->component;
874 857
875 inst_base->cond = BITS(inst, 28, 31); 858 inst_base->cond = BITS(inst, 28, 31);
876 inst_base->idx = index; 859 inst_base->idx = index;
877 inst_base->br = NON_BRANCH; 860 inst_base->br = NON_BRANCH;
878 inst_base->load_r15 = 0;
879 861
880 inst_cream->dp_operation = BIT(inst, 8); 862 inst_cream->dp_operation = BIT(inst, 8);
881 inst_cream->instr = inst; 863 inst_cream->instr = inst;
@@ -922,10 +904,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbfi)(unsigned int inst, int index)
922 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcvtbfi_inst)); 904 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vcvtbfi_inst));
923 vcvtbfi_inst *inst_cream = (vcvtbfi_inst *)inst_base->component; 905 vcvtbfi_inst *inst_cream = (vcvtbfi_inst *)inst_base->component;
924 906
925 inst_base->cond = BITS(inst, 28, 31); 907 inst_base->cond = BITS(inst, 28, 31);
926 inst_base->idx = index; 908 inst_base->idx = index;
927 inst_base->br = NON_BRANCH; 909 inst_base->br = NON_BRANCH;
928 inst_base->load_r15 = 0;
929 910
930 inst_cream->dp_operation = BIT(inst, 8); 911 inst_cream->dp_operation = BIT(inst, 8);
931 inst_cream->instr = inst; 912 inst_cream->instr = inst;
@@ -979,10 +960,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrs)(unsigned int inst, int index)
979 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrs_inst)); 960 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrs_inst));
980 vmovbrs_inst *inst_cream = (vmovbrs_inst *)inst_base->component; 961 vmovbrs_inst *inst_cream = (vmovbrs_inst *)inst_base->component;
981 962
982 inst_base->cond = BITS(inst, 28, 31); 963 inst_base->cond = BITS(inst, 28, 31);
983 inst_base->idx = index; 964 inst_base->idx = index;
984 inst_base->br = NON_BRANCH; 965 inst_base->br = NON_BRANCH;
985 inst_base->load_r15 = 0;
986 966
987 inst_cream->to_arm = BIT(inst, 20) == 1; 967 inst_cream->to_arm = BIT(inst, 20) == 1;
988 inst_cream->t = BITS(inst, 12, 15); 968 inst_cream->t = BITS(inst, 12, 15);
@@ -1024,10 +1004,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmsr)(unsigned int inst, int index)
1024 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmsr_inst)); 1004 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmsr_inst));
1025 vmsr_inst *inst_cream = (vmsr_inst *)inst_base->component; 1005 vmsr_inst *inst_cream = (vmsr_inst *)inst_base->component;
1026 1006
1027 inst_base->cond = BITS(inst, 28, 31); 1007 inst_base->cond = BITS(inst, 28, 31);
1028 inst_base->idx = index; 1008 inst_base->idx = index;
1029 inst_base->br = NON_BRANCH; 1009 inst_base->br = NON_BRANCH;
1030 inst_base->load_r15 = 0;
1031 1010
1032 inst_cream->reg = BITS(inst, 16, 19); 1011 inst_cream->reg = BITS(inst, 16, 19);
1033 inst_cream->Rd = BITS(inst, 12, 15); 1012 inst_cream->Rd = BITS(inst, 12, 15);
@@ -1073,10 +1052,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrc)(unsigned int inst, int index)
1073 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrc_inst)); 1052 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrc_inst));
1074 vmovbrc_inst *inst_cream = (vmovbrc_inst *)inst_base->component; 1053 vmovbrc_inst *inst_cream = (vmovbrc_inst *)inst_base->component;
1075 1054
1076 inst_base->cond = BITS(inst, 28, 31); 1055 inst_base->cond = BITS(inst, 28, 31);
1077 inst_base->idx = index; 1056 inst_base->idx = index;
1078 inst_base->br = NON_BRANCH; 1057 inst_base->br = NON_BRANCH;
1079 inst_base->load_r15 = 0;
1080 1058
1081 inst_cream->d = BITS(inst, 16, 19)|BIT(inst, 7)<<4; 1059 inst_cream->d = BITS(inst, 16, 19)|BIT(inst, 7)<<4;
1082 inst_cream->t = BITS(inst, 12, 15); 1060 inst_cream->t = BITS(inst, 12, 15);
@@ -1118,10 +1096,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmrs)(unsigned int inst, int index)
1118 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmrs_inst)); 1096 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmrs_inst));
1119 vmrs_inst *inst_cream = (vmrs_inst *)inst_base->component; 1097 vmrs_inst *inst_cream = (vmrs_inst *)inst_base->component;
1120 1098
1121 inst_base->cond = BITS(inst, 28, 31); 1099 inst_base->cond = BITS(inst, 28, 31);
1122 inst_base->idx = index; 1100 inst_base->idx = index;
1123 inst_base->br = NON_BRANCH; 1101 inst_base->br = NON_BRANCH;
1124 inst_base->load_r15 = 0;
1125 1102
1126 inst_cream->reg = BITS(inst, 16, 19); 1103 inst_cream->reg = BITS(inst, 16, 19);
1127 inst_cream->Rt = BITS(inst, 12, 15); 1104 inst_cream->Rt = BITS(inst, 12, 15);
@@ -1202,10 +1179,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbcr)(unsigned int inst, int index)
1202 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbcr_inst)); 1179 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbcr_inst));
1203 vmovbcr_inst *inst_cream = (vmovbcr_inst *)inst_base->component; 1180 vmovbcr_inst *inst_cream = (vmovbcr_inst *)inst_base->component;
1204 1181
1205 inst_base->cond = BITS(inst, 28, 31); 1182 inst_base->cond = BITS(inst, 28, 31);
1206 inst_base->idx = index; 1183 inst_base->idx = index;
1207 inst_base->br = NON_BRANCH; 1184 inst_base->br = NON_BRANCH;
1208 inst_base->load_r15 = 0;
1209 1185
1210 inst_cream->d = BITS(inst, 16, 19)|BIT(inst, 7)<<4; 1186 inst_cream->d = BITS(inst, 16, 19)|BIT(inst, 7)<<4;
1211 inst_cream->t = BITS(inst, 12, 15); 1187 inst_cream->t = BITS(inst, 12, 15);
@@ -1254,10 +1230,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrrss)(unsigned int inst, int inde
1254 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrrss_inst)); 1230 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrrss_inst));
1255 vmovbrrss_inst *inst_cream = (vmovbrrss_inst *)inst_base->component; 1231 vmovbrrss_inst *inst_cream = (vmovbrrss_inst *)inst_base->component;
1256 1232
1257 inst_base->cond = BITS(inst, 28, 31); 1233 inst_base->cond = BITS(inst, 28, 31);
1258 inst_base->idx = index; 1234 inst_base->idx = index;
1259 inst_base->br = NON_BRANCH; 1235 inst_base->br = NON_BRANCH;
1260 inst_base->load_r15 = 0;
1261 1236
1262 inst_cream->to_arm = BIT(inst, 20) == 1; 1237 inst_cream->to_arm = BIT(inst, 20) == 1;
1263 inst_cream->t = BITS(inst, 12, 15); 1238 inst_cream->t = BITS(inst, 12, 15);
@@ -1303,10 +1278,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrrd)(unsigned int inst, int index
1303 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrrd_inst)); 1278 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovbrrd_inst));
1304 vmovbrrd_inst *inst_cream = (vmovbrrd_inst *)inst_base->component; 1279 vmovbrrd_inst *inst_cream = (vmovbrrd_inst *)inst_base->component;
1305 1280
1306 inst_base->cond = BITS(inst, 28, 31); 1281 inst_base->cond = BITS(inst, 28, 31);
1307 inst_base->idx = index; 1282 inst_base->idx = index;
1308 inst_base->br = NON_BRANCH; 1283 inst_base->br = NON_BRANCH;
1309 inst_base->load_r15 = 0;
1310 1284
1311 inst_cream->to_arm = BIT(inst, 20) == 1; 1285 inst_cream->to_arm = BIT(inst, 20) == 1;
1312 inst_cream->t = BITS(inst, 12, 15); 1286 inst_cream->t = BITS(inst, 12, 15);
@@ -1357,10 +1331,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vstr)(unsigned int inst, int index)
1357 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vstr_inst)); 1331 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vstr_inst));
1358 vstr_inst *inst_cream = (vstr_inst *)inst_base->component; 1332 vstr_inst *inst_cream = (vstr_inst *)inst_base->component;
1359 1333
1360 inst_base->cond = BITS(inst, 28, 31); 1334 inst_base->cond = BITS(inst, 28, 31);
1361 inst_base->idx = index; 1335 inst_base->idx = index;
1362 inst_base->br = NON_BRANCH; 1336 inst_base->br = NON_BRANCH;
1363 inst_base->load_r15 = 0;
1364 1337
1365 inst_cream->single = BIT(inst, 8) == 0; 1338 inst_cream->single = BIT(inst, 8) == 0;
1366 inst_cream->add = BIT(inst, 23); 1339 inst_cream->add = BIT(inst, 23);
@@ -1424,10 +1397,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vpush)(unsigned int inst, int index)
1424 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vpush_inst)); 1397 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vpush_inst));
1425 vpush_inst *inst_cream = (vpush_inst *)inst_base->component; 1398 vpush_inst *inst_cream = (vpush_inst *)inst_base->component;
1426 1399
1427 inst_base->cond = BITS(inst, 28, 31); 1400 inst_base->cond = BITS(inst, 28, 31);
1428 inst_base->idx = index; 1401 inst_base->idx = index;
1429 inst_base->br = NON_BRANCH; 1402 inst_base->br = NON_BRANCH;
1430 inst_base->load_r15 = 0;
1431 1403
1432 inst_cream->single = BIT(inst, 8) == 0; 1404 inst_cream->single = BIT(inst, 8) == 0;
1433 inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15)<<1|BIT(inst, 22) : BITS(inst, 12, 15)|BIT(inst, 22)<<4); 1405 inst_cream->d = (inst_cream->single ? BITS(inst, 12, 15)<<1|BIT(inst, 22) : BITS(inst, 12, 15)|BIT(inst, 22)<<4);
@@ -1500,10 +1472,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vstm)(unsigned int inst, int index)
1500 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vstm_inst)); 1472 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vstm_inst));
1501 vstm_inst *inst_cream = (vstm_inst *)inst_base->component; 1473 vstm_inst *inst_cream = (vstm_inst *)inst_base->component;
1502 1474
1503 inst_base->cond = BITS(inst, 28, 31); 1475 inst_base->cond = BITS(inst, 28, 31);
1504 inst_base->idx = index; 1476 inst_base->idx = index;
1505 inst_base->br = NON_BRANCH; 1477 inst_base->br = NON_BRANCH;
1506 inst_base->load_r15 = 0;
1507 1478
1508 inst_cream->single = BIT(inst, 8) == 0; 1479 inst_cream->single = BIT(inst, 8) == 0;
1509 inst_cream->add = BIT(inst, 23); 1480 inst_cream->add = BIT(inst, 23);
@@ -1579,10 +1550,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vpop)(unsigned int inst, int index)
1579 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vpop_inst)); 1550 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vpop_inst));
1580 vpop_inst *inst_cream = (vpop_inst *)inst_base->component; 1551 vpop_inst *inst_cream = (vpop_inst *)inst_base->component;
1581 1552
1582 inst_base->cond = BITS(inst, 28, 31); 1553 inst_base->cond = BITS(inst, 28, 31);
1583 inst_base->idx = index; 1554 inst_base->idx = index;
1584 inst_base->br = NON_BRANCH; 1555 inst_base->br = NON_BRANCH;
1585 inst_base->load_r15 = 0;
1586 1556
1587 inst_cream->single = BIT(inst, 8) == 0; 1557 inst_cream->single = BIT(inst, 8) == 0;
1588 inst_cream->d = (inst_cream->single ? (BITS(inst, 12, 15)<<1)|BIT(inst, 22) : BITS(inst, 12, 15)|(BIT(inst, 22)<<4)); 1558 inst_cream->d = (inst_cream->single ? (BITS(inst, 12, 15)<<1)|BIT(inst, 22) : BITS(inst, 12, 15)|(BIT(inst, 22)<<4));
@@ -1653,10 +1623,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vldr)(unsigned int inst, int index)
1653 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vldr_inst)); 1623 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vldr_inst));
1654 vldr_inst *inst_cream = (vldr_inst *)inst_base->component; 1624 vldr_inst *inst_cream = (vldr_inst *)inst_base->component;
1655 1625
1656 inst_base->cond = BITS(inst, 28, 31); 1626 inst_base->cond = BITS(inst, 28, 31);
1657 inst_base->idx = index; 1627 inst_base->idx = index;
1658 inst_base->br = NON_BRANCH; 1628 inst_base->br = NON_BRANCH;
1659 inst_base->load_r15 = 0;
1660 1629
1661 inst_cream->single = BIT(inst, 8) == 0; 1630 inst_cream->single = BIT(inst, 8) == 0;
1662 inst_cream->add = BIT(inst, 23); 1631 inst_cream->add = BIT(inst, 23);
@@ -1723,10 +1692,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vldm)(unsigned int inst, int index)
1723 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vldm_inst)); 1692 arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vldm_inst));
1724 vldm_inst *inst_cream = (vldm_inst *)inst_base->component; 1693 vldm_inst *inst_cream = (vldm_inst *)inst_base->component;
1725 1694
1726 inst_base->cond = BITS(inst, 28, 31); 1695 inst_base->cond = BITS(inst, 28, 31);
1727 inst_base->idx = index; 1696 inst_base->idx = index;
1728 inst_base->br = NON_BRANCH; 1697 inst_base->br = NON_BRANCH;
1729 inst_base->load_r15 = 0;
1730 1698
1731 inst_cream->single = BIT(inst, 8) == 0; 1699 inst_cream->single = BIT(inst, 8) == 0;
1732 inst_cream->add = BIT(inst, 23); 1700 inst_cream->add = BIT(inst, 23);
HIC SVNT DRACONES