diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/video_core/shader/decode/other.cpp | 7 | ||||
| -rw-r--r-- | src/video_core/shader/shader_ir.cpp | 5 | ||||
| -rw-r--r-- | src/video_core/shader/shader_ir.h | 3 |
3 files changed, 15 insertions, 0 deletions
diff --git a/src/video_core/shader/decode/other.cpp b/src/video_core/shader/decode/other.cpp index c0f64d7a0..856e1b3d8 100644 --- a/src/video_core/shader/decode/other.cpp +++ b/src/video_core/shader/decode/other.cpp | |||
| @@ -68,6 +68,13 @@ u32 ShaderIR::DecodeOther(NodeBlock& bb, u32 pc) { | |||
| 68 | case SystemVariable::InvocationInfo: | 68 | case SystemVariable::InvocationInfo: |
| 69 | LOG_WARNING(HW_GPU, "MOV_SYS instruction with InvocationInfo is incomplete"); | 69 | LOG_WARNING(HW_GPU, "MOV_SYS instruction with InvocationInfo is incomplete"); |
| 70 | return Immediate(0u); | 70 | return Immediate(0u); |
| 71 | case SystemVariable::Tid: { | ||
| 72 | Node value = Immediate(0); | ||
| 73 | value = BitfieldInsert(value, Operation(OperationCode::LocalInvocationIdX), 0, 9); | ||
| 74 | value = BitfieldInsert(value, Operation(OperationCode::LocalInvocationIdY), 16, 9); | ||
| 75 | value = BitfieldInsert(value, Operation(OperationCode::LocalInvocationIdZ), 26, 5); | ||
| 76 | return value; | ||
| 77 | } | ||
| 71 | case SystemVariable::TidX: | 78 | case SystemVariable::TidX: |
| 72 | return Operation(OperationCode::LocalInvocationIdX); | 79 | return Operation(OperationCode::LocalInvocationIdX); |
| 73 | case SystemVariable::TidY: | 80 | case SystemVariable::TidY: |
diff --git a/src/video_core/shader/shader_ir.cpp b/src/video_core/shader/shader_ir.cpp index 5e91fe129..1e5c7f660 100644 --- a/src/video_core/shader/shader_ir.cpp +++ b/src/video_core/shader/shader_ir.cpp | |||
| @@ -405,4 +405,9 @@ Node ShaderIR::BitfieldExtract(Node value, u32 offset, u32 bits) { | |||
| 405 | Immediate(offset), Immediate(bits)); | 405 | Immediate(offset), Immediate(bits)); |
| 406 | } | 406 | } |
| 407 | 407 | ||
| 408 | Node ShaderIR::BitfieldInsert(Node base, Node insert, u32 offset, u32 bits) { | ||
| 409 | return Operation(OperationCode::UBitfieldInsert, NO_PRECISE, base, insert, Immediate(offset), | ||
| 410 | Immediate(bits)); | ||
| 411 | } | ||
| 412 | |||
| 408 | } // namespace VideoCommon::Shader | 413 | } // namespace VideoCommon::Shader |
diff --git a/src/video_core/shader/shader_ir.h b/src/video_core/shader/shader_ir.h index 59a083d90..0509a5f88 100644 --- a/src/video_core/shader/shader_ir.h +++ b/src/video_core/shader/shader_ir.h | |||
| @@ -279,6 +279,9 @@ private: | |||
| 279 | /// Extracts a sequence of bits from a node | 279 | /// Extracts a sequence of bits from a node |
| 280 | Node BitfieldExtract(Node value, u32 offset, u32 bits); | 280 | Node BitfieldExtract(Node value, u32 offset, u32 bits); |
| 281 | 281 | ||
| 282 | /// Inserts a sequence of bits from a node | ||
| 283 | Node BitfieldInsert(Node base, Node insert, u32 offset, u32 bits); | ||
| 284 | |||
| 282 | void WriteTexInstructionFloat(NodeBlock& bb, Tegra::Shader::Instruction instr, | 285 | void WriteTexInstructionFloat(NodeBlock& bb, Tegra::Shader::Instruction instr, |
| 283 | const Node4& components); | 286 | const Node4& components); |
| 284 | 287 | ||