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-rw-r--r--src/common/common_types.h26
-rw-r--r--src/core/arm/skyeye_common/arm_regformat.h2
-rw-r--r--src/core/arm/skyeye_common/vfp/vfp.cpp20
-rw-r--r--src/core/arm/skyeye_common/vfp/vfp.h4
-rw-r--r--src/core/arm/skyeye_common/vfp/vfpinstr.cpp75
-rw-r--r--src/core/hle/service/soc_u.cpp18
6 files changed, 68 insertions, 77 deletions
diff --git a/src/common/common_types.h b/src/common/common_types.h
index f6de0adfc..c4f1d7ba4 100644
--- a/src/common/common_types.h
+++ b/src/common/common_types.h
@@ -52,32 +52,6 @@ typedef double f64; ///< 64-bit floating point
52typedef u32 VAddr; ///< Represents a pointer in the userspace virtual address space. 52typedef u32 VAddr; ///< Represents a pointer in the userspace virtual address space.
53typedef u32 PAddr; ///< Represents a pointer in the ARM11 physical address space. 53typedef u32 PAddr; ///< Represents a pointer in the ARM11 physical address space.
54 54
55/// Union for fast 16-bit type casting
56union t16 {
57 u8 _u8[2]; ///< 8-bit unsigned char(s)
58 u16 _u16; ///< 16-bit unsigned shorts(s)
59};
60
61/// Union for fast 32-bit type casting
62union t32 {
63 f32 _f32; ///< 32-bit floating point(s)
64 u32 _u32; ///< 32-bit unsigned int(s)
65 s32 _s32; ///< 32-bit signed int(s)
66 u16 _u16[2]; ///< 16-bit unsigned shorts(s)
67 u8 _u8[4]; ///< 8-bit unsigned char(s)
68};
69
70/// Union for fast 64-bit type casting
71union t64 {
72 f64 _f64; ///< 64-bit floating point
73 u64 _u64; ///< 64-bit unsigned long
74 f32 _f32[2]; ///< 32-bit floating point(s)
75 u32 _u32[2]; ///< 32-bit unsigned int(s)
76 s32 _s32[2]; ///< 32-bit signed int(s)
77 u16 _u16[4]; ///< 16-bit unsigned shorts(s)
78 u8 _u8[8]; ///< 8-bit unsigned char(s)
79};
80
81// An inheritable class to disallow the copy constructor and operator= functions 55// An inheritable class to disallow the copy constructor and operator= functions
82class NonCopyable { 56class NonCopyable {
83protected: 57protected:
diff --git a/src/core/arm/skyeye_common/arm_regformat.h b/src/core/arm/skyeye_common/arm_regformat.h
index a92effbb4..d1c721809 100644
--- a/src/core/arm/skyeye_common/arm_regformat.h
+++ b/src/core/arm/skyeye_common/arm_regformat.h
@@ -59,6 +59,8 @@ enum {
59 VFP_FPSID, 59 VFP_FPSID,
60 VFP_FPSCR, 60 VFP_FPSCR,
61 VFP_FPEXC, 61 VFP_FPEXC,
62 VFP_FPINST,
63 VFP_FPINST2,
62 VFP_MVFR0, 64 VFP_MVFR0,
63 VFP_MVFR1, 65 VFP_MVFR1,
64 66
diff --git a/src/core/arm/skyeye_common/vfp/vfp.cpp b/src/core/arm/skyeye_common/vfp/vfp.cpp
index 571d6c2f2..592d32a74 100644
--- a/src/core/arm/skyeye_common/vfp/vfp.cpp
+++ b/src/core/arm/skyeye_common/vfp/vfp.cpp
@@ -26,30 +26,20 @@
26#include "core/arm/skyeye_common/vfp/asm_vfp.h" 26#include "core/arm/skyeye_common/vfp/asm_vfp.h"
27#include "core/arm/skyeye_common/vfp/vfp.h" 27#include "core/arm/skyeye_common/vfp/vfp.h"
28 28
29unsigned VFPInit(ARMul_State* state) 29void VFPInit(ARMul_State* state)
30{ 30{
31 state->VFP[VFP_FPSID] = VFP_FPSID_IMPLMEN<<24 | VFP_FPSID_SW<<23 | VFP_FPSID_SUBARCH<<16 | 31 state->VFP[VFP_FPSID] = VFP_FPSID_IMPLMEN<<24 | VFP_FPSID_SW<<23 | VFP_FPSID_SUBARCH<<16 |
32 VFP_FPSID_PARTNUM<<8 | VFP_FPSID_VARIANT<<4 | VFP_FPSID_REVISION; 32 VFP_FPSID_PARTNUM<<8 | VFP_FPSID_VARIANT<<4 | VFP_FPSID_REVISION;
33 state->VFP[VFP_FPEXC] = 0; 33 state->VFP[VFP_FPEXC] = 0;
34 state->VFP[VFP_FPSCR] = 0; 34 state->VFP[VFP_FPSCR] = 0;
35 35
36 // ARM11 MPCore instruction register reset values.
37 state->VFP[VFP_FPINST] = 0xEE000A00;
38 state->VFP[VFP_FPINST2] = 0;
39
36 // ARM11 MPCore feature register values. 40 // ARM11 MPCore feature register values.
37 state->VFP[VFP_MVFR0] = 0x11111111; 41 state->VFP[VFP_MVFR0] = 0x11111111;
38 state->VFP[VFP_MVFR1] = 0; 42 state->VFP[VFP_MVFR1] = 0;
39
40 return 0;
41}
42
43void VMSR(ARMul_State* state, ARMword reg, ARMword Rt)
44{
45 if (reg == 1)
46 {
47 state->VFP[VFP_FPSCR] = state->Reg[Rt];
48 }
49 else if (reg == 8)
50 {
51 state->VFP[VFP_FPEXC] = state->Reg[Rt];
52 }
53} 43}
54 44
55void VMOVBRS(ARMul_State* state, ARMword to_arm, ARMword t, ARMword n, ARMword* value) 45void VMOVBRS(ARMul_State* state, ARMword to_arm, ARMword t, ARMword n, ARMword* value)
diff --git a/src/core/arm/skyeye_common/vfp/vfp.h b/src/core/arm/skyeye_common/vfp/vfp.h
index acefae9bb..80ca93ccd 100644
--- a/src/core/arm/skyeye_common/vfp/vfp.h
+++ b/src/core/arm/skyeye_common/vfp/vfp.h
@@ -26,7 +26,7 @@
26#define CHECK_VFP_ENABLED 26#define CHECK_VFP_ENABLED
27#define CHECK_VFP_CDP_RET vfp_raise_exceptions(cpu, ret, inst_cream->instr, cpu->VFP[VFP_FPSCR]); 27#define CHECK_VFP_CDP_RET vfp_raise_exceptions(cpu, ret, inst_cream->instr, cpu->VFP[VFP_FPSCR]);
28 28
29unsigned VFPInit(ARMul_State* state); 29void VFPInit(ARMul_State* state);
30 30
31s32 vfp_get_float(ARMul_State* state, u32 reg); 31s32 vfp_get_float(ARMul_State* state, u32 reg);
32void vfp_put_float(ARMul_State* state, s32 val, u32 reg); 32void vfp_put_float(ARMul_State* state, s32 val, u32 reg);
@@ -36,10 +36,8 @@ void vfp_raise_exceptions(ARMul_State* state, u32 exceptions, u32 inst, u32 fpsc
36u32 vfp_single_cpdo(ARMul_State* state, u32 inst, u32 fpscr); 36u32 vfp_single_cpdo(ARMul_State* state, u32 inst, u32 fpscr);
37u32 vfp_double_cpdo(ARMul_State* state, u32 inst, u32 fpscr); 37u32 vfp_double_cpdo(ARMul_State* state, u32 inst, u32 fpscr);
38 38
39void VMSR(ARMul_State* state, ARMword reg, ARMword Rt);
40void VMOVBRS(ARMul_State* state, ARMword to_arm, ARMword t, ARMword n, ARMword* value); 39void VMOVBRS(ARMul_State* state, ARMword to_arm, ARMword t, ARMword n, ARMword* value);
41void VMOVBRRD(ARMul_State* state, ARMword to_arm, ARMword t, ARMword t2, ARMword n, ARMword* value1, ARMword* value2); 40void VMOVBRRD(ARMul_State* state, ARMword to_arm, ARMword t, ARMword t2, ARMword n, ARMword* value1, ARMword* value2);
42void VMOVBRRSS(ARMul_State* state, ARMword to_arm, ARMword t, ARMword t2, ARMword n, ARMword* value1, ARMword* value2); 41void VMOVBRRSS(ARMul_State* state, ARMword to_arm, ARMword t, ARMword t2, ARMword n, ARMword* value1, ARMword* value2);
43void VMOVI(ARMul_State* state, ARMword single, ARMword d, ARMword imm); 42void VMOVI(ARMul_State* state, ARMword single, ARMword d, ARMword imm);
44void VMOVR(ARMul_State* state, ARMword single, ARMword d, ARMword imm); 43void VMOVR(ARMul_State* state, ARMword single, ARMword d, ARMword imm);
45
diff --git a/src/core/arm/skyeye_common/vfp/vfpinstr.cpp b/src/core/arm/skyeye_common/vfp/vfpinstr.cpp
index 67fe63aa4..8efcbab1c 100644
--- a/src/core/arm/skyeye_common/vfp/vfpinstr.cpp
+++ b/src/core/arm/skyeye_common/vfp/vfpinstr.cpp
@@ -995,7 +995,7 @@ VMOVBRS_INST:
995#ifdef VFP_INTERPRETER_STRUCT 995#ifdef VFP_INTERPRETER_STRUCT
996struct vmsr_inst { 996struct vmsr_inst {
997 unsigned int reg; 997 unsigned int reg;
998 unsigned int Rd; 998 unsigned int Rt;
999}; 999};
1000#endif 1000#endif
1001#ifdef VFP_INTERPRETER_TRANS 1001#ifdef VFP_INTERPRETER_TRANS
@@ -1009,7 +1009,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmsr)(unsigned int inst, int index)
1009 inst_base->br = NON_BRANCH; 1009 inst_base->br = NON_BRANCH;
1010 1010
1011 inst_cream->reg = BITS(inst, 16, 19); 1011 inst_cream->reg = BITS(inst, 16, 19);
1012 inst_cream->Rd = BITS(inst, 12, 15); 1012 inst_cream->Rt = BITS(inst, 12, 15);
1013 1013
1014 return inst_base; 1014 return inst_base;
1015} 1015}
@@ -1017,15 +1017,30 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmsr)(unsigned int inst, int index)
1017#ifdef VFP_INTERPRETER_IMPL 1017#ifdef VFP_INTERPRETER_IMPL
1018VMSR_INST: 1018VMSR_INST:
1019{ 1019{
1020 if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) { 1020 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
1021 /* FIXME: special case for access to FPSID and FPEXC, VFP must be disabled , 1021 /* FIXME: special case for access to FPSID and FPEXC, VFP must be disabled ,
1022 and in privileged mode */ 1022 and in privileged mode */
1023 /* Exceptions must be checked, according to v7 ref manual */ 1023 /* Exceptions must be checked, according to v7 ref manual */
1024 CHECK_VFP_ENABLED; 1024 CHECK_VFP_ENABLED;
1025 1025
1026 vmsr_inst *inst_cream = (vmsr_inst *)inst_base->component; 1026 vmsr_inst* const inst_cream = (vmsr_inst*)inst_base->component;
1027
1028 unsigned int reg = inst_cream->reg;
1029 unsigned int rt = inst_cream->Rt;
1027 1030
1028 VMSR(cpu, inst_cream->reg, inst_cream->Rd); 1031 if (reg == 1)
1032 {
1033 cpu->VFP[VFP_FPSCR] = cpu->Reg[rt];
1034 }
1035 else if (InAPrivilegedMode(cpu))
1036 {
1037 if (reg == 8)
1038 cpu->VFP[VFP_FPEXC] = cpu->Reg[rt];
1039 else if (reg == 9)
1040 cpu->VFP[VFP_FPINST] = cpu->Reg[rt];
1041 else if (reg == 10)
1042 cpu->VFP[VFP_FPINST2] = cpu->Reg[rt];
1043 }
1029 } 1044 }
1030 cpu->Reg[15] += GET_INST_SIZE(cpu); 1045 cpu->Reg[15] += GET_INST_SIZE(cpu);
1031 INC_PC(sizeof(vmsr_inst)); 1046 INC_PC(sizeof(vmsr_inst));
@@ -1111,19 +1126,22 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmrs)(unsigned int inst, int index)
1111#ifdef VFP_INTERPRETER_IMPL 1126#ifdef VFP_INTERPRETER_IMPL
1112VMRS_INST: 1127VMRS_INST:
1113{ 1128{
1114 if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) { 1129 if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
1115 /* FIXME: special case for access to FPSID and FPEXC, VFP must be disabled, 1130 /* FIXME: special case for access to FPSID and FPEXC, VFP must be disabled,
1116 and in privileged mode */ 1131 and in privileged mode */
1117 /* Exceptions must be checked, according to v7 ref manual */ 1132 /* Exceptions must be checked, according to v7 ref manual */
1118 CHECK_VFP_ENABLED; 1133 CHECK_VFP_ENABLED;
1119 1134
1120 vmrs_inst *inst_cream = (vmrs_inst *)inst_base->component; 1135 vmrs_inst* const inst_cream = (vmrs_inst*)inst_base->component;
1121 1136
1122 if (inst_cream->reg == 1) /* FPSCR */ 1137 unsigned int reg = inst_cream->reg;
1138 unsigned int rt = inst_cream->Rt;
1139
1140 if (reg == 1) // FPSCR
1123 { 1141 {
1124 if (inst_cream->Rt != 15) 1142 if (rt != 15)
1125 { 1143 {
1126 cpu->Reg[inst_cream->Rt] = cpu->VFP[VFP_FPSCR]; 1144 cpu->Reg[rt] = cpu->VFP[VFP_FPSCR];
1127 } 1145 }
1128 else 1146 else
1129 { 1147 {
@@ -1133,25 +1151,26 @@ VMRS_INST:
1133 cpu->VFlag = (cpu->VFP[VFP_FPSCR] >> 28) & 1; 1151 cpu->VFlag = (cpu->VFP[VFP_FPSCR] >> 28) & 1;
1134 } 1152 }
1135 } 1153 }
1136 else 1154 else if (reg == 0)
1137 { 1155 {
1138 switch (inst_cream->reg) 1156 cpu->Reg[rt] = cpu->VFP[VFP_FPSID];
1139 { 1157 }
1140 case 0: 1158 else if (reg == 6)
1141 cpu->Reg[inst_cream->Rt] = cpu->VFP[VFP_FPSID]; 1159 {
1142 break; 1160 cpu->Reg[rt] = cpu->VFP[VFP_MVFR1];
1143 case 6: 1161 }
1144 cpu->Reg[inst_cream->Rt] = cpu->VFP[VFP_MVFR1]; 1162 else if (reg == 7)
1145 break; 1163 {
1146 case 7: 1164 cpu->Reg[rt] = cpu->VFP[VFP_MVFR0];
1147 cpu->Reg[inst_cream->Rt] = cpu->VFP[VFP_MVFR0]; 1165 }
1148 break; 1166 else if (InAPrivilegedMode(cpu))
1149 case 8: 1167 {
1150 cpu->Reg[inst_cream->Rt] = cpu->VFP[VFP_FPEXC]; 1168 if (reg == 8)
1151 break; 1169 cpu->Reg[rt] = cpu->VFP[VFP_FPEXC];
1152 default: 1170 else if (reg == 9)
1153 break; 1171 cpu->Reg[rt] = cpu->VFP[VFP_FPINST];
1154 } 1172 else if (reg == 10)
1173 cpu->Reg[rt] = cpu->VFP[VFP_FPINST2];
1155 } 1174 }
1156 } 1175 }
1157 cpu->Reg[15] += GET_INST_SIZE(cpu); 1176 cpu->Reg[15] += GET_INST_SIZE(cpu);
diff --git a/src/core/hle/service/soc_u.cpp b/src/core/hle/service/soc_u.cpp
index 1e0f5df9b..1bd420552 100644
--- a/src/core/hle/service/soc_u.cpp
+++ b/src/core/hle/service/soc_u.cpp
@@ -328,6 +328,7 @@ static void Socket(Service::Interface* self) {
328 if ((s32)socket_handle == SOCKET_ERROR_VALUE) 328 if ((s32)socket_handle == SOCKET_ERROR_VALUE)
329 result = TranslateError(GET_ERRNO); 329 result = TranslateError(GET_ERRNO);
330 330
331 cmd_buffer[0] = IPC::MakeHeader(2, 2, 0);
331 cmd_buffer[1] = result; 332 cmd_buffer[1] = result;
332 cmd_buffer[2] = socket_handle; 333 cmd_buffer[2] = socket_handle;
333} 334}
@@ -351,8 +352,9 @@ static void Bind(Service::Interface* self) {
351 if (res != 0) 352 if (res != 0)
352 result = TranslateError(GET_ERRNO); 353 result = TranslateError(GET_ERRNO);
353 354
354 cmd_buffer[2] = res; 355 cmd_buffer[0] = IPC::MakeHeader(5, 2, 0);
355 cmd_buffer[1] = result; 356 cmd_buffer[1] = result;
357 cmd_buffer[2] = res;
356} 358}
357 359
358static void Fcntl(Service::Interface* self) { 360static void Fcntl(Service::Interface* self) {
@@ -434,8 +436,9 @@ static void Listen(Service::Interface* self) {
434 if (ret != 0) 436 if (ret != 0)
435 result = TranslateError(GET_ERRNO); 437 result = TranslateError(GET_ERRNO);
436 438
437 cmd_buffer[2] = ret; 439 cmd_buffer[0] = IPC::MakeHeader(3, 2, 0);
438 cmd_buffer[1] = result; 440 cmd_buffer[1] = result;
441 cmd_buffer[2] = ret;
439} 442}
440 443
441static void Accept(Service::Interface* self) { 444static void Accept(Service::Interface* self) {
@@ -460,8 +463,10 @@ static void Accept(Service::Interface* self) {
460 Memory::WriteBlock(cmd_buffer[0x104 >> 2], (const u8*)&ctr_addr, max_addr_len); 463 Memory::WriteBlock(cmd_buffer[0x104 >> 2], (const u8*)&ctr_addr, max_addr_len);
461 } 464 }
462 465
463 cmd_buffer[2] = ret; 466 cmd_buffer[0] = IPC::MakeHeader(4, 2, 2);
464 cmd_buffer[1] = result; 467 cmd_buffer[1] = result;
468 cmd_buffer[2] = ret;
469 cmd_buffer[3] = IPC::StaticBufferDesc(static_cast<u32>(max_addr_len), 0);
465} 470}
466 471
467static void GetHostId(Service::Interface* self) { 472static void GetHostId(Service::Interface* self) {
@@ -669,8 +674,10 @@ static void Connect(Service::Interface* self) {
669 int result = 0; 674 int result = 0;
670 if (ret != 0) 675 if (ret != 0)
671 result = TranslateError(GET_ERRNO); 676 result = TranslateError(GET_ERRNO);
672 cmd_buffer[2] = ret; 677
678 cmd_buffer[0] = IPC::MakeHeader(6, 2, 0);
673 cmd_buffer[1] = result; 679 cmd_buffer[1] = result;
680 cmd_buffer[2] = ret;
674} 681}
675 682
676static void InitializeSockets(Service::Interface* self) { 683static void InitializeSockets(Service::Interface* self) {
@@ -681,7 +688,8 @@ static void InitializeSockets(Service::Interface* self) {
681#endif 688#endif
682 689
683 u32* cmd_buffer = Kernel::GetCommandBuffer(); 690 u32* cmd_buffer = Kernel::GetCommandBuffer();
684 cmd_buffer[1] = 0; 691 cmd_buffer[0] = IPC::MakeHeader(1, 1, 0);
692 cmd_buffer[1] = RESULT_SUCCESS.raw;
685} 693}
686 694
687static void ShutdownSockets(Service::Interface* self) { 695static void ShutdownSockets(Service::Interface* self) {