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-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv.h5
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_barriers.cpp14
-rw-r--r--src/shader_recompiler/frontend/ir/ir_emitter.cpp20
-rw-r--r--src/shader_recompiler/frontend/ir/ir_emitter.h5
-rw-r--r--src/shader_recompiler/frontend/ir/microinstruction.cpp5
-rw-r--r--src/shader_recompiler/frontend/ir/modifiers.h8
-rw-r--r--src/shader_recompiler/frontend/ir/opcodes.inc5
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/barrier_operations.cpp30
8 files changed, 30 insertions, 62 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.h b/src/shader_recompiler/backend/spirv/emit_spirv.h
index cf8d74f4e..d43c72f6e 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.h
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.h
@@ -29,9 +29,8 @@ void EmitReturn(EmitContext& ctx);
29void EmitUnreachable(EmitContext& ctx); 29void EmitUnreachable(EmitContext& ctx);
30void EmitDemoteToHelperInvocation(EmitContext& ctx, Id continue_label); 30void EmitDemoteToHelperInvocation(EmitContext& ctx, Id continue_label);
31void EmitBarrier(EmitContext& ctx); 31void EmitBarrier(EmitContext& ctx);
32void EmitMemoryBarrierWorkgroupLevel(EmitContext& ctx); 32void EmitWorkgroupMemoryBarrier(EmitContext& ctx);
33void EmitMemoryBarrierDeviceLevel(EmitContext& ctx); 33void EmitDeviceMemoryBarrier(EmitContext& ctx);
34void EmitMemoryBarrierSystemLevel(EmitContext& ctx);
35void EmitPrologue(EmitContext& ctx); 34void EmitPrologue(EmitContext& ctx);
36void EmitEpilogue(EmitContext& ctx); 35void EmitEpilogue(EmitContext& ctx);
37void EmitEmitVertex(EmitContext& ctx, const IR::Value& stream); 36void EmitEmitVertex(EmitContext& ctx, const IR::Value& stream);
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_barriers.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_barriers.cpp
index 74f523d0f..366dc6a0c 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_barriers.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_barriers.cpp
@@ -7,7 +7,7 @@
7 7
8namespace Shader::Backend::SPIRV { 8namespace Shader::Backend::SPIRV {
9namespace { 9namespace {
10void EmitMemoryBarrierImpl(EmitContext& ctx, spv::Scope scope) { 10void MemoryBarrier(EmitContext& ctx, spv::Scope scope) {
11 const auto semantics{ 11 const auto semantics{
12 spv::MemorySemanticsMask::AcquireRelease | spv::MemorySemanticsMask::UniformMemory | 12 spv::MemorySemanticsMask::AcquireRelease | spv::MemorySemanticsMask::UniformMemory |
13 spv::MemorySemanticsMask::WorkgroupMemory | spv::MemorySemanticsMask::AtomicCounterMemory | 13 spv::MemorySemanticsMask::WorkgroupMemory | spv::MemorySemanticsMask::AtomicCounterMemory |
@@ -27,16 +27,12 @@ void EmitBarrier(EmitContext& ctx) {
27 ctx.Constant(ctx.U32[1], static_cast<u32>(memory_semantics))); 27 ctx.Constant(ctx.U32[1], static_cast<u32>(memory_semantics)));
28} 28}
29 29
30void EmitMemoryBarrierWorkgroupLevel(EmitContext& ctx) { 30void EmitWorkgroupMemoryBarrier(EmitContext& ctx) {
31 EmitMemoryBarrierImpl(ctx, spv::Scope::Workgroup); 31 MemoryBarrier(ctx, spv::Scope::Workgroup);
32} 32}
33 33
34void EmitMemoryBarrierDeviceLevel(EmitContext& ctx) { 34void EmitDeviceMemoryBarrier(EmitContext& ctx) {
35 EmitMemoryBarrierImpl(ctx, spv::Scope::Device); 35 MemoryBarrier(ctx, spv::Scope::Device);
36}
37
38void EmitMemoryBarrierSystemLevel(EmitContext& ctx) {
39 EmitMemoryBarrierImpl(ctx, spv::Scope::CrossDevice);
40} 36}
41 37
42} // namespace Shader::Backend::SPIRV 38} // namespace Shader::Backend::SPIRV
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
index ef3b00bc2..aebe7200f 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
@@ -86,20 +86,12 @@ void IREmitter::Barrier() {
86 Inst(Opcode::Barrier); 86 Inst(Opcode::Barrier);
87} 87}
88 88
89void IREmitter::MemoryBarrier(MemoryScope scope) { 89void IREmitter::WorkgroupMemoryBarrier() {
90 switch (scope) { 90 Inst(Opcode::WorkgroupMemoryBarrier);
91 case MemoryScope::Workgroup: 91}
92 Inst(Opcode::MemoryBarrierWorkgroupLevel); 92
93 break; 93void IREmitter::DeviceMemoryBarrier() {
94 case MemoryScope::Device: 94 Inst(Opcode::DeviceMemoryBarrier);
95 Inst(Opcode::MemoryBarrierDeviceLevel);
96 break;
97 case MemoryScope::System:
98 Inst(Opcode::MemoryBarrierSystemLevel);
99 break;
100 default:
101 throw InvalidArgument("Invalid memory scope {}", scope);
102 }
103} 95}
104 96
105void IREmitter::Return() { 97void IREmitter::Return() {
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.h b/src/shader_recompiler/frontend/ir/ir_emitter.h
index 1a585df15..b9d051b43 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.h
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.h
@@ -144,8 +144,9 @@ public:
144 [[nodiscard]] Value Select(const U1& condition, const Value& true_value, 144 [[nodiscard]] Value Select(const U1& condition, const Value& true_value,
145 const Value& false_value); 145 const Value& false_value);
146 146
147 [[nodiscard]] void Barrier(); 147 void Barrier();
148 [[nodiscard]] void MemoryBarrier(MemoryScope scope); 148 void WorkgroupMemoryBarrier();
149 void DeviceMemoryBarrier();
149 150
150 template <typename Dest, typename Source> 151 template <typename Dest, typename Source>
151 [[nodiscard]] Dest BitCast(const Source& value); 152 [[nodiscard]] Dest BitCast(const Source& value);
diff --git a/src/shader_recompiler/frontend/ir/microinstruction.cpp b/src/shader_recompiler/frontend/ir/microinstruction.cpp
index b53fe2e2a..efa426808 100644
--- a/src/shader_recompiler/frontend/ir/microinstruction.cpp
+++ b/src/shader_recompiler/frontend/ir/microinstruction.cpp
@@ -64,9 +64,8 @@ bool Inst::MayHaveSideEffects() const noexcept {
64 case Opcode::Unreachable: 64 case Opcode::Unreachable:
65 case Opcode::DemoteToHelperInvocation: 65 case Opcode::DemoteToHelperInvocation:
66 case Opcode::Barrier: 66 case Opcode::Barrier:
67 case Opcode::MemoryBarrierWorkgroupLevel: 67 case Opcode::WorkgroupMemoryBarrier:
68 case Opcode::MemoryBarrierDeviceLevel: 68 case Opcode::DeviceMemoryBarrier:
69 case Opcode::MemoryBarrierSystemLevel:
70 case Opcode::Prologue: 69 case Opcode::Prologue:
71 case Opcode::Epilogue: 70 case Opcode::Epilogue:
72 case Opcode::EmitVertex: 71 case Opcode::EmitVertex:
diff --git a/src/shader_recompiler/frontend/ir/modifiers.h b/src/shader_recompiler/frontend/ir/modifiers.h
index 447e9703c..5d7efa14c 100644
--- a/src/shader_recompiler/frontend/ir/modifiers.h
+++ b/src/shader_recompiler/frontend/ir/modifiers.h
@@ -25,14 +25,6 @@ enum class FpRounding : u8 {
25 RZ, // Round towards zero 25 RZ, // Round towards zero
26}; 26};
27 27
28enum class MemoryScope : u32 {
29 DontCare,
30 Warp,
31 Workgroup,
32 Device,
33 System,
34};
35
36struct FpControl { 28struct FpControl {
37 bool no_contraction{false}; 29 bool no_contraction{false};
38 FpRounding rounding{FpRounding::DontCare}; 30 FpRounding rounding{FpRounding::DontCare};
diff --git a/src/shader_recompiler/frontend/ir/opcodes.inc b/src/shader_recompiler/frontend/ir/opcodes.inc
index 0748efa8d..1cfc2a943 100644
--- a/src/shader_recompiler/frontend/ir/opcodes.inc
+++ b/src/shader_recompiler/frontend/ir/opcodes.inc
@@ -18,9 +18,8 @@ OPCODE(DemoteToHelperInvocation, Void, Labe
18 18
19// Barriers 19// Barriers
20OPCODE(Barrier, Void, ) 20OPCODE(Barrier, Void, )
21OPCODE(MemoryBarrierWorkgroupLevel, Void, ) 21OPCODE(WorkgroupMemoryBarrier, Void, )
22OPCODE(MemoryBarrierDeviceLevel, Void, ) 22OPCODE(DeviceMemoryBarrier, Void, )
23OPCODE(MemoryBarrierSystemLevel, Void, )
24 23
25// Special operations 24// Special operations
26OPCODE(Prologue, Void, ) 25OPCODE(Prologue, Void, )
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/barrier_operations.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/barrier_operations.cpp
index 2a2a294df..86e433e41 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/barrier_operations.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/barrier_operations.cpp
@@ -12,34 +12,24 @@ namespace Shader::Maxwell {
12namespace { 12namespace {
13// Seems to be in CUDA terminology. 13// Seems to be in CUDA terminology.
14enum class LocalScope : u64 { 14enum class LocalScope : u64 {
15 CTG = 0, 15 CTA,
16 GL = 1, 16 GL,
17 SYS = 2, 17 SYS,
18 VC = 3, 18 VC,
19}; 19};
20
21IR::MemoryScope LocalScopeToMemoryScope(LocalScope scope) {
22 switch (scope) {
23 case LocalScope::CTG:
24 return IR::MemoryScope::Workgroup;
25 case LocalScope::GL:
26 return IR::MemoryScope::Device;
27 case LocalScope::SYS:
28 return IR::MemoryScope::System;
29 default:
30 throw NotImplementedException("Unimplemented Local Scope {}", scope);
31 }
32}
33
34} // Anonymous namespace 20} // Anonymous namespace
35 21
36void TranslatorVisitor::MEMBAR(u64 inst) { 22void TranslatorVisitor::MEMBAR(u64 inst) {
37 union { 23 union {
38 u64 raw; 24 u64 raw;
39 BitField<8, 2, LocalScope> scope; 25 BitField<8, 2, LocalScope> scope;
40 } membar{inst}; 26 } const membar{inst};
41 27
42 ir.MemoryBarrier(LocalScopeToMemoryScope(membar.scope)); 28 if (membar.scope == LocalScope::CTA) {
29 ir.WorkgroupMemoryBarrier();
30 } else {
31 ir.DeviceMemoryBarrier();
32 }
43} 33}
44 34
45void TranslatorVisitor::DEPBAR() { 35void TranslatorVisitor::DEPBAR() {