diff options
Diffstat (limited to '')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom.cpp | 4 | ||||
| -rw-r--r-- | src/core/arm/interpreter/arminit.cpp | 2 | ||||
| -rw-r--r-- | src/core/arm/skyeye_common/armdefs.h | 30 | ||||
| -rw-r--r-- | src/core/arm/skyeye_common/armemu.h | 28 |
4 files changed, 40 insertions, 24 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp index 68fddc94f..1977112dd 100644 --- a/src/core/arm/dyncom/arm_dyncom.cpp +++ b/src/core/arm/dyncom/arm_dyncom.cpp | |||
| @@ -23,7 +23,7 @@ ARM_DynCom::ARM_DynCom() { | |||
| 23 | 23 | ||
| 24 | ARMul_NewState((ARMul_State*)state.get()); | 24 | ARMul_NewState((ARMul_State*)state.get()); |
| 25 | 25 | ||
| 26 | state->abort_model = 0; | 26 | state->abort_model = ABORT_BASE_RESTORED; |
| 27 | state->cpu = (cpu_config_t*)&s_arm11_cpu_info; | 27 | state->cpu = (cpu_config_t*)&s_arm11_cpu_info; |
| 28 | state->bigendSig = LOW; | 28 | state->bigendSig = LOW; |
| 29 | 29 | ||
| @@ -34,7 +34,7 @@ ARM_DynCom::ARM_DynCom() { | |||
| 34 | ARMul_CoProInit(state.get()); | 34 | ARMul_CoProInit(state.get()); |
| 35 | ARMul_Reset(state.get()); | 35 | ARMul_Reset(state.get()); |
| 36 | state->NextInstr = RESUME; // NOTE: This will be overwritten by LoadContext | 36 | state->NextInstr = RESUME; // NOTE: This will be overwritten by LoadContext |
| 37 | state->Emulate = 3; | 37 | state->Emulate = RUN; |
| 38 | 38 | ||
| 39 | state->Reg[15] = 0x00000000; | 39 | state->Reg[15] = 0x00000000; |
| 40 | state->Reg[13] = 0x10000000; // Set stack pointer to the top of the stack | 40 | state->Reg[13] = 0x10000000; // Set stack pointer to the top of the stack |
diff --git a/src/core/arm/interpreter/arminit.cpp b/src/core/arm/interpreter/arminit.cpp index 7b502e240..b7dd5e38d 100644 --- a/src/core/arm/interpreter/arminit.cpp +++ b/src/core/arm/interpreter/arminit.cpp | |||
| @@ -74,7 +74,7 @@ ARMul_State* ARMul_NewState(ARMul_State* state) | |||
| 74 | for (unsigned int i = 0; i < 7; i++) | 74 | for (unsigned int i = 0; i < 7; i++) |
| 75 | state->Spsr[i] = 0; | 75 | state->Spsr[i] = 0; |
| 76 | 76 | ||
| 77 | state->Mode = 0; | 77 | state->Mode = USER32MODE; |
| 78 | 78 | ||
| 79 | state->VectorCatch = 0; | 79 | state->VectorCatch = 0; |
| 80 | state->Aborted = false; | 80 | state->Aborted = false; |
diff --git a/src/core/arm/skyeye_common/armdefs.h b/src/core/arm/skyeye_common/armdefs.h index ff9296e0f..0de40f647 100644 --- a/src/core/arm/skyeye_common/armdefs.h +++ b/src/core/arm/skyeye_common/armdefs.h | |||
| @@ -35,15 +35,27 @@ | |||
| 35 | #define BITS(s, a, b) ((s << ((sizeof(s) * 8 - 1) - b)) >> (sizeof(s) * 8 - b + a - 1)) | 35 | #define BITS(s, a, b) ((s << ((sizeof(s) * 8 - 1) - b)) >> (sizeof(s) * 8 - b + a - 1)) |
| 36 | #define BIT(s, n) ((s >> (n)) & 1) | 36 | #define BIT(s, n) ((s >> (n)) & 1) |
| 37 | 37 | ||
| 38 | #define LOW 0 | 38 | // Signal levels |
| 39 | #define HIGH 1 | 39 | enum { |
| 40 | #define LOWHIGH 1 | 40 | LOW = 0, |
| 41 | #define HIGHLOW 2 | 41 | HIGH = 1, |
| 42 | 42 | LOWHIGH = 1, | |
| 43 | //the define of cachetype | 43 | HIGHLOW = 2 |
| 44 | #define NONCACHE 0 | 44 | }; |
| 45 | #define DATACACHE 1 | 45 | |
| 46 | #define INSTCACHE 2 | 46 | // Cache types |
| 47 | enum { | ||
| 48 | NONCACHE = 0, | ||
| 49 | DATACACHE = 1, | ||
| 50 | INSTCACHE = 2, | ||
| 51 | }; | ||
| 52 | |||
| 53 | // Abort models | ||
| 54 | enum { | ||
| 55 | ABORT_BASE_RESTORED = 0, | ||
| 56 | ABORT_EARLY = 1, | ||
| 57 | ABORT_BASE_UPDATED = 2 | ||
| 58 | }; | ||
| 47 | 59 | ||
| 48 | #define POS(i) ( (~(i)) >> 31 ) | 60 | #define POS(i) ( (~(i)) >> 31 ) |
| 49 | #define NEG(i) ( (i) >> 31 ) | 61 | #define NEG(i) ( (i) >> 31 ) |
diff --git a/src/core/arm/skyeye_common/armemu.h b/src/core/arm/skyeye_common/armemu.h index beee54c9a..5d4c06837 100644 --- a/src/core/arm/skyeye_common/armemu.h +++ b/src/core/arm/skyeye_common/armemu.h | |||
| @@ -76,24 +76,28 @@ | |||
| 76 | #define R15MODE (state->Reg[15] & R15MODEBITS) | 76 | #define R15MODE (state->Reg[15] & R15MODEBITS) |
| 77 | 77 | ||
| 78 | // Different ways to start the next instruction. | 78 | // Different ways to start the next instruction. |
| 79 | #define SEQ 0 | 79 | enum { |
| 80 | #define NONSEQ 1 | 80 | SEQ = 0, |
| 81 | #define PCINCEDSEQ 2 | 81 | NONSEQ = 1, |
| 82 | #define PCINCEDNONSEQ 3 | 82 | PCINCEDSEQ = 2, |
| 83 | #define PRIMEPIPE 4 | 83 | PCINCEDNONSEQ = 3, |
| 84 | #define RESUME 8 | 84 | PRIMEPIPE = 4, |
| 85 | RESUME = 8 | ||
| 86 | }; | ||
| 87 | |||
| 88 | // Values for Emulate. | ||
| 89 | enum { | ||
| 90 | STOP = 0, // Stop | ||
| 91 | CHANGEMODE = 1, // Change mode | ||
| 92 | ONCE = 2, // Execute just one interation | ||
| 93 | RUN = 3 // Continuous execution | ||
| 94 | }; | ||
| 85 | 95 | ||
| 86 | #define FLUSHPIPE state->NextInstr |= PRIMEPIPE | 96 | #define FLUSHPIPE state->NextInstr |= PRIMEPIPE |
| 87 | 97 | ||
| 88 | // Macro to rotate n right by b bits. | 98 | // Macro to rotate n right by b bits. |
| 89 | #define ROTATER(n, b) (((n) >> (b)) | ((n) << (32 - (b)))) | 99 | #define ROTATER(n, b) (((n) >> (b)) | ((n) << (32 - (b)))) |
| 90 | 100 | ||
| 91 | // Values for Emulate. | ||
| 92 | #define STOP 0 // stop | ||
| 93 | #define CHANGEMODE 1 // change mode | ||
| 94 | #define ONCE 2 // execute just one interation | ||
| 95 | #define RUN 3 // continuous execution | ||
| 96 | |||
| 97 | // Stuff that is shared across modes. | 101 | // Stuff that is shared across modes. |
| 98 | extern unsigned ARMul_MultTable[]; // Number of I cycles for a mult. | 102 | extern unsigned ARMul_MultTable[]; // Number of I cycles for a mult. |
| 99 | extern ARMword ARMul_ImmedTable[]; // Immediate DP LHS values. | 103 | extern ARMword ARMul_ImmedTable[]; // Immediate DP LHS values. |