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-rw-r--r--src/video_core/shader/shader.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/video_core/shader/shader.h b/src/video_core/shader/shader.h
index 1be4e3734..7af8f1fa1 100644
--- a/src/video_core/shader/shader.h
+++ b/src/video_core/shader/shader.h
@@ -82,7 +82,7 @@ struct ShaderSetup {
82 struct { 82 struct {
83 // The float uniforms are accessed by the shader JIT using SSE instructions, and are 83 // The float uniforms are accessed by the shader JIT using SSE instructions, and are
84 // therefore required to be 16-byte aligned. 84 // therefore required to be 16-byte aligned.
85 Math::Vec4<float24> MEMORY_ALIGNED16(f[96]); 85 alignas(16) Math::Vec4<float24> f[96];
86 86
87 std::array<bool, 16> b; 87 std::array<bool, 16> b;
88 std::array<Math::Vec4<u8>, 4> i; 88 std::array<Math::Vec4<u8>, 4> i;
@@ -276,9 +276,9 @@ struct UnitState {
276 struct Registers { 276 struct Registers {
277 // The registers are accessed by the shader JIT using SSE instructions, and are therefore 277 // The registers are accessed by the shader JIT using SSE instructions, and are therefore
278 // required to be 16-byte aligned. 278 // required to be 16-byte aligned.
279 Math::Vec4<float24> MEMORY_ALIGNED16(input[16]); 279 alignas(16) Math::Vec4<float24> input[16];
280 Math::Vec4<float24> MEMORY_ALIGNED16(output[16]); 280 alignas(16) Math::Vec4<float24> output[16];
281 Math::Vec4<float24> MEMORY_ALIGNED16(temporary[16]); 281 alignas(16) Math::Vec4<float24> temporary[16];
282 } registers; 282 } registers;
283 static_assert(std::is_pod<Registers>::value, "Structure is not POD"); 283 static_assert(std::is_pod<Registers>::value, "Structure is not POD");
284 284