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-rw-r--r--src/video_core/shader_environment.cpp23
1 files changed, 12 insertions, 11 deletions
diff --git a/src/video_core/shader_environment.cpp b/src/video_core/shader_environment.cpp
index 5f7625947..fbabb3219 100644
--- a/src/video_core/shader_environment.cpp
+++ b/src/video_core/shader_environment.cpp
@@ -250,34 +250,34 @@ Shader::TextureType GenericEnvironment::ReadTextureTypeImpl(GPUVAddr tic_addr, u
250 250
251GraphicsEnvironment::GraphicsEnvironment(Tegra::Engines::Maxwell3D& maxwell3d_, 251GraphicsEnvironment::GraphicsEnvironment(Tegra::Engines::Maxwell3D& maxwell3d_,
252 Tegra::MemoryManager& gpu_memory_, 252 Tegra::MemoryManager& gpu_memory_,
253 Maxwell::ShaderProgram program, GPUVAddr program_base_, 253 Maxwell::ShaderType program, GPUVAddr program_base_,
254 u32 start_address_) 254 u32 start_address_)
255 : GenericEnvironment{gpu_memory_, program_base_, start_address_}, maxwell3d{&maxwell3d_} { 255 : GenericEnvironment{gpu_memory_, program_base_, start_address_}, maxwell3d{&maxwell3d_} {
256 gpu_memory->ReadBlock(program_base + start_address, &sph, sizeof(sph)); 256 gpu_memory->ReadBlock(program_base + start_address, &sph, sizeof(sph));
257 initial_offset = sizeof(sph); 257 initial_offset = sizeof(sph);
258 gp_passthrough_mask = maxwell3d->regs.gp_passthrough_mask; 258 gp_passthrough_mask = maxwell3d->regs.post_vtg_shader_attrib_skip_mask;
259 switch (program) { 259 switch (program) {
260 case Maxwell::ShaderProgram::VertexA: 260 case Maxwell::ShaderType::VertexA:
261 stage = Shader::Stage::VertexA; 261 stage = Shader::Stage::VertexA;
262 stage_index = 0; 262 stage_index = 0;
263 break; 263 break;
264 case Maxwell::ShaderProgram::VertexB: 264 case Maxwell::ShaderType::VertexB:
265 stage = Shader::Stage::VertexB; 265 stage = Shader::Stage::VertexB;
266 stage_index = 0; 266 stage_index = 0;
267 break; 267 break;
268 case Maxwell::ShaderProgram::TesselationControl: 268 case Maxwell::ShaderType::TessellationInit:
269 stage = Shader::Stage::TessellationControl; 269 stage = Shader::Stage::TessellationControl;
270 stage_index = 1; 270 stage_index = 1;
271 break; 271 break;
272 case Maxwell::ShaderProgram::TesselationEval: 272 case Maxwell::ShaderType::Tessellation:
273 stage = Shader::Stage::TessellationEval; 273 stage = Shader::Stage::TessellationEval;
274 stage_index = 2; 274 stage_index = 2;
275 break; 275 break;
276 case Maxwell::ShaderProgram::Geometry: 276 case Maxwell::ShaderType::Geometry:
277 stage = Shader::Stage::Geometry; 277 stage = Shader::Stage::Geometry;
278 stage_index = 3; 278 stage_index = 3;
279 break; 279 break;
280 case Maxwell::ShaderProgram::Fragment: 280 case Maxwell::ShaderType::Pixel:
281 stage = Shader::Stage::Fragment; 281 stage = Shader::Stage::Fragment;
282 stage_index = 4; 282 stage_index = 4;
283 break; 283 break;
@@ -288,7 +288,7 @@ GraphicsEnvironment::GraphicsEnvironment(Tegra::Engines::Maxwell3D& maxwell3d_,
288 const u64 local_size{sph.LocalMemorySize()}; 288 const u64 local_size{sph.LocalMemorySize()};
289 ASSERT(local_size <= std::numeric_limits<u32>::max()); 289 ASSERT(local_size <= std::numeric_limits<u32>::max());
290 local_memory_size = static_cast<u32>(local_size) + sph.common3.shader_local_memory_crs_size; 290 local_memory_size = static_cast<u32>(local_size) + sph.common3.shader_local_memory_crs_size;
291 texture_bound = maxwell3d->regs.tex_cb_index; 291 texture_bound = maxwell3d->regs.bindless_texture_const_buffer_slot;
292} 292}
293 293
294u32 GraphicsEnvironment::ReadCbufValue(u32 cbuf_index, u32 cbuf_offset) { 294u32 GraphicsEnvironment::ReadCbufValue(u32 cbuf_index, u32 cbuf_offset) {
@@ -304,8 +304,9 @@ u32 GraphicsEnvironment::ReadCbufValue(u32 cbuf_index, u32 cbuf_offset) {
304 304
305Shader::TextureType GraphicsEnvironment::ReadTextureType(u32 handle) { 305Shader::TextureType GraphicsEnvironment::ReadTextureType(u32 handle) {
306 const auto& regs{maxwell3d->regs}; 306 const auto& regs{maxwell3d->regs};
307 const bool via_header_index{regs.sampler_index == Maxwell::SamplerIndex::ViaHeaderIndex}; 307 const bool via_header_index{regs.sampler_binding == Maxwell::SamplerBinding::ViaHeaderBinding};
308 return ReadTextureTypeImpl(regs.tic.Address(), regs.tic.limit, via_header_index, handle); 308 return ReadTextureTypeImpl(regs.tex_header.Address(), regs.tex_header.limit, via_header_index,
309 handle);
309} 310}
310 311
311ComputeEnvironment::ComputeEnvironment(Tegra::Engines::KeplerCompute& kepler_compute_, 312ComputeEnvironment::ComputeEnvironment(Tegra::Engines::KeplerCompute& kepler_compute_,