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-rw-r--r--src/video_core/shader/decode/arithmetic_integer.cpp18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/video_core/shader/decode/arithmetic_integer.cpp b/src/video_core/shader/decode/arithmetic_integer.cpp
index a33d242e9..9208b7bef 100644
--- a/src/video_core/shader/decode/arithmetic_integer.cpp
+++ b/src/video_core/shader/decode/arithmetic_integer.cpp
@@ -130,6 +130,24 @@ u32 ShaderIR::DecodeArithmeticInteger(NodeBlock& bb, u32 pc) {
130 SetRegister(bb, instr.gpr0, value); 130 SetRegister(bb, instr.gpr0, value);
131 break; 131 break;
132 } 132 }
133 case OpCode::Id::FLO_R:
134 case OpCode::Id::FLO_C:
135 case OpCode::Id::FLO_IMM: {
136 Node value;
137 if (instr.flo.invert) {
138 op_b = Operation(OperationCode::IBitwiseNot, NO_PRECISE, op_b);
139 }
140 if (instr.flo.is_signed) {
141 value = Operation(OperationCode::IBitMSB, NO_PRECISE, op_b);
142 } else {
143 value = Operation(OperationCode::UBitMSB, NO_PRECISE, op_b);
144 }
145 if (instr.flo.sh) {
146 value = Operation(OperationCode::UBitwiseXor, NO_PRECISE, value, Immediate(31));
147 }
148 SetRegister(bb, instr.gpr0, value);
149 break;
150 }
133 case OpCode::Id::SEL_C: 151 case OpCode::Id::SEL_C:
134 case OpCode::Id::SEL_R: 152 case OpCode::Id::SEL_R:
135 case OpCode::Id::SEL_IMM: { 153 case OpCode::Id::SEL_IMM: {