diff options
Diffstat (limited to 'src/video_core/regs_shader.h')
| -rw-r--r-- | src/video_core/regs_shader.h | 111 |
1 files changed, 0 insertions, 111 deletions
diff --git a/src/video_core/regs_shader.h b/src/video_core/regs_shader.h deleted file mode 100644 index c15d4d162..000000000 --- a/src/video_core/regs_shader.h +++ /dev/null | |||
| @@ -1,111 +0,0 @@ | |||
| 1 | // Copyright 2017 Citra Emulator Project | ||
| 2 | // Licensed under GPLv2 or any later version | ||
| 3 | // Refer to the license.txt file included. | ||
| 4 | |||
| 5 | #pragma once | ||
| 6 | |||
| 7 | #include <array> | ||
| 8 | |||
| 9 | #include "common/bit_field.h" | ||
| 10 | #include "common/common_funcs.h" | ||
| 11 | #include "common/common_types.h" | ||
| 12 | |||
| 13 | namespace Pica { | ||
| 14 | |||
| 15 | struct ShaderRegs { | ||
| 16 | BitField<0, 16, u32> bool_uniforms; | ||
| 17 | |||
| 18 | union { | ||
| 19 | BitField<0, 8, u32> x; | ||
| 20 | BitField<8, 8, u32> y; | ||
| 21 | BitField<16, 8, u32> z; | ||
| 22 | BitField<24, 8, u32> w; | ||
| 23 | } int_uniforms[4]; | ||
| 24 | |||
| 25 | INSERT_PADDING_WORDS(0x4); | ||
| 26 | |||
| 27 | enum ShaderMode { | ||
| 28 | GS = 0x08, | ||
| 29 | VS = 0xA0, | ||
| 30 | }; | ||
| 31 | |||
| 32 | union { | ||
| 33 | // Number of input attributes to shader unit - 1 | ||
| 34 | BitField<0, 4, u32> max_input_attribute_index; | ||
| 35 | BitField<8, 8, u32> input_to_uniform; | ||
| 36 | BitField<24, 8, ShaderMode> shader_mode; | ||
| 37 | }; | ||
| 38 | |||
| 39 | // Offset to shader program entry point (in words) | ||
| 40 | BitField<0, 16, u32> main_offset; | ||
| 41 | |||
| 42 | /// Maps input attributes to registers. 4-bits per attribute, specifying a register index | ||
| 43 | u32 input_attribute_to_register_map_low; | ||
| 44 | u32 input_attribute_to_register_map_high; | ||
| 45 | |||
| 46 | unsigned int GetRegisterForAttribute(unsigned int attribute_index) const { | ||
| 47 | u64 map = ((u64)input_attribute_to_register_map_high << 32) | | ||
| 48 | (u64)input_attribute_to_register_map_low; | ||
| 49 | return (map >> (attribute_index * 4)) & 0b1111; | ||
| 50 | } | ||
| 51 | |||
| 52 | BitField<0, 16, u32> output_mask; | ||
| 53 | |||
| 54 | // 0x28E, CODETRANSFER_END | ||
| 55 | INSERT_PADDING_WORDS(0x2); | ||
| 56 | |||
| 57 | struct { | ||
| 58 | enum Format : u32 { | ||
| 59 | FLOAT24 = 0, | ||
| 60 | FLOAT32 = 1, | ||
| 61 | }; | ||
| 62 | |||
| 63 | bool IsFloat32() const { | ||
| 64 | return format == FLOAT32; | ||
| 65 | } | ||
| 66 | |||
| 67 | union { | ||
| 68 | // Index of the next uniform to write to | ||
| 69 | // TODO: ctrulib uses 8 bits for this, however that seems to yield lots of invalid | ||
| 70 | // indices | ||
| 71 | // TODO: Maybe the uppermost index is for the geometry shader? Investigate! | ||
| 72 | BitField<0, 7, u32> index; | ||
| 73 | |||
| 74 | BitField<31, 1, Format> format; | ||
| 75 | }; | ||
| 76 | |||
| 77 | // Writing to these registers sets the current uniform. | ||
| 78 | u32 set_value[8]; | ||
| 79 | |||
| 80 | } uniform_setup; | ||
| 81 | |||
| 82 | INSERT_PADDING_WORDS(0x2); | ||
| 83 | |||
| 84 | struct { | ||
| 85 | // Offset of the next instruction to write code to. | ||
| 86 | // Incremented with each instruction write. | ||
| 87 | u32 offset; | ||
| 88 | |||
| 89 | // Writing to these registers sets the "current" word in the shader program. | ||
| 90 | u32 set_word[8]; | ||
| 91 | } program; | ||
| 92 | |||
| 93 | INSERT_PADDING_WORDS(0x1); | ||
| 94 | |||
| 95 | // This register group is used to load an internal table of swizzling patterns, | ||
| 96 | // which are indexed by each shader instruction to specify vector component swizzling. | ||
| 97 | struct { | ||
| 98 | // Offset of the next swizzle pattern to write code to. | ||
| 99 | // Incremented with each instruction write. | ||
| 100 | u32 offset; | ||
| 101 | |||
| 102 | // Writing to these registers sets the current swizzle pattern in the table. | ||
| 103 | u32 set_word[8]; | ||
| 104 | } swizzle_patterns; | ||
| 105 | |||
| 106 | INSERT_PADDING_WORDS(0x2); | ||
| 107 | }; | ||
| 108 | |||
| 109 | static_assert(sizeof(ShaderRegs) == 0x30 * sizeof(u32), "ShaderRegs struct has incorrect size"); | ||
| 110 | |||
| 111 | } // namespace Pica | ||