1 files changed, 43 insertions, 43 deletions
diff --git a/src/video_core/gpu.h b/src/video_core/gpu.h
index 464f5c7d6..d646c441c 100644
--- a/src/video_core/gpu.h
+++ b/src/video_core/gpu.h
@@ -39,42 +39,42 @@ namespace Tegra {
 enum class RenderTargetFormat : u32 {
    NONE = 0x0,
-    RGBA32_FLOAT = 0xC0,
+    R32B32G32A32_FLOAT = 0xC0,
-    RGBA32_SINT = 0xC1,
+    R32G32B32A32_SINT = 0xC1,
-    RGBA32_UINT = 0xC2,
+    R32G32B32A32_UINT = 0xC2,
-    RGBA16_UNORM = 0xC6,
+    R16G16B16A16_UNORM = 0xC6,
-    RGBA16_SNORM = 0xC7,
+    R16G16B16A16_SNORM = 0xC7,
-    RGBA16_SINT = 0xC8,
+    R16G16B16A16_SINT = 0xC8,
-    RGBA16_UINT = 0xC9,
+    R16G16B16A16_UINT = 0xC9,
-    RGBA16_FLOAT = 0xCA,
+    R16G16B16A16_FLOAT = 0xCA,
-    RG32_FLOAT = 0xCB,
+    R32G32_FLOAT = 0xCB,
-    RG32_SINT = 0xCC,
+    R32G32_SINT = 0xCC,
-    RG32_UINT = 0xCD,
+    R32G32_UINT = 0xCD,
-    RGBX16_FLOAT = 0xCE,
+    R16G16B16X16_FLOAT = 0xCE,
-    BGRA8_UNORM = 0xCF,
+    B8G8R8A8_UNORM = 0xCF,
-    BGRA8_SRGB = 0xD0,
+    B8G8R8A8_SRGB = 0xD0,
-    RGB10_A2_UNORM = 0xD1,
+    A2B10G10R10_UNORM = 0xD1,
-    RGB10_A2_UINT = 0xD2,
+    A2B10G10R10_UINT = 0xD2,
-    RGBA8_UNORM = 0xD5,
+    A8B8G8R8_UNORM = 0xD5,
-    RGBA8_SRGB = 0xD6,
+    A8B8G8R8_SRGB = 0xD6,
-    RGBA8_SNORM = 0xD7,
+    A8B8G8R8_SNORM = 0xD7,
-    RGBA8_SINT = 0xD8,
+    A8B8G8R8_SINT = 0xD8,
-    RGBA8_UINT = 0xD9,
+    A8B8G8R8_UINT = 0xD9,
-    RG16_UNORM = 0xDA,
+    R16G16_UNORM = 0xDA,
-    RG16_SNORM = 0xDB,
+    R16G16_SNORM = 0xDB,
-    RG16_SINT = 0xDC,
+    R16G16_SINT = 0xDC,
-    RG16_UINT = 0xDD,
+    R16G16_UINT = 0xDD,
-    RG16_FLOAT = 0xDE,
+    R16G16_FLOAT = 0xDE,
-    R11G11B10_FLOAT = 0xE0,
+    B10G11R11_FLOAT = 0xE0,
    R32_SINT = 0xE3,
    R32_UINT = 0xE4,
    R32_FLOAT = 0xE5,
-    B5G6R5_UNORM = 0xE8,
+    R5G6B5_UNORM = 0xE8,
-    BGR5A1_UNORM = 0xE9,
+    A1R5G5B5_UNORM = 0xE9,
-    RG8_UNORM = 0xEA,
+    R8G8_UNORM = 0xEA,
-    RG8_SNORM = 0xEB,
+    R8G8_SNORM = 0xEB,
-    RG8_SINT = 0xEC,
+    R8G8_SINT = 0xEC,
-    RG8_UINT = 0xED,
+    R8G8_UINT = 0xED,
    R16_UNORM = 0xEE,
    R16_SNORM = 0xEF,
    R16_SINT = 0xF0,
@@ -87,13 +87,13 @@ enum class RenderTargetFormat : u32 {
 };
 enum class DepthFormat : u32 {
-    Z32_FLOAT = 0xA,
+    D32_FLOAT = 0xA,
-    Z16_UNORM = 0x13,
+    D16_UNORM = 0x13,
-    S8_Z24_UNORM = 0x14,
+    S8_UINT_Z24_UNORM = 0x14,
-    Z24_X8_UNORM = 0x15,
+    D24X8_UNORM = 0x15,
-    Z24_S8_UNORM = 0x16,
+    D24S8_UNORM = 0x16,
-    Z24_C8_UNORM = 0x18,
+    D24C8_UNORM = 0x18,
-    Z32_S8_X24_FLOAT = 0x19,
+    D32_FLOAT_S8X24_UINT = 0x19,
 };
 struct CommandListHeader;
@@ -104,9 +104,9 @@ class DebugContext;
 */
 struct FramebufferConfig {
    enum class PixelFormat : u32 {
-        ABGR8 = 1,
+        A8B8G8R8_UNORM = 1,
-        RGB565 = 4,
+        RGB565_UNORM = 4,
-        BGRA8 = 5,
+        B8G8R8A8_UNORM = 5,
    };
    VAddr address;

diff --git a/src/video_core/gpu.h b/src/video_core/gpu.h index 464f5c7d6..d646c441c 100644 --- a/src/video_core/gpu.h +++ b/src/video_core/gpu.h
@@ -39,42 +39,42 @@ namespace Tegra {
39		39
40	enum class RenderTargetFormat : u32 {	40	enum class RenderTargetFormat : u32 {
41	NONE = 0x0,	41	NONE = 0x0,
42	RGBA32_FLOAT = 0xC0,	42	R32B32G32A32_FLOAT = 0xC0,
43	RGBA32_SINT = 0xC1,	43	R32G32B32A32_SINT = 0xC1,
44	RGBA32_UINT = 0xC2,	44	R32G32B32A32_UINT = 0xC2,
45	RGBA16_UNORM = 0xC6,	45	R16G16B16A16_UNORM = 0xC6,
46	RGBA16_SNORM = 0xC7,	46	R16G16B16A16_SNORM = 0xC7,
47	RGBA16_SINT = 0xC8,	47	R16G16B16A16_SINT = 0xC8,
48	RGBA16_UINT = 0xC9,	48	R16G16B16A16_UINT = 0xC9,
49	RGBA16_FLOAT = 0xCA,	49	R16G16B16A16_FLOAT = 0xCA,
50	RG32_FLOAT = 0xCB,	50	R32G32_FLOAT = 0xCB,
51	RG32_SINT = 0xCC,	51	R32G32_SINT = 0xCC,
52	RG32_UINT = 0xCD,	52	R32G32_UINT = 0xCD,
53	RGBX16_FLOAT = 0xCE,	53	R16G16B16X16_FLOAT = 0xCE,
54	BGRA8_UNORM = 0xCF,	54	B8G8R8A8_UNORM = 0xCF,
55	BGRA8_SRGB = 0xD0,	55	B8G8R8A8_SRGB = 0xD0,
56	RGB10_A2_UNORM = 0xD1,	56	A2B10G10R10_UNORM = 0xD1,
57	RGB10_A2_UINT = 0xD2,	57	A2B10G10R10_UINT = 0xD2,
58	RGBA8_UNORM = 0xD5,	58	A8B8G8R8_UNORM = 0xD5,
59	RGBA8_SRGB = 0xD6,	59	A8B8G8R8_SRGB = 0xD6,
60	RGBA8_SNORM = 0xD7,	60	A8B8G8R8_SNORM = 0xD7,
61	RGBA8_SINT = 0xD8,	61	A8B8G8R8_SINT = 0xD8,
62	RGBA8_UINT = 0xD9,	62	A8B8G8R8_UINT = 0xD9,
63	RG16_UNORM = 0xDA,	63	R16G16_UNORM = 0xDA,
64	RG16_SNORM = 0xDB,	64	R16G16_SNORM = 0xDB,
65	RG16_SINT = 0xDC,	65	R16G16_SINT = 0xDC,
66	RG16_UINT = 0xDD,	66	R16G16_UINT = 0xDD,
67	RG16_FLOAT = 0xDE,	67	R16G16_FLOAT = 0xDE,
68	R11G11B10_FLOAT = 0xE0,	68	B10G11R11_FLOAT = 0xE0,
69	R32_SINT = 0xE3,	69	R32_SINT = 0xE3,
70	R32_UINT = 0xE4,	70	R32_UINT = 0xE4,
71	R32_FLOAT = 0xE5,	71	R32_FLOAT = 0xE5,
72	B5G6R5_UNORM = 0xE8,	72	R5G6B5_UNORM = 0xE8,
73	BGR5A1_UNORM = 0xE9,	73	A1R5G5B5_UNORM = 0xE9,
74	RG8_UNORM = 0xEA,	74	R8G8_UNORM = 0xEA,
75	RG8_SNORM = 0xEB,	75	R8G8_SNORM = 0xEB,
76	RG8_SINT = 0xEC,	76	R8G8_SINT = 0xEC,
77	RG8_UINT = 0xED,	77	R8G8_UINT = 0xED,
78	R16_UNORM = 0xEE,	78	R16_UNORM = 0xEE,
79	R16_SNORM = 0xEF,	79	R16_SNORM = 0xEF,
80	R16_SINT = 0xF0,	80	R16_SINT = 0xF0,
@@ -87,13 +87,13 @@ enum class RenderTargetFormat : u32 {
87	};	87	};
88		88
89	enum class DepthFormat : u32 {	89	enum class DepthFormat : u32 {
90	Z32_FLOAT = 0xA,	90	D32_FLOAT = 0xA,
91	Z16_UNORM = 0x13,	91	D16_UNORM = 0x13,
92	S8_Z24_UNORM = 0x14,	92	S8_UINT_Z24_UNORM = 0x14,
93	Z24_X8_UNORM = 0x15,	93	D24X8_UNORM = 0x15,
94	Z24_S8_UNORM = 0x16,	94	D24S8_UNORM = 0x16,
95	Z24_C8_UNORM = 0x18,	95	D24C8_UNORM = 0x18,
96	Z32_S8_X24_FLOAT = 0x19,	96	D32_FLOAT_S8X24_UINT = 0x19,
97	};	97	};
98		98
99	struct CommandListHeader;	99	struct CommandListHeader;
@@ -104,9 +104,9 @@ class DebugContext;
104	*/	104	*/
105	struct FramebufferConfig {	105	struct FramebufferConfig {
106	enum class PixelFormat : u32 {	106	enum class PixelFormat : u32 {
107	ABGR8 = 1,	107	A8B8G8R8_UNORM = 1,
108	RGB565 = 4,	108	RGB565_UNORM = 4,
109	BGRA8 = 5,	109	B8G8R8A8_UNORM = 5,
110	};	110	};
111		111
112	VAddr address;	112	VAddr address;