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Diffstat (limited to 'src/video_core/gpu.h')
| -rw-r--r-- | src/video_core/gpu.h | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/src/video_core/gpu.h b/src/video_core/gpu.h new file mode 100644 index 000000000..a961f3fd4 --- /dev/null +++ b/src/video_core/gpu.h | |||
| @@ -0,0 +1,55 @@ | |||
| 1 | // Copyright 2018 yuzu Emulator Project | ||
| 2 | // Licensed under GPLv2 or any later version | ||
| 3 | // Refer to the license.txt file included. | ||
| 4 | |||
| 5 | #pragma once | ||
| 6 | |||
| 7 | #include <memory> | ||
| 8 | #include <unordered_map> | ||
| 9 | #include "common/common_types.h" | ||
| 10 | #include "video_core/engines/fermi_2d.h" | ||
| 11 | #include "video_core/engines/maxwell_3d.h" | ||
| 12 | #include "video_core/engines/maxwell_compute.h" | ||
| 13 | #include "video_core/memory_manager.h" | ||
| 14 | |||
| 15 | namespace Tegra { | ||
| 16 | |||
| 17 | enum class EngineID { | ||
| 18 | FERMI_TWOD_A = 0x902D, // 2D Engine | ||
| 19 | MAXWELL_B = 0xB197, // 3D Engine | ||
| 20 | MAXWELL_COMPUTE_B = 0xB1C0, | ||
| 21 | KEPLER_INLINE_TO_MEMORY_B = 0xA140, | ||
| 22 | MAXWELL_DMA_COPY_A = 0xB0B5, | ||
| 23 | }; | ||
| 24 | |||
| 25 | class GPU final { | ||
| 26 | public: | ||
| 27 | GPU() { | ||
| 28 | memory_manager = std::make_unique<MemoryManager>(); | ||
| 29 | maxwell_3d = std::make_unique<Engines::Maxwell3D>(); | ||
| 30 | fermi_2d = std::make_unique<Engines::Fermi2D>(); | ||
| 31 | maxwell_compute = std::make_unique<Engines::MaxwellCompute>(); | ||
| 32 | } | ||
| 33 | ~GPU() = default; | ||
| 34 | |||
| 35 | /// Processes a command list stored at the specified address in GPU memory. | ||
| 36 | void ProcessCommandList(GPUVAddr address, u32 size); | ||
| 37 | |||
| 38 | std::unique_ptr<MemoryManager> memory_manager; | ||
| 39 | |||
| 40 | private: | ||
| 41 | /// Writes a single register in the engine bound to the specified subchannel | ||
| 42 | void WriteReg(u32 method, u32 subchannel, u32 value); | ||
| 43 | |||
| 44 | /// Mapping of command subchannels to their bound engine ids. | ||
| 45 | std::unordered_map<u32, EngineID> bound_engines; | ||
| 46 | |||
| 47 | /// 3D engine | ||
| 48 | std::unique_ptr<Engines::Maxwell3D> maxwell_3d; | ||
| 49 | /// 2D engine | ||
| 50 | std::unique_ptr<Engines::Fermi2D> fermi_2d; | ||
| 51 | /// Compute engine | ||
| 52 | std::unique_ptr<Engines::MaxwellCompute> maxwell_compute; | ||
| 53 | }; | ||
| 54 | |||
| 55 | } // namespace Tegra | ||