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1// MIT License
2//
3// Copyright (c) Ryujinx Team and Contributors
4//
5// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and
6// associated documentation files (the "Software"), to deal in the Software without restriction,
7// including without limitation the rights to use, copy, modify, merge, publish, distribute,
8// sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is
9// furnished to do so, subject to the following conditions:
10//
11// The above copyright notice and this permission notice shall be included in all copies or
12// substantial portions of the Software.
13//
14// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT
15// NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16// NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
17// DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
19//
20
21#include "command_classes/host1x.h"
22#include "command_classes/nvdec.h"
23#include "command_classes/vic.h"
24#include "common/bit_util.h"
25#include "video_core/cdma_pusher.h"
26#include "video_core/command_classes/nvdec_common.h"
27#include "video_core/engines/maxwell_3d.h"
28#include "video_core/gpu.h"
29#include "video_core/memory_manager.h"
30
31namespace Tegra {
32CDmaPusher::CDmaPusher(GPU& gpu_)
33 : gpu{gpu_}, nvdec_processor(std::make_shared<Nvdec>(gpu)),
34 vic_processor(std::make_unique<Vic>(gpu, nvdec_processor)),
35 host1x_processor(std::make_unique<Host1x>(gpu)),
36 sync_manager(std::make_unique<SyncptIncrManager>(gpu)) {}
37
38CDmaPusher::~CDmaPusher() = default;
39
40void CDmaPusher::Push(ChCommandHeaderList&& entries) {
41 cdma_queue.push(std::move(entries));
42}
43
44void CDmaPusher::DispatchCalls() {
45 while (!cdma_queue.empty()) {
46 Step();
47 }
48}
49
50void CDmaPusher::Step() {
51 const auto entries{cdma_queue.front()};
52 cdma_queue.pop();
53
54 std::vector<u32> values(entries.size());
55 std::memcpy(values.data(), entries.data(), entries.size() * sizeof(u32));
56
57 for (const u32 value : values) {
58 if (mask != 0) {
59 const u32 lbs = Common::CountTrailingZeroes32(mask);
60 mask &= ~(1U << lbs);
61 ExecuteCommand(static_cast<u32>(offset + lbs), value);
62 continue;
63 } else if (count != 0) {
64 --count;
65 ExecuteCommand(static_cast<u32>(offset), value);
66 if (incrementing) {
67 ++offset;
68 }
69 continue;
70 }
71 const auto mode = static_cast<ChSubmissionMode>((value >> 28) & 0xf);
72 switch (mode) {
73 case ChSubmissionMode::SetClass: {
74 mask = value & 0x3f;
75 offset = (value >> 16) & 0xfff;
76 current_class = static_cast<ChClassId>((value >> 6) & 0x3ff);
77 break;
78 }
79 case ChSubmissionMode::Incrementing:
80 case ChSubmissionMode::NonIncrementing:
81 count = value & 0xffff;
82 offset = (value >> 16) & 0xfff;
83 incrementing = mode == ChSubmissionMode::Incrementing;
84 break;
85 case ChSubmissionMode::Mask:
86 mask = value & 0xffff;
87 offset = (value >> 16) & 0xfff;
88 break;
89 case ChSubmissionMode::Immediate: {
90 const u32 data = value & 0xfff;
91 offset = (value >> 16) & 0xfff;
92 ExecuteCommand(static_cast<u32>(offset), data);
93 break;
94 }
95 default:
96 UNIMPLEMENTED_MSG("ChSubmission mode {} is not implemented!", static_cast<u32>(mode));
97 break;
98 }
99 }
100}
101
102void CDmaPusher::ExecuteCommand(u32 state_offset, u32 data) {
103 switch (current_class) {
104 case ChClassId::NvDec:
105 ThiStateWrite(nvdec_thi_state, state_offset, {data});
106 switch (static_cast<ThiMethod>(state_offset)) {
107 case ThiMethod::IncSyncpt: {
108 LOG_DEBUG(Service_NVDRV, "NVDEC Class IncSyncpt Method");
109 const auto syncpoint_id = static_cast<u32>(data & 0xFF);
110 const auto cond = static_cast<u32>((data >> 8) & 0xFF);
111 if (cond == 0) {
112 sync_manager->Increment(syncpoint_id);
113 } else {
114 sync_manager->SignalDone(
115 sync_manager->IncrementWhenDone(static_cast<u32>(current_class), syncpoint_id));
116 }
117 break;
118 }
119 case ThiMethod::SetMethod1:
120 LOG_DEBUG(Service_NVDRV, "NVDEC method 0x{:X}",
121 static_cast<u32>(nvdec_thi_state.method_0));
122 nvdec_processor->ProcessMethod(static_cast<Nvdec::Method>(nvdec_thi_state.method_0),
123 {data});
124 break;
125 default:
126 break;
127 }
128 break;
129 case ChClassId::GraphicsVic:
130 ThiStateWrite(vic_thi_state, static_cast<u32>(state_offset), {data});
131 switch (static_cast<ThiMethod>(state_offset)) {
132 case ThiMethod::IncSyncpt: {
133 LOG_DEBUG(Service_NVDRV, "VIC Class IncSyncpt Method");
134 const auto syncpoint_id = static_cast<u32>(data & 0xFF);
135 const auto cond = static_cast<u32>((data >> 8) & 0xFF);
136 if (cond == 0) {
137 sync_manager->Increment(syncpoint_id);
138 } else {
139 sync_manager->SignalDone(
140 sync_manager->IncrementWhenDone(static_cast<u32>(current_class), syncpoint_id));
141 }
142 break;
143 }
144 case ThiMethod::SetMethod1:
145 LOG_DEBUG(Service_NVDRV, "VIC method 0x{:X}, Args=({})",
146 static_cast<u32>(vic_thi_state.method_0), data);
147 vic_processor->ProcessMethod(static_cast<Vic::Method>(vic_thi_state.method_0), {data});
148 break;
149 default:
150 break;
151 }
152 break;
153 case ChClassId::Host1x:
154 // This device is mainly for syncpoint synchronization
155 LOG_DEBUG(Service_NVDRV, "Host1X Class Method");
156 host1x_processor->ProcessMethod(static_cast<Host1x::Method>(state_offset), {data});
157 break;
158 default:
159 UNIMPLEMENTED_MSG("Current class not implemented {:X}", static_cast<u32>(current_class));
160 break;
161 }
162}
163
164void CDmaPusher::ThiStateWrite(ThiRegisters& state, u32 state_offset,
165 const std::vector<u32>& arguments) {
166 u8* const state_offset_ptr = reinterpret_cast<u8*>(&state) + sizeof(u32) * state_offset;
167 std::memcpy(state_offset_ptr, arguments.data(), sizeof(u32) * arguments.size());
168}
169
170} // namespace Tegra
HIC SVNT DRACONES