diff options
Diffstat (limited to 'src/shader_recompiler')
| -rw-r--r-- | src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_add.cpp | 35 |
1 files changed, 16 insertions, 19 deletions
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_add.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_add.cpp index 6965adfb3..c292d5e87 100644 --- a/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_add.cpp +++ b/src/shader_recompiler/frontend/maxwell/translate/impl/half_floating_point_add.cpp | |||
| @@ -107,54 +107,52 @@ void HADD2(TranslatorVisitor& v, u64 insn, Merge merge, bool ftz, bool sat, bool | |||
| 107 | } | 107 | } |
| 108 | v.X(hadd2.dest_reg, MergeResult(v.ir, hadd2.dest_reg, lhs, rhs, merge)); | 108 | v.X(hadd2.dest_reg, MergeResult(v.ir, hadd2.dest_reg, lhs, rhs, merge)); |
| 109 | } | 109 | } |
| 110 | } // Anonymous namespace | ||
| 111 | 110 | ||
| 112 | void TranslatorVisitor::HADD2_reg(u64 insn) { | 111 | void HADD2(TranslatorVisitor& v, u64 insn, bool sat, bool abs_b, bool neg_b, Swizzle swizzle_b, |
| 112 | const IR::U32& src_b) { | ||
| 113 | union { | 113 | union { |
| 114 | u64 raw; | 114 | u64 raw; |
| 115 | BitField<49, 2, Merge> merge; | 115 | BitField<49, 2, Merge> merge; |
| 116 | BitField<39, 1, u64> ftz; | 116 | BitField<39, 1, u64> ftz; |
| 117 | BitField<32, 1, u64> sat; | ||
| 118 | BitField<43, 1, u64> neg_a; | 117 | BitField<43, 1, u64> neg_a; |
| 119 | BitField<44, 1, u64> abs_a; | 118 | BitField<44, 1, u64> abs_a; |
| 120 | BitField<47, 2, Swizzle> swizzle_a; | 119 | BitField<47, 2, Swizzle> swizzle_a; |
| 120 | } const hadd2{insn}; | ||
| 121 | |||
| 122 | HADD2(v, insn, hadd2.merge, hadd2.ftz != 0, sat, hadd2.abs_a != 0, hadd2.neg_a != 0, | ||
| 123 | hadd2.swizzle_a, abs_b, neg_b, swizzle_b, src_b); | ||
| 124 | } | ||
| 125 | } // Anonymous namespace | ||
| 126 | |||
| 127 | void TranslatorVisitor::HADD2_reg(u64 insn) { | ||
| 128 | union { | ||
| 129 | u64 raw; | ||
| 130 | BitField<32, 1, u64> sat; | ||
| 121 | BitField<31, 1, u64> neg_b; | 131 | BitField<31, 1, u64> neg_b; |
| 122 | BitField<30, 1, u64> abs_b; | 132 | BitField<30, 1, u64> abs_b; |
| 123 | BitField<28, 2, Swizzle> swizzle_b; | 133 | BitField<28, 2, Swizzle> swizzle_b; |
| 124 | } const hadd2{insn}; | 134 | } const hadd2{insn}; |
| 125 | 135 | ||
| 126 | HADD2(*this, insn, hadd2.merge, hadd2.ftz != 0, hadd2.sat != 0, hadd2.abs_a != 0, | 136 | HADD2(*this, insn, hadd2.sat != 0, hadd2.abs_b != 0, hadd2.neg_b != 0, hadd2.swizzle_b, |
| 127 | hadd2.neg_a != 0, hadd2.swizzle_a, hadd2.abs_b != 0, hadd2.neg_b != 0, hadd2.swizzle_b, | ||
| 128 | GetReg20(insn)); | 137 | GetReg20(insn)); |
| 129 | } | 138 | } |
| 130 | 139 | ||
| 131 | void TranslatorVisitor::HADD2_cbuf(u64 insn) { | 140 | void TranslatorVisitor::HADD2_cbuf(u64 insn) { |
| 132 | union { | 141 | union { |
| 133 | u64 raw; | 142 | u64 raw; |
| 134 | BitField<49, 2, Merge> merge; | ||
| 135 | BitField<39, 1, u64> ftz; | ||
| 136 | BitField<52, 1, u64> sat; | 143 | BitField<52, 1, u64> sat; |
| 137 | BitField<43, 1, u64> neg_a; | ||
| 138 | BitField<44, 1, u64> abs_a; | ||
| 139 | BitField<47, 2, Swizzle> swizzle_a; | ||
| 140 | BitField<56, 1, u64> neg_b; | 144 | BitField<56, 1, u64> neg_b; |
| 141 | BitField<54, 1, u64> abs_b; | 145 | BitField<54, 1, u64> abs_b; |
| 142 | } const hadd2{insn}; | 146 | } const hadd2{insn}; |
| 143 | 147 | ||
| 144 | HADD2(*this, insn, hadd2.merge, hadd2.ftz != 0, hadd2.sat != 0, hadd2.abs_a != 0, | 148 | HADD2(*this, insn, hadd2.sat != 0, hadd2.abs_b != 0, hadd2.neg_b != 0, Swizzle::F32, |
| 145 | hadd2.neg_a != 0, hadd2.swizzle_a, hadd2.abs_b != 0, hadd2.neg_b != 0, Swizzle::F32, | ||
| 146 | GetCbuf(insn)); | 149 | GetCbuf(insn)); |
| 147 | } | 150 | } |
| 148 | 151 | ||
| 149 | void TranslatorVisitor::HADD2_imm(u64 insn) { | 152 | void TranslatorVisitor::HADD2_imm(u64 insn) { |
| 150 | union { | 153 | union { |
| 151 | u64 raw; | 154 | u64 raw; |
| 152 | BitField<49, 2, Merge> merge; | ||
| 153 | BitField<39, 1, u64> ftz; | ||
| 154 | BitField<52, 1, u64> sat; | 155 | BitField<52, 1, u64> sat; |
| 155 | BitField<43, 1, u64> neg_a; | ||
| 156 | BitField<44, 1, u64> abs_a; | ||
| 157 | BitField<47, 2, Swizzle> swizzle_a; | ||
| 158 | BitField<56, 1, u64> neg_high; | 156 | BitField<56, 1, u64> neg_high; |
| 159 | BitField<30, 9, u64> high; | 157 | BitField<30, 9, u64> high; |
| 160 | BitField<29, 1, u64> neg_low; | 158 | BitField<29, 1, u64> neg_low; |
| @@ -163,8 +161,7 @@ void TranslatorVisitor::HADD2_imm(u64 insn) { | |||
| 163 | 161 | ||
| 164 | const u32 imm{static_cast<u32>(hadd2.low << 6) | ((hadd2.neg_low != 0 ? 1 : 0) << 15) | | 162 | const u32 imm{static_cast<u32>(hadd2.low << 6) | ((hadd2.neg_low != 0 ? 1 : 0) << 15) | |
| 165 | static_cast<u32>(hadd2.high << 22) | ((hadd2.neg_high != 0 ? 1 : 0) << 31)}; | 163 | static_cast<u32>(hadd2.high << 22) | ((hadd2.neg_high != 0 ? 1 : 0) << 31)}; |
| 166 | HADD2(*this, insn, hadd2.merge, hadd2.ftz != 0, hadd2.sat != 0, hadd2.abs_a != 0, | 164 | HADD2(*this, insn, hadd2.sat != 0, false, false, Swizzle::H1_H0, ir.Imm32(imm)); |
| 167 | hadd2.neg_a != 0, hadd2.swizzle_a, false, false, Swizzle::H1_H0, ir.Imm32(imm)); | ||
| 168 | } | 165 | } |
| 169 | 166 | ||
| 170 | void TranslatorVisitor::HADD2_32I(u64 insn) { | 167 | void TranslatorVisitor::HADD2_32I(u64 insn) { |