35 files changed, 355 insertions, 123 deletions

diff --git a/src/shader_recompiler/CMakeLists.txt b/src/shader_recompiler/CMakeLists.txt
index bcdd60db9..545d69c7e 100644
--- a/src/shader_recompiler/CMakeLists.txt
+++ b/src/shader_recompiler/CMakeLists.txt
@@ -224,6 +224,7 @@ add_library(shader_recompiler STATIC
     ir_opt/lower_fp16_to_fp32.cpp
     ir_opt/lower_int64_to_int32.cpp
     ir_opt/passes.h
+    ir_opt/position_pass.cpp
     ir_opt/rescaling_pass.cpp
     ir_opt/ssa_rewrite_pass.cpp
     ir_opt/texture_pass.cpp
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm.cpp b/src/shader_recompiler/backend/glasm/emit_glasm.cpp
index 01f9abc71..3b0176bf6 100644
--- a/src/shader_recompiler/backend/glasm/emit_glasm.cpp
+++ b/src/shader_recompiler/backend/glasm/emit_glasm.cpp
@@ -450,6 +450,9 @@ std::string EmitGLASM(const Profile& profile, const RuntimeInfo& runtime_info, I
     if (program.info.uses_rescaling_uniform) {
         header += "PARAM scaling[1]={program.local[0..0]};";
     }
+    if (program.info.uses_render_area) {
+        header += "PARAM render_area[1]={program.local[1..1]};";
+    }
     header += "TEMP ";
     for (size_t index = 0; index < ctx.reg_alloc.NumUsedRegisters(); ++index) {
         header += fmt::format("R{},", index);
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_bitwise_conversion.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_bitwise_conversion.cpp
index 2fc2a0ac6..5bfdecc09 100644
--- a/src/shader_recompiler/backend/glasm/emit_glasm_bitwise_conversion.cpp
+++ b/src/shader_recompiler/backend/glasm/emit_glasm_bitwise_conversion.cpp
@@ -43,6 +43,10 @@ void EmitBitCastU64F64(EmitContext&, IR::Inst& inst, const IR::Value& value) {
     Alias(inst, value);
 }
 
+void EmitBitCastS32F32(EmitContext&, IR::Inst& inst, const IR::Value& value) {
+    Alias(inst, value);
+}
+
 void EmitBitCastF16U16(EmitContext&, IR::Inst& inst, const IR::Value& value) {
     Alias(inst, value);
 }
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp
index 7e8f37563..d6562c842 100644
--- a/src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp
+++ b/src/shader_recompiler/backend/glasm/emit_glasm_context_get_set.cpp
@@ -379,6 +379,18 @@ void EmitInvocationId(EmitContext& ctx, IR::Inst& inst) {
     ctx.Add("MOV.S {}.x,primitive_invocation.x;", inst);
 }
 
+void EmitInvocationInfo(EmitContext& ctx, IR::Inst& inst) {
+    switch (ctx.stage) {
+    case Stage::TessellationControl:
+    case Stage::TessellationEval:
+        ctx.Add("SHL.U {}.x,primitive.vertexcount,16;", inst);
+        break;
+    default:
+        LOG_WARNING(Shader, "(STUBBED) called");
+        ctx.Add("MOV.S {}.x,0x00ff0000;", inst);
+    }
+}
+
 void EmitSampleId(EmitContext& ctx, IR::Inst& inst) {
     ctx.Add("MOV.S {}.x,fragment.sampleid.x;", inst);
 }
@@ -396,6 +408,10 @@ void EmitResolutionDownFactor(EmitContext& ctx, IR::Inst& inst) {
     ctx.Add("MOV.F {}.x,scaling[0].z;", inst);
 }
 
+void EmitRenderArea(EmitContext& ctx, IR::Inst& inst) {
+    ctx.Add("MOV.F {},render_area[0];", inst);
+}
+
 void EmitLoadLocal(EmitContext& ctx, IR::Inst& inst, ScalarU32 word_offset) {
     ctx.Add("MOV.U {},lmem[{}].x;", inst, word_offset);
 }
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h b/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h
index 8b0ac3031..eaaf9ba39 100644
--- a/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h
+++ b/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h
@@ -69,10 +69,12 @@ void EmitSetOFlag(EmitContext& ctx);
 void EmitWorkgroupId(EmitContext& ctx, IR::Inst& inst);
 void EmitLocalInvocationId(EmitContext& ctx, IR::Inst& inst);
 void EmitInvocationId(EmitContext& ctx, IR::Inst& inst);
+void EmitInvocationInfo(EmitContext& ctx, IR::Inst& inst);
 void EmitSampleId(EmitContext& ctx, IR::Inst& inst);
 void EmitIsHelperInvocation(EmitContext& ctx, IR::Inst& inst);
 void EmitYDirection(EmitContext& ctx, IR::Inst& inst);
 void EmitResolutionDownFactor(EmitContext& ctx, IR::Inst& inst);
+void EmitRenderArea(EmitContext& ctx, IR::Inst& inst);
 void EmitLoadLocal(EmitContext& ctx, IR::Inst& inst, ScalarU32 word_offset);
 void EmitWriteLocal(EmitContext& ctx, ScalarU32 word_offset, ScalarU32 value);
 void EmitUndefU1(EmitContext& ctx, IR::Inst& inst);
@@ -195,6 +197,7 @@ void EmitSelectF64(EmitContext& ctx, ScalarS32 cond, Register true_value, Regist
 void EmitBitCastU16F16(EmitContext& ctx, IR::Inst& inst, const IR::Value& value);
 void EmitBitCastU32F32(EmitContext& ctx, IR::Inst& inst, const IR::Value& value);
 void EmitBitCastU64F64(EmitContext& ctx, IR::Inst& inst, const IR::Value& value);
+void EmitBitCastS32F32(EmitContext& ctx, IR::Inst& inst, const IR::Value& value);
 void EmitBitCastF16U16(EmitContext& ctx, IR::Inst& inst, const IR::Value& value);
 void EmitBitCastF32U32(EmitContext& ctx, IR::Inst& inst, const IR::Value& value);
 void EmitBitCastF64U64(EmitContext& ctx, IR::Inst& inst, const IR::Value& value);
diff --git a/src/shader_recompiler/backend/glasm/glasm_emit_context.cpp b/src/shader_recompiler/backend/glasm/glasm_emit_context.cpp
index 89603c1c4..333a91cc5 100644
--- a/src/shader_recompiler/backend/glasm/glasm_emit_context.cpp
+++ b/src/shader_recompiler/backend/glasm/glasm_emit_context.cpp
@@ -95,6 +95,10 @@ EmitContext::EmitContext(IR::Program& program, Bindings& bindings, const Profile
     if (info.uses_invocation_id) {
         Add("ATTRIB primitive_invocation=primitive.invocation;");
     }
+    if (info.uses_invocation_info &&
+        (stage == Stage::TessellationControl || stage == Stage::TessellationEval)) {
+        Add("ATTRIB primitive_vertexcount = primitive.vertexcount;");
+    }
     if (info.stores_tess_level_outer) {
         Add("OUTPUT result_patch_tessouter[]={{result.patch.tessouter[0..3]}};");
     }
diff --git a/src/shader_recompiler/backend/glsl/emit_glsl_bitwise_conversion.cpp b/src/shader_recompiler/backend/glsl/emit_glsl_bitwise_conversion.cpp
index 1be4a0f59..8e5e6cf1f 100644
--- a/src/shader_recompiler/backend/glsl/emit_glsl_bitwise_conversion.cpp
+++ b/src/shader_recompiler/backend/glsl/emit_glsl_bitwise_conversion.cpp
@@ -48,6 +48,10 @@ void EmitBitCastU64F64(EmitContext& ctx, IR::Inst& inst, std::string_view value)
     ctx.AddU64("{}=doubleBitsToUint64({});", inst, value);
 }
 
+void EmitBitCastS32F32(EmitContext& ctx, IR::Inst& inst, std::string_view value) {
+    ctx.AddF32("{}=ftoi({});", inst, value);
+}
+
 void EmitBitCastF16U16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst) {
     NotImplemented();
 }
diff --git a/src/shader_recompiler/backend/glsl/emit_glsl_context_get_set.cpp b/src/shader_recompiler/backend/glsl/emit_glsl_context_get_set.cpp
index fad8d1e30..c1671c37b 100644
--- a/src/shader_recompiler/backend/glsl/emit_glsl_context_get_set.cpp
+++ b/src/shader_recompiler/backend/glsl/emit_glsl_context_get_set.cpp
@@ -399,6 +399,18 @@ void EmitInvocationId(EmitContext& ctx, IR::Inst& inst) {
     ctx.AddU32("{}=uint(gl_InvocationID);", inst);
 }
 
+void EmitInvocationInfo(EmitContext& ctx, IR::Inst& inst) {
+    switch (ctx.stage) {
+    case Stage::TessellationControl:
+    case Stage::TessellationEval:
+        ctx.AddU32("{}=uint(gl_PatchVerticesIn)<<16;", inst);
+        break;
+    default:
+        LOG_WARNING(Shader, "(STUBBED) called");
+        ctx.AddU32("{}=uint(0x00ff0000);", inst);
+    }
+}
+
 void EmitSampleId(EmitContext& ctx, IR::Inst& inst) {
     ctx.AddU32("{}=uint(gl_SampleID);", inst);
 }
@@ -416,6 +428,10 @@ void EmitResolutionDownFactor(EmitContext& ctx, IR::Inst& inst) {
     ctx.AddF32("{}=scaling.z;", inst);
 }
 
+void EmitRenderArea(EmitContext& ctx, IR::Inst& inst) {
+    ctx.AddF32x4("{}=render_area;", inst);
+}
+
 void EmitLoadLocal(EmitContext& ctx, IR::Inst& inst, std::string_view word_offset) {
     ctx.AddU32("{}=lmem[{}];", inst, word_offset);
 }
diff --git a/src/shader_recompiler/backend/glsl/emit_glsl_instructions.h b/src/shader_recompiler/backend/glsl/emit_glsl_instructions.h
index 639691ba6..4151c89de 100644
--- a/src/shader_recompiler/backend/glsl/emit_glsl_instructions.h
+++ b/src/shader_recompiler/backend/glsl/emit_glsl_instructions.h
@@ -83,10 +83,12 @@ void EmitSetOFlag(EmitContext& ctx);
 void EmitWorkgroupId(EmitContext& ctx, IR::Inst& inst);
 void EmitLocalInvocationId(EmitContext& ctx, IR::Inst& inst);
 void EmitInvocationId(EmitContext& ctx, IR::Inst& inst);
+void EmitInvocationInfo(EmitContext& ctx, IR::Inst& inst);
 void EmitSampleId(EmitContext& ctx, IR::Inst& inst);
 void EmitIsHelperInvocation(EmitContext& ctx, IR::Inst& inst);
 void EmitYDirection(EmitContext& ctx, IR::Inst& inst);
 void EmitResolutionDownFactor(EmitContext& ctx, IR::Inst& inst);
+void EmitRenderArea(EmitContext& ctx, IR::Inst& inst);
 void EmitLoadLocal(EmitContext& ctx, IR::Inst& inst, std::string_view word_offset);
 void EmitWriteLocal(EmitContext& ctx, std::string_view word_offset, std::string_view value);
 void EmitUndefU1(EmitContext& ctx, IR::Inst& inst);
@@ -229,6 +231,7 @@ void EmitSelectF64(EmitContext& ctx, IR::Inst& inst, std::string_view cond,
 void EmitBitCastU16F16(EmitContext& ctx, IR::Inst& inst);
 void EmitBitCastU32F32(EmitContext& ctx, IR::Inst& inst, std::string_view value);
 void EmitBitCastU64F64(EmitContext& ctx, IR::Inst& inst, std::string_view value);
+void EmitBitCastS32F32(EmitContext& ctx, IR::Inst& inst, std::string_view value);
 void EmitBitCastF16U16(EmitContext& ctx, IR::Inst& inst);
 void EmitBitCastF32U32(EmitContext& ctx, IR::Inst& inst, std::string_view value);
 void EmitBitCastF64U64(EmitContext& ctx, IR::Inst& inst, std::string_view value);
diff --git a/src/shader_recompiler/backend/glsl/glsl_emit_context.cpp b/src/shader_recompiler/backend/glsl/glsl_emit_context.cpp
index c767a9dc3..5d01ec0cd 100644
--- a/src/shader_recompiler/backend/glsl/glsl_emit_context.cpp
+++ b/src/shader_recompiler/backend/glsl/glsl_emit_context.cpp
@@ -358,6 +358,9 @@ EmitContext::EmitContext(IR::Program& program, Bindings& bindings, const Profile
     if (info.uses_rescaling_uniform) {
         header += "layout(location=0) uniform vec4 scaling;";
     }
+    if (info.uses_render_area) {
+        header += "layout(location=1) uniform vec4 render_area;";
+    }
     DefineConstantBuffers(bindings);
     DefineConstantBufferIndirect();
     DefineStorageBuffers(bindings);
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.h b/src/shader_recompiler/backend/spirv/emit_spirv.h
index 7567b6fc9..937881484 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.h
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.h
@@ -23,8 +23,12 @@ struct RescalingLayout {
     alignas(16) std::array<u32, NUM_IMAGE_SCALING_WORDS> rescaling_images;
     u32 down_factor;
 };
+struct RenderAreaLayout {
+    std::array<f32, 4> render_area;
+};
 constexpr u32 RESCALING_LAYOUT_WORDS_OFFSET = offsetof(RescalingLayout, rescaling_textures);
 constexpr u32 RESCALING_LAYOUT_DOWN_FACTOR_OFFSET = offsetof(RescalingLayout, down_factor);
+constexpr u32 RENDERAREA_LAYOUT_OFFSET = offsetof(RenderAreaLayout, render_area);
 
 [[nodiscard]] std::vector<u32> EmitSPIRV(const Profile& profile, const RuntimeInfo& runtime_info,
                                          IR::Program& program, Bindings& bindings);
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp
index c4ca28d11..50daacd95 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp
@@ -18,6 +18,10 @@ void EmitBitCastU64F64(EmitContext&) {
     throw NotImplementedException("SPIR-V Instruction");
 }
 
+void EmitBitCastS32F32(EmitContext&) {
+    throw NotImplementedException("SPIR-V Instruction");
+}
+
 void EmitBitCastF16U16(EmitContext&) {
     throw NotImplementedException("SPIR-V Instruction");
 }
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
index 2c68aba39..5b3b5d1f3 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
@@ -353,7 +353,6 @@ Id EmitGetAttribute(EmitContext& ctx, IR::Attribute attr, Id vertex) {
     case IR::Attribute::TessellationEvaluationPointV:
         return ctx.OpLoad(ctx.F32[1],
                           ctx.OpAccessChain(ctx.input_f32, ctx.tess_coord, ctx.Const(1U)));
-
     default:
         throw NotImplementedException("Read attribute {}", attr);
     }
@@ -513,6 +512,18 @@ Id EmitInvocationId(EmitContext& ctx) {
     return ctx.OpLoad(ctx.U32[1], ctx.invocation_id);
 }
 
+Id EmitInvocationInfo(EmitContext& ctx) {
+    switch (ctx.stage) {
+    case Stage::TessellationControl:
+    case Stage::TessellationEval:
+        return ctx.OpShiftLeftLogical(ctx.U32[1], ctx.OpLoad(ctx.U32[1], ctx.patch_vertices_in),
+                                      ctx.Const(16u));
+    default:
+        LOG_WARNING(Shader, "(STUBBED) called");
+        return ctx.Const(0x00ff0000u);
+    }
+}
+
 Id EmitSampleId(EmitContext& ctx) {
     return ctx.OpLoad(ctx.U32[1], ctx.sample_id);
 }
@@ -537,6 +548,17 @@ Id EmitResolutionDownFactor(EmitContext& ctx) {
     }
 }
 
+Id EmitRenderArea(EmitContext& ctx) {
+    if (ctx.profile.unified_descriptor_binding) {
+        const Id pointer_type{ctx.TypePointer(spv::StorageClass::PushConstant, ctx.F32[4])};
+        const Id index{ctx.Const(ctx.render_are_member_index)};
+        const Id pointer{ctx.OpAccessChain(pointer_type, ctx.render_area_push_constant, index)};
+        return ctx.OpLoad(ctx.F32[4], pointer);
+    } else {
+        throw NotImplementedException("SPIR-V Instruction");
+    }
+}
+
 Id EmitLoadLocal(EmitContext& ctx, Id word_offset) {
     const Id pointer{ctx.OpAccessChain(ctx.private_u32, ctx.local_memory, word_offset)};
     return ctx.OpLoad(ctx.U32[1], pointer);
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h
index 984d072b4..e31cdc5e8 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h
@@ -72,10 +72,12 @@ void EmitSetOFlag(EmitContext& ctx);
 Id EmitWorkgroupId(EmitContext& ctx);
 Id EmitLocalInvocationId(EmitContext& ctx);
 Id EmitInvocationId(EmitContext& ctx);
+Id EmitInvocationInfo(EmitContext& ctx);
 Id EmitSampleId(EmitContext& ctx);
 Id EmitIsHelperInvocation(EmitContext& ctx);
 Id EmitYDirection(EmitContext& ctx);
 Id EmitResolutionDownFactor(EmitContext& ctx);
+Id EmitRenderArea(EmitContext& ctx);
 Id EmitLoadLocal(EmitContext& ctx, Id word_offset);
 void EmitWriteLocal(EmitContext& ctx, Id word_offset, Id value);
 Id EmitUndefU1(EmitContext& ctx);
@@ -177,7 +179,8 @@ Id EmitSelectF64(EmitContext& ctx, Id cond, Id true_value, Id false_value);
 void EmitBitCastU16F16(EmitContext& ctx);
 Id EmitBitCastU32F32(EmitContext& ctx, Id value);
 void EmitBitCastU64F64(EmitContext& ctx);
-void EmitBitCastF16U16(EmitContext& ctx);
+void EmitBitCastS32F32(EmitContext& ctx);
+void EmitBitCastF16U16(EmitContext&);
 Id EmitBitCastF32U32(EmitContext& ctx, Id value);
 void EmitBitCastF64U64(EmitContext& ctx);
 Id EmitPackUint2x32(EmitContext& ctx, Id value);
diff --git a/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp b/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp
index aecc4c612..0bfc2dd89 100644
--- a/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp
+++ b/src/shader_recompiler/backend/spirv/spirv_emit_context.cpp
@@ -473,6 +473,7 @@ EmitContext::EmitContext(const Profile& profile_, const RuntimeInfo& runtime_inf
     DefineAttributeMemAccess(program.info);
     DefineGlobalMemoryFunctions(program.info);
     DefineRescalingInput(program.info);
+    DefineRenderArea(program.info);
 }
 
 EmitContext::~EmitContext() = default;
@@ -982,6 +983,36 @@ void EmitContext::DefineRescalingInputUniformConstant() {
     }
 }
 
+void EmitContext::DefineRenderArea(const Info& info) {
+    if (!info.uses_render_area) {
+        return;
+    }
+
+    if (profile.unified_descriptor_binding) {
+        boost::container::static_vector<Id, 1> members{};
+        u32 member_index{0};
+
+        members.push_back(F32[4]);
+        render_are_member_index = member_index++;
+
+        const Id push_constant_struct{TypeStruct(std::span(members.data(), members.size()))};
+        Decorate(push_constant_struct, spv::Decoration::Block);
+        Name(push_constant_struct, "RenderAreaInfo");
+
+        MemberDecorate(push_constant_struct, render_are_member_index, spv::Decoration::Offset, 0);
+        MemberName(push_constant_struct, render_are_member_index, "render_area");
+
+        const Id pointer_type{TypePointer(spv::StorageClass::PushConstant, push_constant_struct)};
+        render_area_push_constant =
+            AddGlobalVariable(pointer_type, spv::StorageClass::PushConstant);
+        Name(render_area_push_constant, "render_area_push_constants");
+
+        if (profile.supported_spirv >= 0x00010400) {
+            interfaces.push_back(render_area_push_constant);
+        }
+    }
+}
+
 void EmitContext::DefineConstantBuffers(const Info& info, u32& binding) {
     if (info.constant_buffer_descriptors.empty()) {
         return;
@@ -1294,6 +1325,10 @@ void EmitContext::DefineInputs(const IR::Program& program) {
     if (info.uses_invocation_id) {
         invocation_id = DefineInput(*this, U32[1], false, spv::BuiltIn::InvocationId);
     }
+    if (info.uses_invocation_info &&
+        (stage == Shader::Stage::TessellationControl || stage == Shader::Stage::TessellationEval)) {
+        patch_vertices_in = DefineInput(*this, U32[1], false, spv::BuiltIn::PatchVertices);
+    }
     if (info.uses_sample_id) {
         sample_id = DefineInput(*this, U32[1], false, spv::BuiltIn::SampleId);
     }
diff --git a/src/shader_recompiler/backend/spirv/spirv_emit_context.h b/src/shader_recompiler/backend/spirv/spirv_emit_context.h
index bc25b8b84..dde45b4bc 100644
--- a/src/shader_recompiler/backend/spirv/spirv_emit_context.h
+++ b/src/shader_recompiler/backend/spirv/spirv_emit_context.h
@@ -204,6 +204,7 @@ public:
     Id workgroup_id{};
     Id local_invocation_id{};
     Id invocation_id{};
+    Id patch_vertices_in{};
     Id sample_id{};
     Id is_helper_invocation{};
     Id subgroup_local_invocation_id{};
@@ -243,6 +244,9 @@ public:
     u32 texture_rescaling_index{};
     u32 image_rescaling_index{};
 
+    Id render_area_push_constant{};
+    u32 render_are_member_index{};
+
     Id local_memory{};
 
     Id shared_memory_u8{};
@@ -318,6 +322,7 @@ private:
     void DefineRescalingInput(const Info& info);
     void DefineRescalingInputPushConstant();
     void DefineRescalingInputUniformConstant();
+    void DefineRenderArea(const Info& info);
 
     void DefineInputs(const IR::Program& program);
     void DefineOutputs(const IR::Program& program);
diff --git a/src/shader_recompiler/environment.h b/src/shader_recompiler/environment.h
index 9729d48c6..402f2664f 100644
--- a/src/shader_recompiler/environment.h
+++ b/src/shader_recompiler/environment.h
@@ -22,6 +22,10 @@ public:
 
     [[nodiscard]] virtual TextureType ReadTextureType(u32 raw_handle) = 0;
 
+    [[nodiscard]] virtual TexturePixelFormat ReadTexturePixelFormat(u32 raw_handle) = 0;
+
+    [[nodiscard]] virtual u32 ReadViewportTransformState() = 0;
+
     [[nodiscard]] virtual u32 TextureBoundBuffer() const = 0;
 
     [[nodiscard]] virtual u32 LocalMemorySize() const = 0;
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
index 11086ed8c..0cdac0eff 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
@@ -362,6 +362,10 @@ U32 IREmitter::InvocationId() {
     return Inst<U32>(Opcode::InvocationId);
 }
 
+U32 IREmitter::InvocationInfo() {
+    return Inst<U32>(Opcode::InvocationInfo);
+}
+
 U32 IREmitter::SampleId() {
     return Inst<U32>(Opcode::SampleId);
 }
@@ -378,6 +382,14 @@ F32 IREmitter::ResolutionDownFactor() {
     return Inst<F32>(Opcode::ResolutionDownFactor);
 }
 
+F32 IREmitter::RenderAreaWidth() {
+    return F32(CompositeExtract(Inst<Value>(Opcode::RenderArea), 0));
+}
+
+F32 IREmitter::RenderAreaHeight() {
+    return F32(CompositeExtract(Inst<Value>(Opcode::RenderArea), 1));
+}
+
 U32 IREmitter::LaneId() {
     return Inst<U32>(Opcode::LaneId);
 }
@@ -684,6 +696,11 @@ IR::U32 IREmitter::BitCast<IR::U32, IR::F32>(const IR::F32& value) {
 }
 
 template <>
+IR::S32 IREmitter::BitCast<IR::S32, IR::F32>(const IR::F32& value) {
+    return Inst<IR::S32>(Opcode::BitCastS32F32, value);
+}
+
+template <>
 IR::F32 IREmitter::BitCast<IR::F32, IR::U32>(const IR::U32& value) {
     return Inst<IR::F32>(Opcode::BitCastF32U32, value);
 }
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.h b/src/shader_recompiler/frontend/ir/ir_emitter.h
index 25839a371..2df992feb 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.h
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.h
@@ -97,12 +97,16 @@ public:
     [[nodiscard]] U32 LocalInvocationIdZ();
 
     [[nodiscard]] U32 InvocationId();
+    [[nodiscard]] U32 InvocationInfo();
     [[nodiscard]] U32 SampleId();
     [[nodiscard]] U1 IsHelperInvocation();
     [[nodiscard]] F32 YDirection();
 
     [[nodiscard]] F32 ResolutionDownFactor();
 
+    [[nodiscard]] F32 RenderAreaWidth();
+    [[nodiscard]] F32 RenderAreaHeight();
+
     [[nodiscard]] U32 LaneId();
 
     [[nodiscard]] U32 LoadGlobalU8(const U64& address);
diff --git a/src/shader_recompiler/frontend/ir/microinstruction.cpp b/src/shader_recompiler/frontend/ir/microinstruction.cpp
index 468782eb1..84417980b 100644
--- a/src/shader_recompiler/frontend/ir/microinstruction.cpp
+++ b/src/shader_recompiler/frontend/ir/microinstruction.cpp
@@ -325,11 +325,6 @@ void Inst::AddPhiOperand(Block* predecessor, const Value& value) {
     phi_args.emplace_back(predecessor, value);
 }
 
-void Inst::ErasePhiOperand(size_t index) {
-    const auto operand_it{phi_args.begin() + static_cast<ptrdiff_t>(index)};
-    phi_args.erase(operand_it);
-}
-
 void Inst::OrderPhiArgs() {
     if (op != Opcode::Phi) {
         throw LogicError("{} is not a Phi instruction", op);
diff --git a/src/shader_recompiler/frontend/ir/opcodes.h b/src/shader_recompiler/frontend/ir/opcodes.h
index 752879a18..e70d7745c 100644
--- a/src/shader_recompiler/frontend/ir/opcodes.h
+++ b/src/shader_recompiler/frontend/ir/opcodes.h
@@ -37,6 +37,7 @@ constexpr Type U8{Type::U8};
 constexpr Type U16{Type::U16};
 constexpr Type U32{Type::U32};
 constexpr Type U64{Type::U64};
+constexpr Type S32{Type::S32};
 constexpr Type F16{Type::F16};
 constexpr Type F32{Type::F32};
 constexpr Type F64{Type::F64};
diff --git a/src/shader_recompiler/frontend/ir/opcodes.inc b/src/shader_recompiler/frontend/ir/opcodes.inc
index 86410ddfc..1fe3749cc 100644
--- a/src/shader_recompiler/frontend/ir/opcodes.inc
+++ b/src/shader_recompiler/frontend/ir/opcodes.inc
@@ -59,10 +59,12 @@ OPCODE(SetOFlag,                                            Void,           U1,
 OPCODE(WorkgroupId,                                         U32x3,                                                                                          )
 OPCODE(LocalInvocationId,                                   U32x3,                                                                                          )
 OPCODE(InvocationId,                                        U32,                                                                                            )
+OPCODE(InvocationInfo,                                      U32,                                                                                            )
 OPCODE(SampleId,                                            U32,                                                                                            )
 OPCODE(IsHelperInvocation,                                  U1,                                                                                             )
 OPCODE(YDirection,                                          F32,                                                                                            )
 OPCODE(ResolutionDownFactor,                                F32,                                                                                            )
+OPCODE(RenderArea,                                          F32x4,                                                                                          )
 
 // Undefined
 OPCODE(UndefU1,                                             U1,                                                                                             )
@@ -173,6 +175,7 @@ OPCODE(SelectF64,                                           F64,            U1,
 OPCODE(BitCastU16F16,                                       U16,            F16,                                                                            )
 OPCODE(BitCastU32F32,                                       U32,            F32,                                                                            )
 OPCODE(BitCastU64F64,                                       U64,            F64,                                                                            )
+OPCODE(BitCastS32F32,                                       S32,            F32,                                                                            )
 OPCODE(BitCastF16U16,                                       F16,            U16,                                                                            )
 OPCODE(BitCastF32U32,                                       F32,            U32,                                                                            )
 OPCODE(BitCastF64U64,                                       F64,            U64,                                                                            )
diff --git a/src/shader_recompiler/frontend/ir/patch.h b/src/shader_recompiler/frontend/ir/patch.h
index 1e37c8eb6..5077e56c2 100644
--- a/src/shader_recompiler/frontend/ir/patch.h
+++ b/src/shader_recompiler/frontend/ir/patch.h
@@ -14,8 +14,6 @@ enum class Patch : u64 {
     TessellationLodBottom,
     TessellationLodInteriorU,
     TessellationLodInteriorV,
-    ComponentPadding0,
-    ComponentPadding1,
     Component0,
     Component1,
     Component2,
@@ -137,7 +135,7 @@ enum class Patch : u64 {
     Component118,
     Component119,
 };
-static_assert(static_cast<u64>(Patch::Component119) == 127);
+static_assert(static_cast<u64>(Patch::Component119) == 125);
 
 [[nodiscard]] bool IsGeneric(Patch patch) noexcept;
 
diff --git a/src/shader_recompiler/frontend/ir/type.h b/src/shader_recompiler/frontend/ir/type.h
index 04c8c4ddb..5a7c706ad 100644
--- a/src/shader_recompiler/frontend/ir/type.h
+++ b/src/shader_recompiler/frontend/ir/type.h
@@ -24,21 +24,22 @@ enum class Type {
     U16 = 1 << 7,
     U32 = 1 << 8,
     U64 = 1 << 9,
-    F16 = 1 << 10,
-    F32 = 1 << 11,
-    F64 = 1 << 12,
-    U32x2 = 1 << 13,
-    U32x3 = 1 << 14,
-    U32x4 = 1 << 15,
-    F16x2 = 1 << 16,
-    F16x3 = 1 << 17,
-    F16x4 = 1 << 18,
-    F32x2 = 1 << 19,
-    F32x3 = 1 << 20,
-    F32x4 = 1 << 21,
-    F64x2 = 1 << 22,
-    F64x3 = 1 << 23,
-    F64x4 = 1 << 24,
+    S32 = 1 << 10,
+    F16 = 1 << 11,
+    F32 = 1 << 12,
+    F64 = 1 << 13,
+    U32x2 = 1 << 14,
+    U32x3 = 1 << 15,
+    U32x4 = 1 << 16,
+    F16x2 = 1 << 17,
+    F16x3 = 1 << 18,
+    F16x4 = 1 << 19,
+    F32x2 = 1 << 20,
+    F32x3 = 1 << 21,
+    F32x4 = 1 << 22,
+    F64x2 = 1 << 23,
+    F64x3 = 1 << 24,
+    F64x4 = 1 << 25,
 };
 DECLARE_ENUM_FLAG_OPERATORS(Type)
 
diff --git a/src/shader_recompiler/frontend/ir/value.cpp b/src/shader_recompiler/frontend/ir/value.cpp
index 346169328..30ba12316 100644
--- a/src/shader_recompiler/frontend/ir/value.cpp
+++ b/src/shader_recompiler/frontend/ir/value.cpp
@@ -23,6 +23,8 @@ Value::Value(u16 value) noexcept : type{Type::U16}, imm_u16{value} {}
 
 Value::Value(u32 value) noexcept : type{Type::U32}, imm_u32{value} {}
 
+Value::Value(s32 value) noexcept : type{Type::S32}, imm_s32{value} {}
+
 Value::Value(f32 value) noexcept : type{Type::F32}, imm_f32{value} {}
 
 Value::Value(u64 value) noexcept : type{Type::U64}, imm_u64{value} {}
@@ -69,6 +71,7 @@ bool Value::operator==(const Value& other) const {
         return imm_u16 == other.imm_u16;
     case Type::U32:
     case Type::F32:
+    case Type::S32:
         return imm_u32 == other.imm_u32;
     case Type::U64:
     case Type::F64:
diff --git a/src/shader_recompiler/frontend/ir/value.h b/src/shader_recompiler/frontend/ir/value.h
index 1a2e4ccb6..e8bbb93a5 100644
--- a/src/shader_recompiler/frontend/ir/value.h
+++ b/src/shader_recompiler/frontend/ir/value.h
@@ -44,6 +44,7 @@ public:
     explicit Value(u8 value) noexcept;
     explicit Value(u16 value) noexcept;
     explicit Value(u32 value) noexcept;
+    explicit Value(s32 value) noexcept;
     explicit Value(f32 value) noexcept;
     explicit Value(u64 value) noexcept;
     explicit Value(f64 value) noexcept;
@@ -66,6 +67,7 @@ public:
     [[nodiscard]] u8 U8() const;
     [[nodiscard]] u16 U16() const;
     [[nodiscard]] u32 U32() const;
+    [[nodiscard]] s32 S32() const;
     [[nodiscard]] f32 F32() const;
     [[nodiscard]] u64 U64() const;
     [[nodiscard]] f64 F64() const;
@@ -85,6 +87,7 @@ private:
         u8 imm_u8;
         u16 imm_u16;
         u32 imm_u32;
+        s32 imm_s32;
         f32 imm_f32;
         u64 imm_u64;
         f64 imm_f64;
@@ -178,13 +181,9 @@ public:
 
     /// Get a pointer to the block of a phi argument.
     [[nodiscard]] Block* PhiBlock(size_t index) const;
-
     /// Add phi operand to a phi instruction.
     void AddPhiOperand(Block* predecessor, const Value& value);
 
-    // Erase the phi operand at the given index.
-    void ErasePhiOperand(size_t index);
-
     /// Orders the Phi arguments from farthest away to nearest.
     void OrderPhiArgs();
 
@@ -270,6 +269,7 @@ using U8 = TypedValue<Type::U8>;
 using U16 = TypedValue<Type::U16>;
 using U32 = TypedValue<Type::U32>;
 using U64 = TypedValue<Type::U64>;
+using S32 = TypedValue<Type::S32>;
 using F16 = TypedValue<Type::F16>;
 using F32 = TypedValue<Type::F32>;
 using F64 = TypedValue<Type::F64>;
@@ -381,6 +381,14 @@ inline u32 Value::U32() const {
     return imm_u32;
 }
 
+inline s32 Value::S32() const {
+    if (IsIdentity()) {
+        return inst->Arg(0).S32();
+    }
+    DEBUG_ASSERT(type == Type::S32);
+    return imm_s32;
+}
+
 inline f32 Value::F32() const {
     if (IsIdentity()) {
         return inst->Arg(0).F32();
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
index 52be12f9c..753c62098 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
@@ -117,8 +117,7 @@ enum class SpecialRegister : u64 {
     case SpecialRegister::SR_THREAD_KILL:
         return IR::U32{ir.Select(ir.IsHelperInvocation(), ir.Imm32(-1), ir.Imm32(0))};
     case SpecialRegister::SR_INVOCATION_INFO:
-        LOG_WARNING(Shader, "(STUBBED) SR_INVOCATION_INFO");
-        return ir.Imm32(0x00ff'0000);
+        return ir.InvocationInfo();
     case SpecialRegister::SR_TID: {
         const IR::Value tid{ir.LocalInvocationId()};
         return ir.BitFieldInsert(ir.BitFieldInsert(IR::U32{ir.CompositeExtract(tid, 0)},
diff --git a/src/shader_recompiler/frontend/maxwell/translate_program.cpp b/src/shader_recompiler/frontend/maxwell/translate_program.cpp
index b58741d4d..376aae0ea 100644
--- a/src/shader_recompiler/frontend/maxwell/translate_program.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate_program.cpp
@@ -220,8 +220,10 @@ IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Blo
 
     Optimization::ConstantPropagationPass(program);
 
+    Optimization::PositionPass(env, program);
+
     Optimization::GlobalMemoryToStorageBufferPass(program);
-    Optimization::TexturePass(env, program);
+    Optimization::TexturePass(env, program, host_info);
 
     if (Settings::values.resolution_info.active) {
         Optimization::RescalingPass(program);
diff --git a/src/shader_recompiler/host_translate_info.h b/src/shader_recompiler/host_translate_info.h
index 881874310..cc1500690 100644
--- a/src/shader_recompiler/host_translate_info.h
+++ b/src/shader_recompiler/host_translate_info.h
@@ -13,6 +13,7 @@ struct HostTranslateInfo {
     bool support_float16{};      ///< True when the device supports 16-bit floats
     bool support_int64{};        ///< True when the device supports 64-bit integers
     bool needs_demote_reorder{}; ///< True when the device needs DemoteToHelperInvocation reordered
+    bool support_snorm_render_buffer{}; ///< True when the device supports SNORM render buffers
 };
 
 } // namespace Shader
diff --git a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
index 7cff8ecdc..5a4195217 100644
--- a/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
+++ b/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
@@ -468,6 +468,9 @@ void VisitUsages(Info& info, IR::Inst& inst) {
     case IR::Opcode::InvocationId:
         info.uses_invocation_id = true;
         break;
+    case IR::Opcode::InvocationInfo:
+        info.uses_invocation_info = true;
+        break;
     case IR::Opcode::SampleId:
         info.uses_sample_id = true;
         break;
diff --git a/src/shader_recompiler/ir_opt/dead_code_elimination_pass.cpp b/src/shader_recompiler/ir_opt/dead_code_elimination_pass.cpp
index 9a7d47344..1bd8afd6f 100644
--- a/src/shader_recompiler/ir_opt/dead_code_elimination_pass.cpp
+++ b/src/shader_recompiler/ir_opt/dead_code_elimination_pass.cpp
@@ -1,104 +1,24 @@
 // SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
-#include <algorithm>
-
-#include <boost/container/small_vector.hpp>
-
 #include "shader_recompiler/frontend/ir/basic_block.h"
 #include "shader_recompiler/frontend/ir/value.h"
 #include "shader_recompiler/ir_opt/passes.h"
 
 namespace Shader::Optimization {
-namespace {
-template <bool TEST_USES>
-void DeadInstElimination(IR::Block* const block) {
+
+void DeadCodeEliminationPass(IR::Program& program) {
     // We iterate over the instructions in reverse order.
     // This is because removing an instruction reduces the number of uses for earlier instructions.
-    auto it{block->end()};
-    while (it != block->begin()) {
-        --it;
-        if constexpr (TEST_USES) {
-            if (it->HasUses() || it->MayHaveSideEffects()) {
-                continue;
-            }
-        }
-        it->Invalidate();
-        it = block->Instructions().erase(it);
-    }
-}
-
-void DeletedPhiArgElimination(IR::Program& program, std::span<const IR::Block*> dead_blocks) {
-    for (IR::Block* const block : program.blocks) {
-        for (IR::Inst& phi : *block) {
-            if (!IR::IsPhi(phi)) {
-                continue;
-            }
-            for (size_t i = 0; i < phi.NumArgs(); ++i) {
-                if (std::ranges::find(dead_blocks, phi.PhiBlock(i)) == dead_blocks.end()) {
-                    continue;
-                }
-                // Phi operand at this index is an unreachable block
-                phi.ErasePhiOperand(i);
-                --i;
-            }
-        }
-    }
-}
-
-void DeadBranchElimination(IR::Program& program) {
-    boost::container::small_vector<const IR::Block*, 3> dead_blocks;
-    const auto begin_it{program.syntax_list.begin()};
-    for (auto node_it = begin_it; node_it != program.syntax_list.end(); ++node_it) {
-        if (node_it->type != IR::AbstractSyntaxNode::Type::If) {
-            continue;
-        }
-        IR::Inst* const cond_ref{node_it->data.if_node.cond.Inst()};
-        const IR::U1 cond{cond_ref->Arg(0)};
-        if (!cond.IsImmediate()) {
-            continue;
-        }
-        if (cond.U1()) {
-            continue;
-        }
-        // False immediate condition. Remove condition ref, erase the entire branch.
-        cond_ref->Invalidate();
-        // Account for nested if-statements within the if(false) branch
-        u32 nested_ifs{1u};
-        while (node_it->type != IR::AbstractSyntaxNode::Type::EndIf || nested_ifs > 0) {
-            node_it = program.syntax_list.erase(node_it);
-            switch (node_it->type) {
-            case IR::AbstractSyntaxNode::Type::If:
-                ++nested_ifs;
-                break;
-            case IR::AbstractSyntaxNode::Type::EndIf:
-                --nested_ifs;
-                break;
-            case IR::AbstractSyntaxNode::Type::Block: {
-                IR::Block* const block{node_it->data.block};
-                DeadInstElimination<false>(block);
-                dead_blocks.push_back(block);
-                break;
-            }
-            default:
-                break;
+    for (IR::Block* const block : program.post_order_blocks) {
+        auto it{block->end()};
+        while (it != block->begin()) {
+            --it;
+            if (!it->HasUses() && !it->MayHaveSideEffects()) {
+                it->Invalidate();
+                it = block->Instructions().erase(it);
             }
         }
-        // Erase EndIf node of the if(false) branch
-        node_it = program.syntax_list.erase(node_it);
-        // Account for loop increment
-        --node_it;
-    }
-    if (!dead_blocks.empty()) {
-        DeletedPhiArgElimination(program, std::span(dead_blocks.data(), dead_blocks.size()));
-    }
-}
-} // namespace
-
-void DeadCodeEliminationPass(IR::Program& program) {
-    DeadBranchElimination(program);
-    for (IR::Block* const block : program.post_order_blocks) {
-        DeadInstElimination<true>(block);
     }
 }
 
diff --git a/src/shader_recompiler/ir_opt/passes.h b/src/shader_recompiler/ir_opt/passes.h
index 6ff8e4266..586a0668f 100644
--- a/src/shader_recompiler/ir_opt/passes.h
+++ b/src/shader_recompiler/ir_opt/passes.h
@@ -6,6 +6,10 @@
 #include "shader_recompiler/environment.h"
 #include "shader_recompiler/frontend/ir/program.h"
 
+namespace Shader {
+struct HostTranslateInfo;
+}
+
 namespace Shader::Optimization {
 
 void CollectShaderInfoPass(Environment& env, IR::Program& program);
@@ -17,7 +21,8 @@ void LowerFp16ToFp32(IR::Program& program);
 void LowerInt64ToInt32(IR::Program& program);
 void RescalingPass(IR::Program& program);
 void SsaRewritePass(IR::Program& program);
-void TexturePass(Environment& env, IR::Program& program);
+void PositionPass(Environment& env, IR::Program& program);
+void TexturePass(Environment& env, IR::Program& program, const HostTranslateInfo& host_info);
 void VerificationPass(const IR::Program& program);
 
 // Dual Vertex
diff --git a/src/shader_recompiler/ir_opt/position_pass.cpp b/src/shader_recompiler/ir_opt/position_pass.cpp
new file mode 100644
index 000000000..3c20b7189
--- /dev/null
+++ b/src/shader_recompiler/ir_opt/position_pass.cpp
@@ -0,0 +1,77 @@
+// SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include <boost/container/small_vector.hpp>
+
+#include "shader_recompiler/frontend/ir/basic_block.h"
+#include "shader_recompiler/frontend/ir/ir_emitter.h"
+#include "shader_recompiler/frontend/ir/value.h"
+#include "shader_recompiler/ir_opt/passes.h"
+
+namespace Shader::Optimization {
+
+namespace {
+struct PositionInst {
+    IR::Inst* inst;
+    IR::Block* block;
+    IR::Attribute attr;
+};
+using PositionInstVector = boost::container::small_vector<PositionInst, 24>;
+} // Anonymous namespace
+
+void PositionPass(Environment& env, IR::Program& program) {
+    if (env.ShaderStage() != Stage::VertexB || env.ReadViewportTransformState()) {
+        return;
+    }
+
+    Info& info{program.info};
+    info.uses_render_area = true;
+
+    PositionInstVector to_replace;
+    for (IR::Block* const block : program.post_order_blocks) {
+        for (IR::Inst& inst : block->Instructions()) {
+            switch (inst.GetOpcode()) {
+            case IR::Opcode::SetAttribute: {
+                const IR::Attribute attr{inst.Arg(0).Attribute()};
+                switch (attr) {
+                case IR::Attribute::PositionX:
+                case IR::Attribute::PositionY: {
+                    to_replace.push_back(PositionInst{.inst = &inst, .block = block, .attr = attr});
+                    break;
+                }
+                default:
+                    break;
+                }
+                break;
+            }
+            default:
+                break;
+            }
+        }
+    }
+
+    for (PositionInst& position_inst : to_replace) {
+        IR::IREmitter ir{*position_inst.block,
+                         IR::Block::InstructionList::s_iterator_to(*position_inst.inst)};
+        const IR::F32 value(position_inst.inst->Arg(1));
+        const IR::F32F64 scale(ir.Imm32(2.f));
+        const IR::F32 negative_one{ir.Imm32(-1.f)};
+        switch (position_inst.attr) {
+        case IR::Attribute::PositionX: {
+            position_inst.inst->SetArg(
+                1,
+                ir.FPFma(value, ir.FPMul(ir.FPRecip(ir.RenderAreaWidth()), scale), negative_one));
+            break;
+        }
+        case IR::Attribute::PositionY: {
+            position_inst.inst->SetArg(
+                1,
+                ir.FPFma(value, ir.FPMul(ir.FPRecip(ir.RenderAreaHeight()), scale), negative_one));
+            break;
+        }
+        default:
+            break;
+        }
+    }
+}
+} // namespace Shader::Optimization
diff --git a/src/shader_recompiler/ir_opt/texture_pass.cpp b/src/shader_recompiler/ir_opt/texture_pass.cpp
index e8be58357..f5c86fcb1 100644
--- a/src/shader_recompiler/ir_opt/texture_pass.cpp
+++ b/src/shader_recompiler/ir_opt/texture_pass.cpp
@@ -11,6 +11,7 @@
 #include "shader_recompiler/frontend/ir/basic_block.h"
 #include "shader_recompiler/frontend/ir/breadth_first_search.h"
 #include "shader_recompiler/frontend/ir/ir_emitter.h"
+#include "shader_recompiler/host_translate_info.h"
 #include "shader_recompiler/ir_opt/passes.h"
 #include "shader_recompiler/shader_info.h"
 
@@ -363,6 +364,14 @@ TextureType ReadTextureType(Environment& env, const ConstBufferAddr& cbuf) {
     return env.ReadTextureType(lhs_raw | rhs_raw);
 }
 
+TexturePixelFormat ReadTexturePixelFormat(Environment& env, const ConstBufferAddr& cbuf) {
+    const u32 secondary_index{cbuf.has_secondary ? cbuf.secondary_index : cbuf.index};
+    const u32 secondary_offset{cbuf.has_secondary ? cbuf.secondary_offset : cbuf.offset};
+    const u32 lhs_raw{env.ReadCbufValue(cbuf.index, cbuf.offset)};
+    const u32 rhs_raw{env.ReadCbufValue(secondary_index, secondary_offset)};
+    return env.ReadTexturePixelFormat(lhs_raw | rhs_raw);
+}
+
 class Descriptors {
 public:
     explicit Descriptors(TextureBufferDescriptors& texture_buffer_descriptors_,
@@ -451,9 +460,41 @@ void PatchImageSampleImplicitLod(IR::Block& block, IR::Inst& inst) {
                ir.FPMul(IR::F32(ir.CompositeExtract(coord, 1)),
                         ir.FPRecip(ir.ConvertUToF(32, 32, ir.CompositeExtract(texture_size, 1))))));
 }
+
+void PatchTexelFetch(IR::Block& block, IR::Inst& inst, TexturePixelFormat pixel_format) {
+    const auto it{IR::Block::InstructionList::s_iterator_to(inst)};
+    IR::IREmitter ir{block, IR::Block::InstructionList::s_iterator_to(inst)};
+    auto get_max_value = [pixel_format]() -> float {
+        switch (pixel_format) {
+        case TexturePixelFormat::A8B8G8R8_SNORM:
+        case TexturePixelFormat::R8G8_SNORM:
+        case TexturePixelFormat::R8_SNORM:
+            return 1.f / std::numeric_limits<char>::max();
+        case TexturePixelFormat::R16G16B16A16_SNORM:
+        case TexturePixelFormat::R16G16_SNORM:
+        case TexturePixelFormat::R16_SNORM:
+            return 1.f / std::numeric_limits<short>::max();
+        default:
+            throw InvalidArgument("Invalid texture pixel format");
+        }
+    };
+
+    const IR::Value new_inst{&*block.PrependNewInst(it, inst)};
+    const IR::F32 x(ir.CompositeExtract(new_inst, 0));
+    const IR::F32 y(ir.CompositeExtract(new_inst, 1));
+    const IR::F32 z(ir.CompositeExtract(new_inst, 2));
+    const IR::F32 w(ir.CompositeExtract(new_inst, 3));
+    const IR::F16F32F64 max_value(ir.Imm32(get_max_value()));
+    const IR::Value converted =
+        ir.CompositeConstruct(ir.FPMul(ir.ConvertSToF(32, 32, ir.BitCast<IR::S32>(x)), max_value),
+                              ir.FPMul(ir.ConvertSToF(32, 32, ir.BitCast<IR::S32>(y)), max_value),
+                              ir.FPMul(ir.ConvertSToF(32, 32, ir.BitCast<IR::S32>(z)), max_value),
+                              ir.FPMul(ir.ConvertSToF(32, 32, ir.BitCast<IR::S32>(w)), max_value));
+    inst.ReplaceUsesWith(converted);
+}
 } // Anonymous namespace
 
-void TexturePass(Environment& env, IR::Program& program) {
+void TexturePass(Environment& env, IR::Program& program, const HostTranslateInfo& host_info) {
     TextureInstVector to_replace;
     for (IR::Block* const block : program.post_order_blocks) {
         for (IR::Inst& inst : block->Instructions()) {
@@ -597,6 +638,14 @@ void TexturePass(Environment& env, IR::Program& program) {
         } else {
             inst->SetArg(0, IR::Value{});
         }
+
+        if (!host_info.support_snorm_render_buffer && inst->GetOpcode() == IR::Opcode::ImageFetch &&
+            flags.type == TextureType::Buffer) {
+            const auto pixel_format = ReadTexturePixelFormat(env, cbuf);
+            if (pixel_format != TexturePixelFormat::OTHER) {
+                PatchTexelFetch(*texture_inst.block, *texture_inst.inst, pixel_format);
+            }
+        }
     }
 }
 
diff --git a/src/shader_recompiler/shader_info.h b/src/shader_recompiler/shader_info.h
index 81097bf1a..ee6252bb5 100644
--- a/src/shader_recompiler/shader_info.h
+++ b/src/shader_recompiler/shader_info.h
@@ -29,6 +29,16 @@ enum class TextureType : u32 {
 };
 constexpr u32 NUM_TEXTURE_TYPES = 9;
 
+enum class TexturePixelFormat : u32 {
+    A8B8G8R8_SNORM,
+    R8_SNORM,
+    R8G8_SNORM,
+    R16G16B16A16_SNORM,
+    R16G16_SNORM,
+    R16_SNORM,
+    OTHER
+};
+
 enum class ImageFormat : u32 {
     Typeless,
     R8_UINT,
@@ -117,6 +127,7 @@ struct Info {
     bool uses_workgroup_id{};
     bool uses_local_invocation_id{};
     bool uses_invocation_id{};
+    bool uses_invocation_info{};
     bool uses_sample_id{};
     bool uses_is_helper_invocation{};
     bool uses_subgroup_invocation_id{};
@@ -182,6 +193,7 @@ struct Info {
     bool uses_shadow_lod{};
     bool uses_rescaling_uniform{};
     bool uses_cbuf_indirect{};
+    bool uses_render_area{};
 
     IR::Type used_constant_buffer_types{};
     IR::Type used_storage_buffer_types{};