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-rw-r--r--src/shader_recompiler/frontend/ir/ir_emitter.cpp4
-rw-r--r--src/shader_recompiler/frontend/ir/ir_emitter.h1
-rw-r--r--src/shader_recompiler/frontend/ir/opcodes.inc1
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp2
4 files changed, 8 insertions, 0 deletions
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
index aebe7200f..c3e8d0681 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
@@ -379,6 +379,10 @@ U1 IREmitter::IsHelperInvocation() {
379 return Inst<U1>(Opcode::IsHelperInvocation); 379 return Inst<U1>(Opcode::IsHelperInvocation);
380} 380}
381 381
382F32 IREmitter::YDirection() {
383 return Inst<F32>(Opcode::YDirection);
384}
385
382U32 IREmitter::LaneId() { 386U32 IREmitter::LaneId() {
383 return Inst<U32>(Opcode::LaneId); 387 return Inst<U32>(Opcode::LaneId);
384} 388}
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.h b/src/shader_recompiler/frontend/ir/ir_emitter.h
index b9d051b43..7e67f5e30 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.h
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.h
@@ -102,6 +102,7 @@ public:
102 [[nodiscard]] U32 InvocationId(); 102 [[nodiscard]] U32 InvocationId();
103 [[nodiscard]] U32 SampleId(); 103 [[nodiscard]] U32 SampleId();
104 [[nodiscard]] U1 IsHelperInvocation(); 104 [[nodiscard]] U1 IsHelperInvocation();
105 [[nodiscard]] F32 YDirection();
105 106
106 [[nodiscard]] U32 LaneId(); 107 [[nodiscard]] U32 LaneId();
107 108
diff --git a/src/shader_recompiler/frontend/ir/opcodes.inc b/src/shader_recompiler/frontend/ir/opcodes.inc
index 1cfc2a943..269de8ca5 100644
--- a/src/shader_recompiler/frontend/ir/opcodes.inc
+++ b/src/shader_recompiler/frontend/ir/opcodes.inc
@@ -65,6 +65,7 @@ OPCODE(LocalInvocationId, U32x3,
65OPCODE(InvocationId, U32, ) 65OPCODE(InvocationId, U32, )
66OPCODE(SampleId, U32, ) 66OPCODE(SampleId, U32, )
67OPCODE(IsHelperInvocation, U1, ) 67OPCODE(IsHelperInvocation, U1, )
68OPCODE(YDirection, F32, )
68 69
69// Undefined 70// Undefined
70OPCODE(UndefU1, U1, ) 71OPCODE(UndefU1, U1, )
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
index 660b84c20..b0baff74b 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
@@ -150,6 +150,8 @@ enum class SpecialRegister : u64 {
150 return ir.SubgroupGtMask(); 150 return ir.SubgroupGtMask();
151 case SpecialRegister::SR_GEMASK: 151 case SpecialRegister::SR_GEMASK:
152 return ir.SubgroupGeMask(); 152 return ir.SubgroupGeMask();
153 case SpecialRegister::SR_Y_DIRECTION:
154 return ir.BitCast<IR::U32>(ir.YDirection());
153 default: 155 default:
154 throw NotImplementedException("S2R special register {}", special_register); 156 throw NotImplementedException("S2R special register {}", special_register);
155 } 157 }