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-rw-r--r--src/shader_recompiler/frontend/maxwell/maxwell.inc2
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/double_add.cpp2
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/double_fused_multiply_add.cpp53
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/double_multiply.cpp45
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp8
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/impl.h1
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp28
7 files changed, 109 insertions, 30 deletions
diff --git a/src/shader_recompiler/frontend/maxwell/maxwell.inc b/src/shader_recompiler/frontend/maxwell/maxwell.inc
index 1b87d04fc..1dfaeb92f 100644
--- a/src/shader_recompiler/frontend/maxwell/maxwell.inc
+++ b/src/shader_recompiler/frontend/maxwell/maxwell.inc
@@ -35,7 +35,7 @@ INST(DADD_imm, "DADD (imm)", "0011 100- 0111 0---")
35INST(DEPBAR, "DEPBAR", "1111 0000 1111 0---") 35INST(DEPBAR, "DEPBAR", "1111 0000 1111 0---")
36INST(DFMA_reg, "DFMA (reg)", "0101 1011 0111 ----") 36INST(DFMA_reg, "DFMA (reg)", "0101 1011 0111 ----")
37INST(DFMA_rc, "DFMA (rc)", "0101 0011 0111 ----") 37INST(DFMA_rc, "DFMA (rc)", "0101 0011 0111 ----")
38INST(DFMA_cr, "DFMA (cr)", "0010 1011 0111 ----") 38INST(DFMA_cr, "DFMA (cr)", "0100 1011 0111 ----")
39INST(DFMA_imm, "DFMA (imm)", "0011 011- 0111 ----") 39INST(DFMA_imm, "DFMA (imm)", "0011 011- 0111 ----")
40INST(DMNMX_reg, "DMNMX (reg)", "0100 1100 0101 0---") 40INST(DMNMX_reg, "DMNMX (reg)", "0100 1100 0101 0---")
41INST(DMNMX_cbuf, "DMNMX (cbuf)", "0101 1100 0101 0---") 41INST(DMNMX_cbuf, "DMNMX (cbuf)", "0101 1100 0101 0---")
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/double_add.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/double_add.cpp
index 3db09d0c2..ac1433dea 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/double_add.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/double_add.cpp
@@ -30,7 +30,7 @@ void DADD(TranslatorVisitor& v, u64 insn, const IR::F64& src_b) {
30 const IR::F64 op_a{v.ir.FPAbsNeg(src_a, dadd.abs_a != 0, dadd.neg_a != 0)}; 30 const IR::F64 op_a{v.ir.FPAbsNeg(src_a, dadd.abs_a != 0, dadd.neg_a != 0)};
31 const IR::F64 op_b{v.ir.FPAbsNeg(src_b, dadd.abs_b != 0, dadd.neg_b != 0)}; 31 const IR::F64 op_b{v.ir.FPAbsNeg(src_b, dadd.abs_b != 0, dadd.neg_b != 0)};
32 32
33 IR::FpControl control{ 33 const IR::FpControl control{
34 .no_contraction{true}, 34 .no_contraction{true},
35 .rounding{CastFpRounding(dadd.fp_rounding)}, 35 .rounding{CastFpRounding(dadd.fp_rounding)},
36 .fmz_mode{IR::FmzMode::None}, 36 .fmz_mode{IR::FmzMode::None},
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/double_fused_multiply_add.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/double_fused_multiply_add.cpp
new file mode 100644
index 000000000..ff7321862
--- /dev/null
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/double_fused_multiply_add.cpp
@@ -0,0 +1,53 @@
1// Copyright 2021 yuzu Emulator Project
2// Licensed under GPLv2 or any later version
3// Refer to the license.txt file included.
4
5#include "common/common_types.h"
6#include "shader_recompiler/exception.h"
7#include "shader_recompiler/frontend/maxwell/translate/impl/common_encoding.h"
8#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
9
10namespace Shader::Maxwell {
11namespace {
12
13void DFMA(TranslatorVisitor& v, u64 insn, const IR::F64& src_b, const IR::F64& src_c) {
14 union {
15 u64 raw;
16 BitField<0, 8, IR::Reg> dest_reg;
17 BitField<8, 8, IR::Reg> src_a_reg;
18 BitField<50, 2, FpRounding> fp_rounding;
19 BitField<48, 1, u64> neg_b;
20 BitField<49, 1, u64> neg_c;
21 } const dfma{insn};
22
23 const IR::F64 src_a{v.D(dfma.src_a_reg)};
24 const IR::F64 op_b{v.ir.FPAbsNeg(src_b, false, dfma.neg_b != 0)};
25 const IR::F64 op_c{v.ir.FPAbsNeg(src_c, false, dfma.neg_c != 0)};
26
27 const IR::FpControl control{
28 .no_contraction{true},
29 .rounding{CastFpRounding(dfma.fp_rounding)},
30 .fmz_mode{IR::FmzMode::None},
31 };
32
33 v.D(dfma.dest_reg, v.ir.FPFma(src_a, op_b, op_c, control));
34}
35} // Anonymous namespace
36
37void TranslatorVisitor::DFMA_reg(u64 insn) {
38 DFMA(*this, insn, GetDoubleReg20(insn), GetDoubleReg39(insn));
39}
40
41void TranslatorVisitor::DFMA_cr(u64 insn) {
42 DFMA(*this, insn, GetDoubleCbuf(insn), GetDoubleReg39(insn));
43}
44
45void TranslatorVisitor::DFMA_rc(u64 insn) {
46 DFMA(*this, insn, GetDoubleReg39(insn), GetDoubleCbuf(insn));
47}
48
49void TranslatorVisitor::DFMA_imm(u64 insn) {
50 DFMA(*this, insn, GetDoubleImm20(insn), GetDoubleReg39(insn));
51}
52
53} // namespace Shader::Maxwell
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/double_multiply.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/double_multiply.cpp
new file mode 100644
index 000000000..3e83d1c95
--- /dev/null
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/double_multiply.cpp
@@ -0,0 +1,45 @@
1// Copyright 2021 yuzu Emulator Project
2// Licensed under GPLv2 or any later version
3// Refer to the license.txt file included.
4
5#include "common/common_types.h"
6#include "shader_recompiler/exception.h"
7#include "shader_recompiler/frontend/maxwell/translate/impl/common_encoding.h"
8#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
9
10namespace Shader::Maxwell {
11namespace {
12
13void DMUL(TranslatorVisitor& v, u64 insn, const IR::F64& src_b) {
14 union {
15 u64 raw;
16 BitField<0, 8, IR::Reg> dest_reg;
17 BitField<8, 8, IR::Reg> src_a_reg;
18 BitField<39, 2, FpRounding> fp_rounding;
19 BitField<48, 1, u64> neg;
20 } const dmul{insn};
21
22 const IR::F64 src_a{v.ir.FPAbsNeg(v.D(dmul.src_a_reg), false, dmul.neg != 0)};
23 const IR::FpControl control{
24 .no_contraction{true},
25 .rounding{CastFpRounding(dmul.fp_rounding)},
26 .fmz_mode{IR::FmzMode::None},
27 };
28
29 v.D(dmul.dest_reg, v.ir.FPMul(src_a, src_b, control));
30}
31} // Anonymous namespace
32
33void TranslatorVisitor::DMUL_reg(u64 insn) {
34 DMUL(*this, insn, GetDoubleReg20(insn));
35}
36
37void TranslatorVisitor::DMUL_cbuf(u64 insn) {
38 DMUL(*this, insn, GetDoubleCbuf(insn));
39}
40
41void TranslatorVisitor::DMUL_imm(u64 insn) {
42 DMUL(*this, insn, GetDoubleImm20(insn));
43}
44
45} // namespace Shader::Maxwell
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp
index 2d2f6f9c6..758a0230a 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp
@@ -90,6 +90,14 @@ IR::F64 TranslatorVisitor::GetDoubleReg20(u64 insn) {
90 return D(reg.index); 90 return D(reg.index);
91} 91}
92 92
93IR::F64 TranslatorVisitor::GetDoubleReg39(u64 insn) {
94 union {
95 u64 raw;
96 BitField<39, 8, IR::Reg> index;
97 } const reg{insn};
98 return D(reg.index);
99}
100
93static std::pair<IR::U32, IR::U32> CbufAddr(u64 insn) { 101static std::pair<IR::U32, IR::U32> CbufAddr(u64 insn) {
94 union { 102 union {
95 u64 raw; 103 u64 raw;
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index 1a1073fa7..c994fe803 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -354,6 +354,7 @@ public:
354 [[nodiscard]] IR::F32 GetFloatReg20(u64 insn); 354 [[nodiscard]] IR::F32 GetFloatReg20(u64 insn);
355 [[nodiscard]] IR::F32 GetFloatReg39(u64 insn); 355 [[nodiscard]] IR::F32 GetFloatReg39(u64 insn);
356 [[nodiscard]] IR::F64 GetDoubleReg20(u64 insn); 356 [[nodiscard]] IR::F64 GetDoubleReg20(u64 insn);
357 [[nodiscard]] IR::F64 GetDoubleReg39(u64 insn);
357 358
358 [[nodiscard]] IR::U32 GetCbuf(u64 insn); 359 [[nodiscard]] IR::U32 GetCbuf(u64 insn);
359 [[nodiscard]] IR::F32 GetFloatCbuf(u64 insn); 360 [[nodiscard]] IR::F32 GetFloatCbuf(u64 insn);
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
index bd3c1f9d6..4e069912a 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
@@ -81,22 +81,6 @@ void TranslatorVisitor::DEPBAR() {
81 // DEPBAR is a no-op 81 // DEPBAR is a no-op
82} 82}
83 83
84void TranslatorVisitor::DFMA_reg(u64) {
85 ThrowNotImplemented(Opcode::DFMA_reg);
86}
87
88void TranslatorVisitor::DFMA_rc(u64) {
89 ThrowNotImplemented(Opcode::DFMA_rc);
90}
91
92void TranslatorVisitor::DFMA_cr(u64) {
93 ThrowNotImplemented(Opcode::DFMA_cr);
94}
95
96void TranslatorVisitor::DFMA_imm(u64) {
97 ThrowNotImplemented(Opcode::DFMA_imm);
98}
99
100void TranslatorVisitor::DMNMX_reg(u64) { 84void TranslatorVisitor::DMNMX_reg(u64) {
101 ThrowNotImplemented(Opcode::DMNMX_reg); 85 ThrowNotImplemented(Opcode::DMNMX_reg);
102} 86}
@@ -109,18 +93,6 @@ void TranslatorVisitor::DMNMX_imm(u64) {
109 ThrowNotImplemented(Opcode::DMNMX_imm); 93 ThrowNotImplemented(Opcode::DMNMX_imm);
110} 94}
111 95
112void TranslatorVisitor::DMUL_reg(u64) {
113 ThrowNotImplemented(Opcode::DMUL_reg);
114}
115
116void TranslatorVisitor::DMUL_cbuf(u64) {
117 ThrowNotImplemented(Opcode::DMUL_cbuf);
118}
119
120void TranslatorVisitor::DMUL_imm(u64) {
121 ThrowNotImplemented(Opcode::DMUL_imm);
122}
123
124void TranslatorVisitor::DSET_reg(u64) { 96void TranslatorVisitor::DSET_reg(u64) {
125 ThrowNotImplemented(Opcode::DSET_reg); 97 ThrowNotImplemented(Opcode::DSET_reg);
126} 98}