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-rw-r--r--src/shader_recompiler/frontend/ir/basic_block.cpp2
-rw-r--r--src/shader_recompiler/frontend/ir/post_order.cpp2
-rw-r--r--src/shader_recompiler/frontend/maxwell/program.cpp2
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp8
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/impl.h1
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/move_register.cpp35
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp4
7 files changed, 30 insertions, 24 deletions
diff --git a/src/shader_recompiler/frontend/ir/basic_block.cpp b/src/shader_recompiler/frontend/ir/basic_block.cpp
index 5ae91dd7d..ec029dfd6 100644
--- a/src/shader_recompiler/frontend/ir/basic_block.cpp
+++ b/src/shader_recompiler/frontend/ir/basic_block.cpp
@@ -127,6 +127,8 @@ static std::string ArgToIndex(const std::map<const Block*, size_t>& block_to_ind
127 return fmt::format("#{}", arg.U32()); 127 return fmt::format("#{}", arg.U32());
128 case Type::U64: 128 case Type::U64:
129 return fmt::format("#{}", arg.U64()); 129 return fmt::format("#{}", arg.U64());
130 case Type::F32:
131 return fmt::format("#{}", arg.F32());
130 case Type::Reg: 132 case Type::Reg:
131 return fmt::format("{}", arg.Reg()); 133 return fmt::format("{}", arg.Reg());
132 case Type::Pred: 134 case Type::Pred:
diff --git a/src/shader_recompiler/frontend/ir/post_order.cpp b/src/shader_recompiler/frontend/ir/post_order.cpp
index a48b8dec5..8709a2ea1 100644
--- a/src/shader_recompiler/frontend/ir/post_order.cpp
+++ b/src/shader_recompiler/frontend/ir/post_order.cpp
@@ -28,7 +28,7 @@ BlockList PostOrder(const BlockList& blocks) {
28 if (!visited.insert(branch).second) { 28 if (!visited.insert(branch).second) {
29 return false; 29 return false;
30 } 30 }
31 // Calling push_back twice is faster than insert on msvc 31 // Calling push_back twice is faster than insert on MSVC
32 block_stack.push_back(block); 32 block_stack.push_back(block);
33 block_stack.push_back(branch); 33 block_stack.push_back(branch);
34 return true; 34 return true;
diff --git a/src/shader_recompiler/frontend/maxwell/program.cpp b/src/shader_recompiler/frontend/maxwell/program.cpp
index 8331d576c..8c44ebb29 100644
--- a/src/shader_recompiler/frontend/maxwell/program.cpp
+++ b/src/shader_recompiler/frontend/maxwell/program.cpp
@@ -69,7 +69,7 @@ IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Blo
69 Optimization::VerificationPass(function); 69 Optimization::VerificationPass(function);
70 } 70 }
71 Optimization::CollectShaderInfoPass(program); 71 Optimization::CollectShaderInfoPass(program);
72 //*/ 72 fmt::print(stdout, "{}\n", IR::DumpProgram(program));
73 return program; 73 return program;
74} 74}
75 75
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp
index 3c9eaddd9..079e3497f 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp
@@ -24,6 +24,14 @@ void TranslatorVisitor::F(IR::Reg dest_reg, const IR::F32& value) {
24 X(dest_reg, ir.BitCast<IR::U32>(value)); 24 X(dest_reg, ir.BitCast<IR::U32>(value));
25} 25}
26 26
27IR::U32 TranslatorVisitor::GetReg8(u64 insn) {
28 union {
29 u64 raw;
30 BitField<8, 8, IR::Reg> index;
31 } const reg{insn};
32 return X(reg.index);
33}
34
27IR::U32 TranslatorVisitor::GetReg20(u64 insn) { 35IR::U32 TranslatorVisitor::GetReg20(u64 insn) {
28 union { 36 union {
29 u64 raw; 37 u64 raw;
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
index b701605d7..8bd468244 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
@@ -301,6 +301,7 @@ public:
301 void X(IR::Reg dest_reg, const IR::U32& value); 301 void X(IR::Reg dest_reg, const IR::U32& value);
302 void F(IR::Reg dest_reg, const IR::F32& value); 302 void F(IR::Reg dest_reg, const IR::F32& value);
303 303
304 [[nodiscard]] IR::U32 GetReg8(u64 insn);
304 [[nodiscard]] IR::U32 GetReg20(u64 insn); 305 [[nodiscard]] IR::U32 GetReg20(u64 insn);
305 [[nodiscard]] IR::U32 GetReg39(u64 insn); 306 [[nodiscard]] IR::U32 GetReg39(u64 insn);
306 [[nodiscard]] IR::F32 GetReg20F(u64 insn); 307 [[nodiscard]] IR::F32 GetReg20F(u64 insn);
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/move_register.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/move_register.cpp
index 1f83d1068..c3c4b9abd 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/move_register.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/move_register.cpp
@@ -10,36 +10,35 @@
10 10
11namespace Shader::Maxwell { 11namespace Shader::Maxwell {
12namespace { 12namespace {
13union MOV { 13void MOV(TranslatorVisitor& v, u64 insn, const IR::U32& src, bool is_mov32i = false) {
14 u64 raw; 14 union {
15 BitField<0, 8, IR::Reg> dest_reg; 15 u64 raw;
16 BitField<20, 8, IR::Reg> src_reg; 16 BitField<0, 8, IR::Reg> dest_reg;
17 BitField<39, 4, u64> mask; 17 BitField<39, 4, u64> mask;
18}; 18 BitField<12, 4, u64> mov32i_mask;
19 19 } const mov{insn};
20void CheckMask(MOV mov) { 20
21 if (mov.mask != 0xf) { 21 if ((is_mov32i ? mov.mov32i_mask : mov.mask) != 0xf) {
22 throw NotImplementedException("Non-full move mask"); 22 throw NotImplementedException("Non-full move mask");
23 } 23 }
24 v.X(mov.dest_reg, src);
24} 25}
25} // Anonymous namespace 26} // Anonymous namespace
26 27
27void TranslatorVisitor::MOV_reg(u64 insn) { 28void TranslatorVisitor::MOV_reg(u64 insn) {
28 const MOV mov{insn}; 29 MOV(*this, insn, GetReg8(insn));
29 CheckMask(mov);
30 X(mov.dest_reg, X(mov.src_reg));
31} 30}
32 31
33void TranslatorVisitor::MOV_cbuf(u64 insn) { 32void TranslatorVisitor::MOV_cbuf(u64 insn) {
34 const MOV mov{insn}; 33 MOV(*this, insn, GetCbuf(insn));
35 CheckMask(mov);
36 X(mov.dest_reg, GetCbuf(insn));
37} 34}
38 35
39void TranslatorVisitor::MOV_imm(u64 insn) { 36void TranslatorVisitor::MOV_imm(u64 insn) {
40 const MOV mov{insn}; 37 MOV(*this, insn, GetImm20(insn));
41 CheckMask(mov); 38}
42 X(mov.dest_reg, GetImm20(insn)); 39
40void TranslatorVisitor::MOV32I(u64 insn) {
41 MOV(*this, insn, GetImm32(insn), true);
43} 42}
44 43
45} // namespace Shader::Maxwell 44} // namespace Shader::Maxwell
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
index 1bb160acb..6b2a1356b 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
@@ -617,10 +617,6 @@ void TranslatorVisitor::MEMBAR(u64) {
617 ThrowNotImplemented(Opcode::MEMBAR); 617 ThrowNotImplemented(Opcode::MEMBAR);
618} 618}
619 619
620void TranslatorVisitor::MOV32I(u64) {
621 ThrowNotImplemented(Opcode::MOV32I);
622}
623
624void TranslatorVisitor::NOP(u64) { 620void TranslatorVisitor::NOP(u64) {
625 ThrowNotImplemented(Opcode::NOP); 621 ThrowNotImplemented(Opcode::NOP);
626} 622}