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-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/texture_gradient.cpp34
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/texture_load.cpp10
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/texture_mipmap_level.cpp26
3 files changed, 33 insertions, 37 deletions
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_gradient.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_gradient.cpp
index 00768e167..c66468a48 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_gradient.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_gradient.cpp
@@ -47,7 +47,7 @@ Shader::TextureType GetType(TextureType type, bool dc) {
47 47
48IR::Value MakeOffset(TranslatorVisitor& v, IR::Reg reg, bool has_lod_clamp) { 48IR::Value MakeOffset(TranslatorVisitor& v, IR::Reg reg, bool has_lod_clamp) {
49 const IR::U32 value{v.X(reg)}; 49 const IR::U32 value{v.X(reg)};
50 const u32 base = has_lod_clamp ? 12 : 16; 50 const u32 base{has_lod_clamp ? 12U : 16U};
51 return v.ir.CompositeConstruct( 51 return v.ir.CompositeConstruct(
52 v.ir.BitFieldExtract(value, v.ir.Imm32(base), v.ir.Imm32(4), true), 52 v.ir.BitFieldExtract(value, v.ir.Imm32(base), v.ir.Imm32(4), true),
53 v.ir.BitFieldExtract(value, v.ir.Imm32(base + 4), v.ir.Imm32(4), true)); 53 v.ir.BitFieldExtract(value, v.ir.Imm32(base + 4), v.ir.Imm32(4), true));
@@ -74,20 +74,21 @@ void Impl(TranslatorVisitor& v, u64 insn, bool is_bindless) {
74 } 74 }
75 75
76 IR::Value coords; 76 IR::Value coords;
77 u32 num_derivates; 77 u32 num_derivates{};
78 IR::Reg base_reg = txd.coord_reg; 78 IR::Reg base_reg{txd.coord_reg};
79 IR::Reg last_reg; 79 IR::Reg last_reg;
80 IR::Value handle; 80 IR::Value handle;
81 if (!is_bindless) { 81 if (is_bindless) {
82 handle = v.ir.Imm32(static_cast<u32>(txd.cbuf_offset.Value() * 4));
83 } else {
84 handle = v.X(base_reg++); 82 handle = v.X(base_reg++);
83 } else {
84 handle = v.ir.Imm32(static_cast<u32>(txd.cbuf_offset.Value() * 4));
85 } 85 }
86 86
87 const auto read_array{[&]() -> IR::F32 { 87 const auto read_array{[&]() -> IR::F32 {
88 return v.ir.ConvertUToF(32, 16, 88 const IR::U32 base{v.ir.Imm32(0)};
89 v.ir.BitFieldExtract(v.X(last_reg), v.ir.Imm32(0), 89 const IR::U32 count{v.ir.Imm32(has_lod_clamp ? 12 : 16)};
90 v.ir.Imm32(has_lod_clamp ? 12 : 16))); 90 const IR::U32 array_index{v.ir.BitFieldExtract(v.X(last_reg), base, count)};
91 return v.ir.ConvertUToF(32, 16, array_index);
91 }}; 92 }};
92 switch (txd.type) { 93 switch (txd.type) {
93 case TextureType::_1D: { 94 case TextureType::_1D: {
@@ -141,19 +142,20 @@ void Impl(TranslatorVisitor& v, u64 insn, bool is_bindless) {
141 142
142 IR::F32 lod_clamp; 143 IR::F32 lod_clamp;
143 if (has_lod_clamp) { 144 if (has_lod_clamp) {
144 const IR::F32 conv4_8fixp_f = v.ir.Imm32(Common::BitCast<f32>(0x3b800000U)); 145 // Lod Clamp is a Fixed Point 4.8, we need to transform it to float.
145 const IR::F32 tmp = v.ir.ConvertUToF( 146 // to convert a fixed point, float(value) / float(1 << fixed_point)
146 32, 16, v.ir.BitFieldExtract(v.X(last_reg), v.ir.Imm32(20), v.ir.Imm32(12))); 147 // in this case the fixed_point is 8.
147 lod_clamp = v.ir.FPMul(tmp, conv4_8fixp_f); 148 const IR::F32 conv4_8fixp_f{v.ir.Imm32(static_cast<f32>(1U << 8))};
149 const IR::F32 fixp_lc{v.ir.ConvertUToF(
150 32, 16, v.ir.BitFieldExtract(v.X(last_reg), v.ir.Imm32(20), v.ir.Imm32(12)))};
151 lod_clamp = v.ir.FPMul(fixp_lc, conv4_8fixp_f);
148 } 152 }
149 153
150 IR::TextureInstInfo info{}; 154 IR::TextureInstInfo info{};
151 info.type.Assign(GetType(txd.type, false)); 155 info.type.Assign(GetType(txd.type, false));
152 info.num_derivates.Assign(num_derivates); 156 info.num_derivates.Assign(num_derivates);
153 info.has_lod_clamp.Assign(has_lod_clamp ? 1 : 0); 157 info.has_lod_clamp.Assign(has_lod_clamp ? 1 : 0);
154 const IR::Value sample{[&]() -> IR::Value { 158 const IR::Value sample{v.ir.ImageGradient(handle, coords, derivates, offset, lod_clamp, info)};
155 return v.ir.ImageGradient(handle, coords, derivates, offset, lod_clamp, info);
156 }()};
157 159
158 IR::Reg dest_reg{txd.dest_reg}; 160 IR::Reg dest_reg{txd.dest_reg};
159 for (size_t element = 0; element < 4; ++element) { 161 for (size_t element = 0; element < 4; ++element) {
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_load.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_load.cpp
index df38f87a3..987b7ec34 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_load.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_load.cpp
@@ -117,10 +117,10 @@ void Impl(TranslatorVisitor& v, u64 insn, bool is_bindless) {
117 IR::Value offset; 117 IR::Value offset;
118 IR::U32 lod; 118 IR::U32 lod;
119 IR::U32 multisample; 119 IR::U32 multisample;
120 if (!is_bindless) { 120 if (is_bindless) {
121 handle = v.ir.Imm32(static_cast<u32>(tld.cbuf_offset.Value() * 4));
122 } else {
123 handle = v.X(meta_reg++); 121 handle = v.X(meta_reg++);
122 } else {
123 handle = v.ir.Imm32(static_cast<u32>(tld.cbuf_offset.Value() * 4));
124 } 124 }
125 if (tld.lod != 0) { 125 if (tld.lod != 0) {
126 lod = v.X(meta_reg++); 126 lod = v.X(meta_reg++);
@@ -138,9 +138,7 @@ void Impl(TranslatorVisitor& v, u64 insn, bool is_bindless) {
138 } 138 }
139 IR::TextureInstInfo info{}; 139 IR::TextureInstInfo info{};
140 info.type.Assign(GetType(tld.type, false)); 140 info.type.Assign(GetType(tld.type, false));
141 const IR::Value sample{[&]() -> IR::Value { 141 const IR::Value sample{v.ir.ImageFetch(handle, coords, offset, lod, multisample, info)};
142 return v.ir.ImageFetch(handle, coords, offset, lod, multisample, info);
143 }()};
144 142
145 IR::Reg dest_reg{tld.dest_reg}; 143 IR::Reg dest_reg{tld.dest_reg};
146 for (size_t element = 0; element < 4; ++element) { 144 for (size_t element = 0; element < 4; ++element) {
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_mipmap_level.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_mipmap_level.cpp
index ee13ede30..b6efc04f0 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_mipmap_level.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_mipmap_level.cpp
@@ -81,39 +81,35 @@ void Impl(TranslatorVisitor& v, u64 insn, bool is_bindless) {
81 BitField<36, 13, u64> cbuf_offset; 81 BitField<36, 13, u64> cbuf_offset;
82 } const tmml{insn}; 82 } const tmml{insn};
83 83
84 if ((tmml.mask & 0xC) != 0) { 84 if ((tmml.mask & 0b1100) != 0) {
85 throw NotImplementedException("TMML BA results are not implmented"); 85 throw NotImplementedException("TMML BA results are not implmented");
86 } 86 }
87 87
88 IR::F32 transform_constant = v.ir.Imm32(256.0f); 88 IR::F32 transform_constant{v.ir.Imm32(256.0f)};
89 89
90 const IR::Value coords{MakeCoords(v, tmml.coord_reg, tmml.type)}; 90 const IR::Value coords{MakeCoords(v, tmml.coord_reg, tmml.type)};
91 91
92 IR::U32 handle; 92 IR::U32 handle;
93 IR::Reg meta_reg{tmml.meta_reg}; 93 IR::Reg meta_reg{tmml.meta_reg};
94 if (!is_bindless) { 94 if (is_bindless) {
95 handle = v.ir.Imm32(static_cast<u32>(tmml.cbuf_offset.Value() * 4));
96 } else {
97 handle = v.X(meta_reg++); 95 handle = v.X(meta_reg++);
96 } else {
97 handle = v.ir.Imm32(static_cast<u32>(tmml.cbuf_offset.Value() * 4));
98 } 98 }
99 IR::TextureInstInfo info{}; 99 IR::TextureInstInfo info{};
100 info.type.Assign(GetType(tmml.type, false)); 100 info.type.Assign(GetType(tmml.type, false));
101 const IR::Value sample{ 101 const IR::Value sample{v.ir.ImageQueryLod(handle, coords, info)};
102 [&]() -> IR::Value { return v.ir.ImageQueryLod(handle, coords, info); }()};
103 102
104 const IR::FpControl fp_control{
105 .no_contraction{false},
106 .rounding{IR::FpRounding::RP},
107 .fmz_mode{IR::FmzMode::FTZ},
108 };
109 IR::Reg dest_reg{tmml.dest_reg}; 103 IR::Reg dest_reg{tmml.dest_reg};
110 for (size_t element = 0; element < 4; ++element) { 104 for (size_t element = 0; element < 4; ++element) {
111 if (((tmml.mask >> element) & 1) == 0) { 105 if (((tmml.mask >> element) & 1) == 0) {
112 continue; 106 continue;
113 } 107 }
114 IR::F32 value = IR::F32{v.ir.CompositeExtract(sample, element)}; 108 IR::F32 value{v.ir.CompositeExtract(sample, element)};
115 v.F(dest_reg, 109 if (element < 2) {
116 element < 2 ? IR::F32{v.ir.FPMul(value, transform_constant, fp_control)} : value); 110 value = v.ir.FPMul(value, transform_constant);
111 }
112 v.F(dest_reg, value);
117 ++dest_reg; 113 ++dest_reg;
118 } 114 }
119} 115}