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-rw-r--r--src/shader_recompiler/frontend/ir/ir_emitter.cpp4
-rw-r--r--src/shader_recompiler/frontend/ir/ir_emitter.h2
-rw-r--r--src/shader_recompiler/frontend/ir/opcodes.inc1
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp2
4 files changed, 9 insertions, 0 deletions
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
index 2fd90303f..b5f61956a 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
@@ -355,6 +355,10 @@ U32 IREmitter::LocalInvocationIdZ() {
355 return U32{CompositeExtract(Inst(Opcode::LocalInvocationId), 2)}; 355 return U32{CompositeExtract(Inst(Opcode::LocalInvocationId), 2)};
356} 356}
357 357
358U32 IREmitter::LaneId() {
359 return Inst<U32>(Opcode::LaneId);
360}
361
358U32 IREmitter::LoadGlobalU8(const U64& address) { 362U32 IREmitter::LoadGlobalU8(const U64& address) {
359 return Inst<U32>(Opcode::LoadGlobalU8, address); 363 return Inst<U32>(Opcode::LoadGlobalU8, address);
360} 364}
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.h b/src/shader_recompiler/frontend/ir/ir_emitter.h
index 5bebf66e3..e034d672f 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.h
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.h
@@ -97,6 +97,8 @@ public:
97 [[nodiscard]] U32 LocalInvocationIdY(); 97 [[nodiscard]] U32 LocalInvocationIdY();
98 [[nodiscard]] U32 LocalInvocationIdZ(); 98 [[nodiscard]] U32 LocalInvocationIdZ();
99 99
100 [[nodiscard]] U32 LaneId();
101
100 [[nodiscard]] U32 LoadGlobalU8(const U64& address); 102 [[nodiscard]] U32 LoadGlobalU8(const U64& address);
101 [[nodiscard]] U32 LoadGlobalS8(const U64& address); 103 [[nodiscard]] U32 LoadGlobalS8(const U64& address);
102 [[nodiscard]] U32 LoadGlobalU16(const U64& address); 104 [[nodiscard]] U32 LoadGlobalU16(const U64& address);
diff --git a/src/shader_recompiler/frontend/ir/opcodes.inc b/src/shader_recompiler/frontend/ir/opcodes.inc
index d9e0d5471..74e956930 100644
--- a/src/shader_recompiler/frontend/ir/opcodes.inc
+++ b/src/shader_recompiler/frontend/ir/opcodes.inc
@@ -63,6 +63,7 @@ OPCODE(SetTRFlag, Void, U1,
63OPCODE(SetMXFlag, Void, U1, ) 63OPCODE(SetMXFlag, Void, U1, )
64OPCODE(WorkgroupId, U32x3, ) 64OPCODE(WorkgroupId, U32x3, )
65OPCODE(LocalInvocationId, U32x3, ) 65OPCODE(LocalInvocationId, U32x3, )
66OPCODE(LaneId, U32, )
66 67
67// Undefined 68// Undefined
68OPCODE(UndefU1, U1, ) 69OPCODE(UndefU1, U1, )
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
index a295f4c5e..731ac643f 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
@@ -99,6 +99,8 @@ enum class SpecialRegister : u64 {
99 return ir.Imm32(Common::BitCast<u32>(1.0f)); 99 return ir.Imm32(Common::BitCast<u32>(1.0f));
100 case SpecialRegister::SR_WSCALEFACTOR_Z: 100 case SpecialRegister::SR_WSCALEFACTOR_Z:
101 return ir.Imm32(Common::BitCast<u32>(1.0f)); 101 return ir.Imm32(Common::BitCast<u32>(1.0f));
102 case SpecialRegister::SR_LANEID:
103 return ir.LaneId();
102 default: 104 default:
103 throw NotImplementedException("S2R special register {}", special_register); 105 throw NotImplementedException("S2R special register {}", special_register);
104 } 106 }