summaryrefslogtreecommitdiff
path: root/src/shader_recompiler/frontend
diff options
context:
space:
mode:
Diffstat (limited to 'src/shader_recompiler/frontend')
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_conversion_floating_point.cpp15
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/integer_add_three_input.cpp2
2 files changed, 10 insertions, 7 deletions
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_conversion_floating_point.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_conversion_floating_point.cpp
index 61484df57..02ab023c1 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_conversion_floating_point.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/floating_point_conversion_floating_point.cpp
@@ -184,16 +184,19 @@ void TranslatorVisitor::F2F_imm([[maybe_unused]] u64 insn) {
184 BitField<49, 1, u64> abs; 184 BitField<49, 1, u64> abs;
185 BitField<10, 2, FloatFormat> src_size; 185 BitField<10, 2, FloatFormat> src_size;
186 BitField<41, 1, u64> selector; 186 BitField<41, 1, u64> selector;
187 BitField<20, 20, u64> imm; 187 BitField<20, 19, u64> imm;
188 188 BitField<56, 1, u64> imm_neg;
189 } const f2f{insn}; 189 } const f2f{insn};
190 190
191 IR::F16F32F64 src_a; 191 IR::F16F32F64 src_a;
192 switch (f2f.src_size) { 192 switch (f2f.src_size) {
193 case FloatFormat::F16: { 193 case FloatFormat::F16: {
194 const u32 imm{static_cast<u32>(f2f.imm & 0x00ffff)}; 194 const u32 imm{static_cast<u32>(f2f.imm & 0x0000ffff)};
195 IR::Value vector{ir.UnpackFloat2x16(ir.Imm32(imm | (imm << 16)))}; 195 const IR::Value vector{ir.UnpackFloat2x16(ir.Imm32(imm | (imm << 16)))};
196 src_a = IR::F16{ir.CompositeExtract(vector, 0)}; 196 src_a = IR::F16{ir.CompositeExtract(vector, f2f.selector != 0 ? 0 : 1)};
197 if (f2f.imm_neg != 0) {
198 throw NotImplementedException("Neg bit on F16");
199 }
197 break; 200 break;
198 } 201 }
199 case FloatFormat::F32: 202 case FloatFormat::F32:
@@ -206,6 +209,6 @@ void TranslatorVisitor::F2F_imm([[maybe_unused]] u64 insn) {
206 throw NotImplementedException("Invalid dest format {}", f2f.src_size.Value()); 209 throw NotImplementedException("Invalid dest format {}", f2f.src_size.Value());
207 } 210 }
208 F2F(*this, insn, src_a, f2f.abs != 0); 211 F2F(*this, insn, src_a, f2f.abs != 0);
209} // namespace Shader::Maxwell 212}
210 213
211} // namespace Shader::Maxwell 214} // namespace Shader::Maxwell
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/integer_add_three_input.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/integer_add_three_input.cpp
index e88c0ffb6..15da90365 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/integer_add_three_input.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/integer_add_three_input.cpp
@@ -83,7 +83,7 @@ void IADD3(TranslatorVisitor& v, u64 insn, IR::U32 op_b, IR::U32 op_c) {
83 lhs = v.ir.IAdd(lhs, carry); 83 lhs = v.ir.IAdd(lhs, carry);
84 } 84 }
85 if (iadd3.cc != 0 && iadd3.shift == Shift::Left) { 85 if (iadd3.cc != 0 && iadd3.shift == Shift::Left) {
86 IR::U32 high_bits{v.ir.ShiftRightLogical(lhs, v.ir.Imm32(16))}; 86 const IR::U32 high_bits{v.ir.ShiftRightLogical(lhs, v.ir.Imm32(16))};
87 of_1 = v.ir.LogicalOr(of_1, v.ir.INotEqual(v.ir.Imm32(0), high_bits)); 87 of_1 = v.ir.LogicalOr(of_1, v.ir.INotEqual(v.ir.Imm32(0), high_bits));
88 } 88 }
89 lhs = IntegerShift(v.ir, lhs, iadd3.shift); 89 lhs = IntegerShift(v.ir, lhs, iadd3.shift);