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-rw-r--r--src/shader_recompiler/frontend/maxwell/program.cpp13
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/load_store_attribute.cpp16
2 files changed, 22 insertions, 7 deletions
diff --git a/src/shader_recompiler/frontend/maxwell/program.cpp b/src/shader_recompiler/frontend/maxwell/program.cpp
index aaf2a74a7..ab67446c8 100644
--- a/src/shader_recompiler/frontend/maxwell/program.cpp
+++ b/src/shader_recompiler/frontend/maxwell/program.cpp
@@ -69,9 +69,20 @@ IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Blo
69 program.post_order_blocks = PostOrder(program.blocks); 69 program.post_order_blocks = PostOrder(program.blocks);
70 program.stage = env.ShaderStage(); 70 program.stage = env.ShaderStage();
71 program.local_memory_size = env.LocalMemorySize(); 71 program.local_memory_size = env.LocalMemorySize();
72 if (program.stage == Stage::Compute) { 72 switch (program.stage) {
73 case Stage::Geometry: {
74 const ProgramHeader& sph{env.SPH()};
75 program.output_topology = sph.common3.output_topology;
76 program.output_vertices = sph.common4.max_output_vertices;
77 program.invocations = sph.common2.threads_per_input_primitive;
78 break;
79 }
80 case Stage::Compute:
73 program.workgroup_size = env.WorkgroupSize(); 81 program.workgroup_size = env.WorkgroupSize();
74 program.shared_memory_size = env.SharedMemorySize(); 82 program.shared_memory_size = env.SharedMemorySize();
83 break;
84 default:
85 break;
75 } 86 }
76 RemoveUnreachableBlocks(program); 87 RemoveUnreachableBlocks(program);
77 88
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_attribute.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_attribute.cpp
index 79293bd6b..eb6a80de2 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_attribute.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/load_store_attribute.cpp
@@ -64,7 +64,7 @@ void TranslatorVisitor::ALD(u64 insn) {
64 BitField<8, 8, IR::Reg> index_reg; 64 BitField<8, 8, IR::Reg> index_reg;
65 BitField<20, 10, u64> absolute_offset; 65 BitField<20, 10, u64> absolute_offset;
66 BitField<20, 11, s64> relative_offset; 66 BitField<20, 11, s64> relative_offset;
67 BitField<39, 8, IR::Reg> array_reg; 67 BitField<39, 8, IR::Reg> vertex_reg;
68 BitField<32, 1, u64> o; 68 BitField<32, 1, u64> o;
69 BitField<31, 1, u64> patch; 69 BitField<31, 1, u64> patch;
70 BitField<47, 2, Size> size; 70 BitField<47, 2, Size> size;
@@ -80,15 +80,17 @@ void TranslatorVisitor::ALD(u64 insn) {
80 if (offset % 4 != 0) { 80 if (offset % 4 != 0) {
81 throw NotImplementedException("Unaligned absolute offset {}", offset); 81 throw NotImplementedException("Unaligned absolute offset {}", offset);
82 } 82 }
83 const IR::U32 vertex{X(ald.vertex_reg)};
83 const u32 num_elements{NumElements(ald.size)}; 84 const u32 num_elements{NumElements(ald.size)};
84 if (ald.index_reg == IR::Reg::RZ) { 85 if (ald.index_reg == IR::Reg::RZ) {
85 for (u32 element = 0; element < num_elements; ++element) { 86 for (u32 element = 0; element < num_elements; ++element) {
86 F(ald.dest_reg + element, ir.GetAttribute(IR::Attribute{offset / 4 + element})); 87 const IR::Attribute attr{offset / 4 + element};
88 F(ald.dest_reg + element, ir.GetAttribute(attr, vertex));
87 } 89 }
88 return; 90 return;
89 } 91 }
90 HandleIndexed(*this, ald.index_reg, num_elements, [&](u32 element, IR::U32 final_offset) { 92 HandleIndexed(*this, ald.index_reg, num_elements, [&](u32 element, IR::U32 final_offset) {
91 F(ald.dest_reg + element, ir.GetAttributeIndexed(final_offset)); 93 F(ald.dest_reg + element, ir.GetAttributeIndexed(final_offset, vertex));
92 }); 94 });
93} 95}
94 96
@@ -100,7 +102,7 @@ void TranslatorVisitor::AST(u64 insn) {
100 BitField<20, 10, u64> absolute_offset; 102 BitField<20, 10, u64> absolute_offset;
101 BitField<20, 11, s64> relative_offset; 103 BitField<20, 11, s64> relative_offset;
102 BitField<31, 1, u64> patch; 104 BitField<31, 1, u64> patch;
103 BitField<39, 8, IR::Reg> array_reg; 105 BitField<39, 8, IR::Reg> vertex_reg;
104 BitField<47, 2, Size> size; 106 BitField<47, 2, Size> size;
105 } const ast{insn}; 107 } const ast{insn};
106 108
@@ -114,15 +116,17 @@ void TranslatorVisitor::AST(u64 insn) {
114 if (offset % 4 != 0) { 116 if (offset % 4 != 0) {
115 throw NotImplementedException("Unaligned absolute offset {}", offset); 117 throw NotImplementedException("Unaligned absolute offset {}", offset);
116 } 118 }
119 const IR::U32 vertex{X(ast.vertex_reg)};
117 const u32 num_elements{NumElements(ast.size)}; 120 const u32 num_elements{NumElements(ast.size)};
118 if (ast.index_reg == IR::Reg::RZ) { 121 if (ast.index_reg == IR::Reg::RZ) {
119 for (u32 element = 0; element < num_elements; ++element) { 122 for (u32 element = 0; element < num_elements; ++element) {
120 ir.SetAttribute(IR::Attribute{offset / 4 + element}, F(ast.src_reg + element)); 123 const IR::Attribute attr{offset / 4 + element};
124 ir.SetAttribute(attr, F(ast.src_reg + element), vertex);
121 } 125 }
122 return; 126 return;
123 } 127 }
124 HandleIndexed(*this, ast.index_reg, num_elements, [&](u32 element, IR::U32 final_offset) { 128 HandleIndexed(*this, ast.index_reg, num_elements, [&](u32 element, IR::U32 final_offset) {
125 ir.SetAttributeIndexed(final_offset, F(ast.src_reg + element)); 129 ir.SetAttributeIndexed(final_offset, F(ast.src_reg + element), vertex);
126 }); 130 });
127} 131}
128 132