diff options
Diffstat (limited to 'src/shader_recompiler/frontend/maxwell')
| -rw-r--r-- | src/shader_recompiler/frontend/maxwell/translate/impl/texture_fetch.cpp | 14 | ||||
| -rw-r--r-- | src/shader_recompiler/frontend/maxwell/translate/impl/texture_gather.cpp | 16 |
2 files changed, 16 insertions, 14 deletions
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_fetch.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_fetch.cpp index 1f1689c43..b2da079f9 100644 --- a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_fetch.cpp +++ b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_fetch.cpp | |||
| @@ -101,16 +101,18 @@ IR::Value MakeOffset(TranslatorVisitor& v, IR::Reg& reg, TextureType type) { | |||
| 101 | switch (type) { | 101 | switch (type) { |
| 102 | case TextureType::_1D: | 102 | case TextureType::_1D: |
| 103 | case TextureType::ARRAY_1D: | 103 | case TextureType::ARRAY_1D: |
| 104 | return v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(4)); | 104 | return v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(4), true); |
| 105 | case TextureType::_2D: | 105 | case TextureType::_2D: |
| 106 | case TextureType::ARRAY_2D: | 106 | case TextureType::ARRAY_2D: |
| 107 | return v.ir.CompositeConstruct(v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(4)), | 107 | return v.ir.CompositeConstruct( |
| 108 | v.ir.BitFieldExtract(value, v.ir.Imm32(4), v.ir.Imm32(4))); | 108 | v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(4), true), |
| 109 | v.ir.BitFieldExtract(value, v.ir.Imm32(4), v.ir.Imm32(4), true)); | ||
| 109 | case TextureType::_3D: | 110 | case TextureType::_3D: |
| 110 | case TextureType::ARRAY_3D: | 111 | case TextureType::ARRAY_3D: |
| 111 | return v.ir.CompositeConstruct(v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(4)), | 112 | return v.ir.CompositeConstruct( |
| 112 | v.ir.BitFieldExtract(value, v.ir.Imm32(4), v.ir.Imm32(4)), | 113 | v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(4), true), |
| 113 | v.ir.BitFieldExtract(value, v.ir.Imm32(8), v.ir.Imm32(4))); | 114 | v.ir.BitFieldExtract(value, v.ir.Imm32(4), v.ir.Imm32(4), true), |
| 115 | v.ir.BitFieldExtract(value, v.ir.Imm32(8), v.ir.Imm32(4), true)); | ||
| 114 | case TextureType::CUBE: | 116 | case TextureType::CUBE: |
| 115 | case TextureType::ARRAY_CUBE: | 117 | case TextureType::ARRAY_CUBE: |
| 116 | throw NotImplementedException("Illegal offset on CUBE sample"); | 118 | throw NotImplementedException("Illegal offset on CUBE sample"); |
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_gather.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_gather.cpp index 8c6384040..cdf5cb5c4 100644 --- a/src/shader_recompiler/frontend/maxwell/translate/impl/texture_gather.cpp +++ b/src/shader_recompiler/frontend/maxwell/translate/impl/texture_gather.cpp | |||
| @@ -106,17 +106,17 @@ IR::Value MakeOffset(TranslatorVisitor& v, IR::Reg& reg, TextureType type) { | |||
| 106 | throw NotImplementedException("Invalid texture type {}", type); | 106 | throw NotImplementedException("Invalid texture type {}", type); |
| 107 | } | 107 | } |
| 108 | 108 | ||
| 109 | std::pair<IR::Value, IR::Value> MakeOffsetPTP(TranslatorVisitor& v, IR::Reg& reg) { | 109 | IR::Value MakeOffsetPTP(TranslatorVisitor& v, IR::Reg& reg) { |
| 110 | const IR::U32 value1{v.X(reg++)}; | 110 | const IR::U32 value1{v.X(reg++)}; |
| 111 | const IR::U32 value2{v.X(reg++)}; | 111 | const IR::U32 value2{v.X(reg++)}; |
| 112 | const auto getVector = ([&v](const IR::U32& value) { | 112 | const IR::U32 bitsize = v.ir.Imm32(6); |
| 113 | const auto getVector = ([&v, &bitsize](const IR::U32& value, u32 base) { | ||
| 113 | return v.ir.CompositeConstruct( | 114 | return v.ir.CompositeConstruct( |
| 114 | v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(6), true), | 115 | v.ir.BitFieldExtract(value, v.ir.Imm32(base + 0), bitsize, true), |
| 115 | v.ir.BitFieldExtract(value, v.ir.Imm32(8), v.ir.Imm32(6), true), | 116 | v.ir.BitFieldExtract(value, v.ir.Imm32(base + 8), bitsize, true)); |
| 116 | v.ir.BitFieldExtract(value, v.ir.Imm32(16), v.ir.Imm32(6), true), | ||
| 117 | v.ir.BitFieldExtract(value, v.ir.Imm32(24), v.ir.Imm32(6), true)); | ||
| 118 | }); | 117 | }); |
| 119 | return {getVector(value1), getVector(value2)}; | 118 | return v.ir.CompositeConstruct(getVector(value1, 0), getVector(value1, 16), |
| 119 | getVector(value2, 0), getVector(value2, 16)); | ||
| 120 | } | 120 | } |
| 121 | 121 | ||
| 122 | void Impl(TranslatorVisitor& v, u64 insn, ComponentType component_type, OffsetType offset_type, | 122 | void Impl(TranslatorVisitor& v, u64 insn, ComponentType component_type, OffsetType offset_type, |
| @@ -155,7 +155,7 @@ void Impl(TranslatorVisitor& v, u64 insn, ComponentType component_type, OffsetTy | |||
| 155 | break; | 155 | break; |
| 156 | } | 156 | } |
| 157 | case OffsetType::PTP: { | 157 | case OffsetType::PTP: { |
| 158 | std::tie(offset, offset2) = MakeOffsetPTP(v, meta_reg); | 158 | offset2 = MakeOffsetPTP(v, meta_reg); |
| 159 | break; | 159 | break; |
| 160 | } | 160 | } |
| 161 | default: | 161 | default: |