summaryrefslogtreecommitdiff
path: root/src/shader_recompiler/frontend/maxwell/translate/impl
diff options
context:
space:
mode:
Diffstat (limited to 'src/shader_recompiler/frontend/maxwell/translate/impl')
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/branch_indirect.cpp36
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.cpp29
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.h39
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp8
4 files changed, 78 insertions, 34 deletions
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/branch_indirect.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/branch_indirect.cpp
new file mode 100644
index 000000000..371c0e0f7
--- /dev/null
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/branch_indirect.cpp
@@ -0,0 +1,36 @@
1// Copyright 2021 yuzu Emulator Project
2// Licensed under GPLv2 or any later version
3// Refer to the license.txt file included.
4
5#include "common/bit_field.h"
6#include "common/common_types.h"
7#include "shader_recompiler/exception.h"
8#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
9
10namespace Shader::Maxwell {
11namespace {
12void Check(u64 insn) {
13 union {
14 u64 raw;
15 BitField<5, 1, u64> cbuf_mode;
16 BitField<6, 1, u64> lmt;
17 } const encoding{insn};
18
19 if (encoding.cbuf_mode != 0) {
20 throw NotImplementedException("Constant buffer mode");
21 }
22 if (encoding.lmt != 0) {
23 throw NotImplementedException("LMT");
24 }
25}
26} // Anonymous namespace
27
28void TranslatorVisitor::BRX(u64 insn) {
29 Check(insn);
30}
31
32void TranslatorVisitor::JMX(u64 insn) {
33 Check(insn);
34}
35
36} // namespace Shader::Maxwell
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.cpp
index 39becf93c..49ccb7d62 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.cpp
@@ -5,25 +5,11 @@
5#include "common/bit_field.h" 5#include "common/bit_field.h"
6#include "common/common_types.h" 6#include "common/common_types.h"
7#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h" 7#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
8#include "shader_recompiler/frontend/maxwell/translate/impl/load_constant.h"
8 9
9namespace Shader::Maxwell { 10namespace Shader::Maxwell {
11using namespace LDC;
10namespace { 12namespace {
11enum class Mode : u64 {
12 Default,
13 IL,
14 IS,
15 ISL,
16};
17
18enum class Size : u64 {
19 U8,
20 S8,
21 U16,
22 S16,
23 B32,
24 B64,
25};
26
27std::pair<IR::U32, IR::U32> Slot(IR::IREmitter& ir, Mode mode, const IR::U32& imm_index, 13std::pair<IR::U32, IR::U32> Slot(IR::IREmitter& ir, Mode mode, const IR::U32& imm_index,
28 const IR::U32& reg, const IR::U32& imm) { 14 const IR::U32& reg, const IR::U32& imm) {
29 switch (mode) { 15 switch (mode) {
@@ -37,16 +23,7 @@ std::pair<IR::U32, IR::U32> Slot(IR::IREmitter& ir, Mode mode, const IR::U32& im
37} // Anonymous namespace 23} // Anonymous namespace
38 24
39void TranslatorVisitor::LDC(u64 insn) { 25void TranslatorVisitor::LDC(u64 insn) {
40 union { 26 const Encoding ldc{insn};
41 u64 raw;
42 BitField<0, 8, IR::Reg> dest_reg;
43 BitField<8, 8, IR::Reg> src_reg;
44 BitField<20, 16, s64> offset;
45 BitField<36, 5, u64> index;
46 BitField<44, 2, Mode> mode;
47 BitField<48, 3, Size> size;
48 } const ldc{insn};
49
50 const IR::U32 imm_index{ir.Imm32(static_cast<u32>(ldc.index))}; 27 const IR::U32 imm_index{ir.Imm32(static_cast<u32>(ldc.index))};
51 const IR::U32 reg{X(ldc.src_reg)}; 28 const IR::U32 reg{X(ldc.src_reg)};
52 const IR::U32 imm{ir.Imm32(static_cast<s32>(ldc.offset))}; 29 const IR::U32 imm{ir.Imm32(static_cast<s32>(ldc.offset))};
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.h b/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.h
new file mode 100644
index 000000000..3074ea0e3
--- /dev/null
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.h
@@ -0,0 +1,39 @@
1// Copyright 2021 yuzu Emulator Project
2// Licensed under GPLv2 or any later version
3// Refer to the license.txt file included.
4
5#pragma once
6
7#include "common/bit_field.h"
8#include "common/common_types.h"
9#include "shader_recompiler/frontend/ir/reg.h"
10
11namespace Shader::Maxwell::LDC {
12
13enum class Mode : u64 {
14 Default,
15 IL,
16 IS,
17 ISL,
18};
19
20enum class Size : u64 {
21 U8,
22 S8,
23 U16,
24 S16,
25 B32,
26 B64,
27};
28
29union Encoding {
30 u64 raw;
31 BitField<0, 8, IR::Reg> dest_reg;
32 BitField<8, 8, IR::Reg> src_reg;
33 BitField<20, 16, s64> offset;
34 BitField<36, 5, u64> index;
35 BitField<44, 2, Mode> mode;
36 BitField<48, 3, Size> size;
37};
38
39} // namespace Shader::Maxwell::LDC
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
index b62d8ee2a..a0057a473 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
@@ -53,10 +53,6 @@ void TranslatorVisitor::BRK(u64) {
53 ThrowNotImplemented(Opcode::BRK); 53 ThrowNotImplemented(Opcode::BRK);
54} 54}
55 55
56void TranslatorVisitor::BRX(u64) {
57 ThrowNotImplemented(Opcode::BRX);
58}
59
60void TranslatorVisitor::CAL() { 56void TranslatorVisitor::CAL() {
61 // CAL is a no-op 57 // CAL is a no-op
62} 58}
@@ -181,10 +177,6 @@ void TranslatorVisitor::JMP(u64) {
181 ThrowNotImplemented(Opcode::JMP); 177 ThrowNotImplemented(Opcode::JMP);
182} 178}
183 179
184void TranslatorVisitor::JMX(u64) {
185 ThrowNotImplemented(Opcode::JMX);
186}
187
188void TranslatorVisitor::KIL() { 180void TranslatorVisitor::KIL() {
189 // KIL is a no-op 181 // KIL is a no-op
190} 182}