diff options
Diffstat (limited to '')
| -rw-r--r-- | src/shader_recompiler/frontend/ir/ir_emitter.cpp | 22 | ||||
| -rw-r--r-- | src/shader_recompiler/frontend/ir/ir_emitter.h | 4 | ||||
| -rw-r--r-- | src/shader_recompiler/frontend/ir/opcodes.inc | 2 |
3 files changed, 22 insertions, 6 deletions
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp index 186920d8f..01f52183c 100644 --- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp +++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp | |||
| @@ -798,8 +798,15 @@ U32 IREmitter::IMul(const U32& a, const U32& b) { | |||
| 798 | return Inst<U32>(Opcode::IMul32, a, b); | 798 | return Inst<U32>(Opcode::IMul32, a, b); |
| 799 | } | 799 | } |
| 800 | 800 | ||
| 801 | U32 IREmitter::INeg(const U32& value) { | 801 | U32U64 IREmitter::INeg(const U32U64& value) { |
| 802 | return Inst<U32>(Opcode::INeg32, value); | 802 | switch (value.Type()) { |
| 803 | case Type::U32: | ||
| 804 | return Inst<U32>(Opcode::INeg32, value); | ||
| 805 | case Type::U64: | ||
| 806 | return Inst<U64>(Opcode::INeg64, value); | ||
| 807 | default: | ||
| 808 | ThrowInvalidType(value.Type()); | ||
| 809 | } | ||
| 803 | } | 810 | } |
| 804 | 811 | ||
| 805 | U32 IREmitter::IAbs(const U32& value) { | 812 | U32 IREmitter::IAbs(const U32& value) { |
| @@ -810,8 +817,15 @@ U32 IREmitter::ShiftLeftLogical(const U32& base, const U32& shift) { | |||
| 810 | return Inst<U32>(Opcode::ShiftLeftLogical32, base, shift); | 817 | return Inst<U32>(Opcode::ShiftLeftLogical32, base, shift); |
| 811 | } | 818 | } |
| 812 | 819 | ||
| 813 | U32 IREmitter::ShiftRightLogical(const U32& base, const U32& shift) { | 820 | U32U64 IREmitter::ShiftRightLogical(const U32U64& base, const U32& shift) { |
| 814 | return Inst<U32>(Opcode::ShiftRightLogical32, base, shift); | 821 | switch (base.Type()) { |
| 822 | case Type::U32: | ||
| 823 | return Inst<U32>(Opcode::ShiftRightLogical32, base, shift); | ||
| 824 | case Type::U64: | ||
| 825 | return Inst<U64>(Opcode::ShiftRightLogical64, base, shift); | ||
| 826 | default: | ||
| 827 | ThrowInvalidType(base.Type()); | ||
| 828 | } | ||
| 815 | } | 829 | } |
| 816 | 830 | ||
| 817 | U32 IREmitter::ShiftRightArithmetic(const U32& base, const U32& shift) { | 831 | U32 IREmitter::ShiftRightArithmetic(const U32& base, const U32& shift) { |
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.h b/src/shader_recompiler/frontend/ir/ir_emitter.h index 5beb99895..33bf2a7d0 100644 --- a/src/shader_recompiler/frontend/ir/ir_emitter.h +++ b/src/shader_recompiler/frontend/ir/ir_emitter.h | |||
| @@ -148,10 +148,10 @@ public: | |||
| 148 | [[nodiscard]] U32U64 IAdd(const U32U64& a, const U32U64& b); | 148 | [[nodiscard]] U32U64 IAdd(const U32U64& a, const U32U64& b); |
| 149 | [[nodiscard]] U32U64 ISub(const U32U64& a, const U32U64& b); | 149 | [[nodiscard]] U32U64 ISub(const U32U64& a, const U32U64& b); |
| 150 | [[nodiscard]] U32 IMul(const U32& a, const U32& b); | 150 | [[nodiscard]] U32 IMul(const U32& a, const U32& b); |
| 151 | [[nodiscard]] U32 INeg(const U32& value); | 151 | [[nodiscard]] U32U64 INeg(const U32U64& value); |
| 152 | [[nodiscard]] U32 IAbs(const U32& value); | 152 | [[nodiscard]] U32 IAbs(const U32& value); |
| 153 | [[nodiscard]] U32 ShiftLeftLogical(const U32& base, const U32& shift); | 153 | [[nodiscard]] U32 ShiftLeftLogical(const U32& base, const U32& shift); |
| 154 | [[nodiscard]] U32 ShiftRightLogical(const U32& base, const U32& shift); | 154 | [[nodiscard]] U32U64 ShiftRightLogical(const U32U64& base, const U32& shift); |
| 155 | [[nodiscard]] U32 ShiftRightArithmetic(const U32& base, const U32& shift); | 155 | [[nodiscard]] U32 ShiftRightArithmetic(const U32& base, const U32& shift); |
| 156 | [[nodiscard]] U32 BitwiseAnd(const U32& a, const U32& b); | 156 | [[nodiscard]] U32 BitwiseAnd(const U32& a, const U32& b); |
| 157 | [[nodiscard]] U32 BitwiseOr(const U32& a, const U32& b); | 157 | [[nodiscard]] U32 BitwiseOr(const U32& a, const U32& b); |
diff --git a/src/shader_recompiler/frontend/ir/opcodes.inc b/src/shader_recompiler/frontend/ir/opcodes.inc index acfc0a829..b51aaaef5 100644 --- a/src/shader_recompiler/frontend/ir/opcodes.inc +++ b/src/shader_recompiler/frontend/ir/opcodes.inc | |||
| @@ -233,9 +233,11 @@ OPCODE(ISub32, U32, U32, | |||
| 233 | OPCODE(ISub64, U64, U64, U64, ) | 233 | OPCODE(ISub64, U64, U64, U64, ) |
| 234 | OPCODE(IMul32, U32, U32, U32, ) | 234 | OPCODE(IMul32, U32, U32, U32, ) |
| 235 | OPCODE(INeg32, U32, U32, ) | 235 | OPCODE(INeg32, U32, U32, ) |
| 236 | OPCODE(INeg64, U64, U64, ) | ||
| 236 | OPCODE(IAbs32, U32, U32, ) | 237 | OPCODE(IAbs32, U32, U32, ) |
| 237 | OPCODE(ShiftLeftLogical32, U32, U32, U32, ) | 238 | OPCODE(ShiftLeftLogical32, U32, U32, U32, ) |
| 238 | OPCODE(ShiftRightLogical32, U32, U32, U32, ) | 239 | OPCODE(ShiftRightLogical32, U32, U32, U32, ) |
| 240 | OPCODE(ShiftRightLogical64, U64, U64, U32, ) | ||
| 239 | OPCODE(ShiftRightArithmetic32, U32, U32, U32, ) | 241 | OPCODE(ShiftRightArithmetic32, U32, U32, U32, ) |
| 240 | OPCODE(BitwiseAnd32, U32, U32, U32, ) | 242 | OPCODE(BitwiseAnd32, U32, U32, U32, ) |
| 241 | OPCODE(BitwiseOr32, U32, U32, U32, ) | 243 | OPCODE(BitwiseOr32, U32, U32, U32, ) |