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-rw-r--r--src/shader_recompiler/backend/glsl/emit_glsl_image.cpp29
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_image.cpp30
2 files changed, 59 insertions, 0 deletions
diff --git a/src/shader_recompiler/backend/glsl/emit_glsl_image.cpp b/src/shader_recompiler/backend/glsl/emit_glsl_image.cpp
index f335c8af0..418505475 100644
--- a/src/shader_recompiler/backend/glsl/emit_glsl_image.cpp
+++ b/src/shader_recompiler/backend/glsl/emit_glsl_image.cpp
@@ -143,6 +143,21 @@ IR::Inst* PrepareSparse(IR::Inst& inst) {
143 } 143 }
144 return sparse_inst; 144 return sparse_inst;
145} 145}
146
147std::string ImageGatherSubpixelOffset(const IR::TextureInstInfo& info, std::string_view texture,
148 std::string_view coords) {
149 switch (info.type) {
150 case TextureType::Color2D:
151 case TextureType::Color2DRect:
152 return fmt::format("{}+vec2(0.001953125)/vec2(textureSize({}, 0))", coords, texture);
153 case TextureType::ColorArray2D:
154 case TextureType::ColorCube:
155 return fmt::format("vec3({0}.xy+vec2(0.001953125)/vec2(textureSize({1}, 0)),{0}.z)", coords,
156 texture);
157 default:
158 return std::string{coords};
159 }
160}
146} // Anonymous namespace 161} // Anonymous namespace
147 162
148void EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst& inst, const IR::Value& index, 163void EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst& inst, const IR::Value& index,
@@ -340,6 +355,13 @@ void EmitImageGather(EmitContext& ctx, IR::Inst& inst, const IR::Value& index,
340 LOG_WARNING(Shader_GLSL, "Device does not support sparse texture queries. STUBBING"); 355 LOG_WARNING(Shader_GLSL, "Device does not support sparse texture queries. STUBBING");
341 ctx.AddU1("{}=true;", *sparse_inst); 356 ctx.AddU1("{}=true;", *sparse_inst);
342 } 357 }
358 std::string coords_with_subpixel_offset;
359 if (ctx.profile.need_gather_subpixel_offset) {
360 // Apply a subpixel offset of 1/512 the texel size of the texture to ensure same rounding on
361 // AMD hardware as on Maxwell or other Nvidia architectures.
362 coords_with_subpixel_offset = ImageGatherSubpixelOffset(info, texture, coords);
363 coords = coords_with_subpixel_offset;
364 }
343 if (!sparse_inst || !supports_sparse) { 365 if (!sparse_inst || !supports_sparse) {
344 if (offset.IsEmpty()) { 366 if (offset.IsEmpty()) {
345 ctx.Add("{}=textureGather({},{},int({}));", texel, texture, coords, 367 ctx.Add("{}=textureGather({},{},int({}));", texel, texture, coords,
@@ -387,6 +409,13 @@ void EmitImageGatherDref(EmitContext& ctx, IR::Inst& inst, const IR::Value& inde
387 LOG_WARNING(Shader_GLSL, "Device does not support sparse texture queries. STUBBING"); 409 LOG_WARNING(Shader_GLSL, "Device does not support sparse texture queries. STUBBING");
388 ctx.AddU1("{}=true;", *sparse_inst); 410 ctx.AddU1("{}=true;", *sparse_inst);
389 } 411 }
412 std::string coords_with_subpixel_offset;
413 if (ctx.profile.need_gather_subpixel_offset) {
414 // Apply a subpixel offset of 1/512 the texel size of the texture to ensure same rounding on
415 // AMD hardware as on Maxwell or other Nvidia architectures.
416 coords_with_subpixel_offset = ImageGatherSubpixelOffset(info, texture, coords);
417 coords = coords_with_subpixel_offset;
418 }
390 if (!sparse_inst || !supports_sparse) { 419 if (!sparse_inst || !supports_sparse) {
391 if (offset.IsEmpty()) { 420 if (offset.IsEmpty()) {
392 ctx.Add("{}=textureGather({},{},{});", texel, texture, coords, dref); 421 ctx.Add("{}=textureGather({},{},{});", texel, texture, coords, dref);
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp
index 02073c420..7d901c04b 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp
@@ -261,6 +261,30 @@ Id BitTest(EmitContext& ctx, Id mask, Id bit) {
261 const Id bit_value{ctx.OpBitwiseAnd(ctx.U32[1], shifted, ctx.Const(1u))}; 261 const Id bit_value{ctx.OpBitwiseAnd(ctx.U32[1], shifted, ctx.Const(1u))};
262 return ctx.OpINotEqual(ctx.U1, bit_value, ctx.u32_zero_value); 262 return ctx.OpINotEqual(ctx.U1, bit_value, ctx.u32_zero_value);
263} 263}
264
265Id ImageGatherSubpixelOffset(EmitContext& ctx, const IR::TextureInstInfo& info, Id texture,
266 Id coords) {
267 // Apply a subpixel offset of 1/512 the texel size of the texture to ensure same rounding on
268 // AMD hardware as on Maxwell or other Nvidia architectures.
269 const auto calculate_coords{[&](size_t dim) {
270 const Id nudge{ctx.Const(0x1p-9f)};
271 const Id image_size{ctx.OpImageQuerySizeLod(ctx.U32[dim], texture, ctx.u32_zero_value)};
272 Id offset{dim == 2 ? ctx.ConstantComposite(ctx.F32[dim], nudge, nudge)
273 : ctx.ConstantComposite(ctx.F32[dim], nudge, nudge, ctx.f32_zero_value)};
274 offset = ctx.OpFDiv(ctx.F32[dim], offset, ctx.OpConvertUToF(ctx.F32[dim], image_size));
275 return ctx.OpFAdd(ctx.F32[dim], coords, offset);
276 }};
277 switch (info.type) {
278 case TextureType::Color2D:
279 case TextureType::Color2DRect:
280 return calculate_coords(2);
281 case TextureType::ColorArray2D:
282 case TextureType::ColorCube:
283 return calculate_coords(3);
284 default:
285 return coords;
286 }
287}
264} // Anonymous namespace 288} // Anonymous namespace
265 289
266Id EmitBindlessImageSampleImplicitLod(EmitContext&) { 290Id EmitBindlessImageSampleImplicitLod(EmitContext&) {
@@ -423,6 +447,9 @@ Id EmitImageGather(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id
423 const IR::Value& offset, const IR::Value& offset2) { 447 const IR::Value& offset, const IR::Value& offset2) {
424 const auto info{inst->Flags<IR::TextureInstInfo>()}; 448 const auto info{inst->Flags<IR::TextureInstInfo>()};
425 const ImageOperands operands(ctx, offset, offset2); 449 const ImageOperands operands(ctx, offset, offset2);
450 if (ctx.profile.need_gather_subpixel_offset) {
451 coords = ImageGatherSubpixelOffset(ctx, info, TextureImage(ctx, info, index), coords);
452 }
426 return Emit(&EmitContext::OpImageSparseGather, &EmitContext::OpImageGather, ctx, inst, 453 return Emit(&EmitContext::OpImageSparseGather, &EmitContext::OpImageGather, ctx, inst,
427 ctx.F32[4], Texture(ctx, info, index), coords, ctx.Const(info.gather_component), 454 ctx.F32[4], Texture(ctx, info, index), coords, ctx.Const(info.gather_component),
428 operands.MaskOptional(), operands.Span()); 455 operands.MaskOptional(), operands.Span());
@@ -432,6 +459,9 @@ Id EmitImageGatherDref(EmitContext& ctx, IR::Inst* inst, const IR::Value& index,
432 const IR::Value& offset, const IR::Value& offset2, Id dref) { 459 const IR::Value& offset, const IR::Value& offset2, Id dref) {
433 const auto info{inst->Flags<IR::TextureInstInfo>()}; 460 const auto info{inst->Flags<IR::TextureInstInfo>()};
434 const ImageOperands operands(ctx, offset, offset2); 461 const ImageOperands operands(ctx, offset, offset2);
462 if (ctx.profile.need_gather_subpixel_offset) {
463 coords = ImageGatherSubpixelOffset(ctx, info, TextureImage(ctx, info, index), coords);
464 }
435 return Emit(&EmitContext::OpImageSparseDrefGather, &EmitContext::OpImageDrefGather, ctx, inst, 465 return Emit(&EmitContext::OpImageSparseDrefGather, &EmitContext::OpImageDrefGather, ctx, inst,
436 ctx.F32[4], Texture(ctx, info, index), coords, dref, operands.MaskOptional(), 466 ctx.F32[4], Texture(ctx, info, index), coords, dref, operands.MaskOptional(),
437 operands.Span()); 467 operands.Span());