2 files changed, 12 insertions, 12 deletions

diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h b/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h
index 26c97ce8e..174eaaafa 100644
--- a/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h
+++ b/src/shader_recompiler/backend/glasm/emit_glasm_instructions.h
@@ -437,10 +437,10 @@ void EmitGlobalAtomicMinF16x2(EmitContext& ctx);
 void EmitGlobalAtomicMinF32x2(EmitContext& ctx);
 void EmitGlobalAtomicMaxF16x2(EmitContext& ctx);
 void EmitGlobalAtomicMaxF32x2(EmitContext& ctx);
-void EmitLogicalOr(EmitContext& ctx, ScalarS32 a, ScalarS32 b);
-void EmitLogicalAnd(EmitContext& ctx, ScalarS32 a, ScalarS32 b);
-void EmitLogicalXor(EmitContext& ctx, ScalarS32 a, ScalarS32 b);
-void EmitLogicalNot(EmitContext& ctx, ScalarS32 value);
+void EmitLogicalOr(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b);
+void EmitLogicalAnd(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b);
+void EmitLogicalXor(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b);
+void EmitLogicalNot(EmitContext& ctx, IR::Inst& inst, ScalarS32 value);
 void EmitConvertS16F16(EmitContext& ctx, Register value);
 void EmitConvertS16F32(EmitContext& ctx, Register value);
 void EmitConvertS16F64(EmitContext& ctx, Register value);
diff --git a/src/shader_recompiler/backend/glasm/emit_glasm_not_implemented.cpp b/src/shader_recompiler/backend/glasm/emit_glasm_not_implemented.cpp
index 3f224062f..29eb75c6a 100644
--- a/src/shader_recompiler/backend/glasm/emit_glasm_not_implemented.cpp
+++ b/src/shader_recompiler/backend/glasm/emit_glasm_not_implemented.cpp
@@ -572,20 +572,20 @@ void EmitGlobalAtomicMaxF32x2(EmitContext& ctx) {
     NotImplemented();
 }
 
-void EmitLogicalOr(EmitContext& ctx, ScalarS32 a, ScalarS32 b) {
-    NotImplemented();
+void EmitLogicalOr(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {
+    ctx.Add("OR.S {},{},{};", inst, a, b);
 }
 
-void EmitLogicalAnd(EmitContext& ctx, ScalarS32 a, ScalarS32 b) {
-    NotImplemented();
+void EmitLogicalAnd(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {
+    ctx.Add("AND.S {},{},{};", inst, a, b);
 }
 
-void EmitLogicalXor(EmitContext& ctx, ScalarS32 a, ScalarS32 b) {
-    NotImplemented();
+void EmitLogicalXor(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {
+    ctx.Add("XOR.S {},{},{};", inst, a, b);
 }
 
-void EmitLogicalNot(EmitContext& ctx, ScalarS32 value) {
-    NotImplemented();
+void EmitLogicalNot(EmitContext& ctx, IR::Inst& inst, ScalarS32 value) {
+    ctx.Add("SEQ.S {},{},0;", inst, value);
 }
 
 void EmitConvertS16F16(EmitContext& ctx, Register value) {