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-rw-r--r--src/shader_recompiler/backend/spirv/emit_context.cpp158
-rw-r--r--src/shader_recompiler/backend/spirv/emit_context.h20
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv.cpp3
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv.h95
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp528
5 files changed, 800 insertions, 4 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_context.cpp b/src/shader_recompiler/backend/spirv/emit_context.cpp
index 32f8c4508..e5d83e9b4 100644
--- a/src/shader_recompiler/backend/spirv/emit_context.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_context.cpp
@@ -15,6 +15,53 @@
15 15
16namespace Shader::Backend::SPIRV { 16namespace Shader::Backend::SPIRV {
17namespace { 17namespace {
18enum class CasFunctionType {
19 Increment,
20 Decrement,
21 FPAdd,
22 FPMin,
23 FPMax,
24};
25
26Id CasFunction(EmitContext& ctx, CasFunctionType function_type, Id value_type) {
27 const Id func_type{ctx.TypeFunction(value_type, value_type, value_type)};
28 const Id func{ctx.OpFunction(value_type, spv::FunctionControlMask::MaskNone, func_type)};
29 const Id op_a{ctx.OpFunctionParameter(value_type)};
30 const Id op_b{ctx.OpFunctionParameter(value_type)};
31 ctx.AddLabel();
32 Id result{};
33 switch (function_type) {
34 case CasFunctionType::Increment: {
35 const Id pred{ctx.OpUGreaterThanEqual(ctx.U1, op_a, op_b)};
36 const Id incr{ctx.OpIAdd(value_type, op_a, ctx.Constant(value_type, 1))};
37 result = ctx.OpSelect(value_type, pred, ctx.u32_zero_value, incr);
38 break;
39 }
40 case CasFunctionType::Decrement: {
41 const Id lhs{ctx.OpIEqual(ctx.U1, op_a, ctx.Constant(value_type, 0u))};
42 const Id rhs{ctx.OpUGreaterThan(ctx.U1, op_a, op_b)};
43 const Id pred{ctx.OpLogicalOr(ctx.U1, lhs, rhs)};
44 const Id decr{ctx.OpISub(value_type, op_a, ctx.Constant(value_type, 1))};
45 result = ctx.OpSelect(value_type, pred, op_b, decr);
46 break;
47 }
48 case CasFunctionType::FPAdd:
49 result = ctx.OpFAdd(value_type, op_a, op_b);
50 break;
51 case CasFunctionType::FPMin:
52 result = ctx.OpFMin(value_type, op_a, op_b);
53 break;
54 case CasFunctionType::FPMax:
55 result = ctx.OpFMax(value_type, op_a, op_b);
56 break;
57 default:
58 break;
59 }
60 ctx.OpReturnValue(result);
61 ctx.OpFunctionEnd();
62 return func;
63}
64
18Id ImageType(EmitContext& ctx, const TextureDescriptor& desc) { 65Id ImageType(EmitContext& ctx, const TextureDescriptor& desc) {
19 const spv::ImageFormat format{spv::ImageFormat::Unknown}; 66 const spv::ImageFormat format{spv::ImageFormat::Unknown};
20 const Id type{ctx.F32[1]}; 67 const Id type{ctx.F32[1]};
@@ -196,6 +243,56 @@ Id EmitContext::Def(const IR::Value& value) {
196 } 243 }
197} 244}
198 245
246Id EmitContext::CasLoop(Id function, CasPointerType pointer_type, Id value_type) {
247 const Id loop_header{OpLabel()};
248 const Id continue_block{OpLabel()};
249 const Id merge_block{OpLabel()};
250 const Id storage_type{pointer_type == CasPointerType::Shared ? shared_memory_u32_type
251 : storage_memory_u32};
252 const Id func_type{TypeFunction(value_type, U32[1], value_type, storage_type)};
253 const Id func{OpFunction(value_type, spv::FunctionControlMask::MaskNone, func_type)};
254 const Id index{OpFunctionParameter(U32[1])};
255 const Id op_b{OpFunctionParameter(value_type)};
256 const Id base{OpFunctionParameter(storage_type)};
257 AddLabel();
258 const Id one{Constant(U32[1], 1)};
259 OpBranch(loop_header);
260 AddLabel(loop_header);
261 OpLoopMerge(merge_block, continue_block, spv::LoopControlMask::MaskNone);
262 OpBranch(continue_block);
263
264 AddLabel(continue_block);
265 const Id word_pointer{pointer_type == CasPointerType::Shared
266 ? OpAccessChain(shared_u32, base, index)
267 : OpAccessChain(storage_u32, base, u32_zero_value, index)};
268 if (value_type.value == F32[2].value) {
269 const Id u32_value{OpLoad(U32[1], word_pointer)};
270 const Id value{OpUnpackHalf2x16(F32[2], u32_value)};
271 const Id new_value{OpFunctionCall(value_type, function, value, op_b)};
272 const Id u32_new_value{OpPackHalf2x16(U32[1], new_value)};
273 const Id atomic_res{OpAtomicCompareExchange(U32[1], word_pointer, one, u32_zero_value,
274 u32_zero_value, u32_new_value, u32_value)};
275 const Id success{OpIEqual(U1, atomic_res, u32_value)};
276 OpBranchConditional(success, merge_block, loop_header);
277
278 AddLabel(merge_block);
279 OpReturnValue(OpUnpackHalf2x16(F32[2], atomic_res));
280 } else {
281 const Id value{OpLoad(U32[1], word_pointer)};
282 const Id new_value{OpBitcast(
283 U32[1], OpFunctionCall(value_type, function, OpBitcast(value_type, value), op_b))};
284 const Id atomic_res{OpAtomicCompareExchange(U32[1], word_pointer, one, u32_zero_value,
285 u32_zero_value, new_value, value)};
286 const Id success{OpIEqual(U1, atomic_res, value)};
287 OpBranchConditional(success, merge_block, loop_header);
288
289 AddLabel(merge_block);
290 OpReturnValue(OpBitcast(value_type, atomic_res));
291 }
292 OpFunctionEnd();
293 return func;
294}
295
199void EmitContext::DefineCommonTypes(const Info& info) { 296void EmitContext::DefineCommonTypes(const Info& info) {
200 void_id = TypeVoid(); 297 void_id = TypeVoid();
201 298
@@ -300,9 +397,9 @@ void EmitContext::DefineSharedMemory(const IR::Program& program) {
300 } 397 }
301 const u32 num_elements{Common::DivCeil(program.shared_memory_size, 4U)}; 398 const u32 num_elements{Common::DivCeil(program.shared_memory_size, 4U)};
302 const Id type{TypeArray(U32[1], Constant(U32[1], num_elements))}; 399 const Id type{TypeArray(U32[1], Constant(U32[1], num_elements))};
303 const Id pointer_type{TypePointer(spv::StorageClass::Workgroup, type)}; 400 shared_memory_u32_type = TypePointer(spv::StorageClass::Workgroup, type);
304 shared_u32 = TypePointer(spv::StorageClass::Workgroup, U32[1]); 401 shared_u32 = TypePointer(spv::StorageClass::Workgroup, U32[1]);
305 shared_memory_u32 = AddGlobalVariable(pointer_type, spv::StorageClass::Workgroup); 402 shared_memory_u32 = AddGlobalVariable(shared_memory_u32_type, spv::StorageClass::Workgroup);
306 interfaces.push_back(shared_memory_u32); 403 interfaces.push_back(shared_memory_u32);
307 404
308 const Id func_type{TypeFunction(void_id, U32[1], U32[1])}; 405 const Id func_type{TypeFunction(void_id, U32[1], U32[1])};
@@ -346,6 +443,14 @@ void EmitContext::DefineSharedMemory(const IR::Program& program) {
346 if (program.info.uses_int16) { 443 if (program.info.uses_int16) {
347 shared_store_u16_func = make_function(16, 16); 444 shared_store_u16_func = make_function(16, 16);
348 } 445 }
446 if (program.info.uses_shared_increment) {
447 const Id inc_func{CasFunction(*this, CasFunctionType::Increment, U32[1])};
448 increment_cas_shared = CasLoop(inc_func, CasPointerType::Shared, U32[1]);
449 }
450 if (program.info.uses_shared_decrement) {
451 const Id dec_func{CasFunction(*this, CasFunctionType::Decrement, U32[1])};
452 decrement_cas_shared = CasLoop(dec_func, CasPointerType::Shared, U32[1]);
453 }
349} 454}
350 455
351void EmitContext::DefineAttributeMemAccess(const Info& info) { 456void EmitContext::DefineAttributeMemAccess(const Info& info) {
@@ -530,12 +635,12 @@ void EmitContext::DefineStorageBuffers(const Info& info, u32& binding) {
530 MemberName(struct_type, 0, "data"); 635 MemberName(struct_type, 0, "data");
531 MemberDecorate(struct_type, 0, spv::Decoration::Offset, 0U); 636 MemberDecorate(struct_type, 0, spv::Decoration::Offset, 0U);
532 637
533 const Id storage_type{TypePointer(spv::StorageClass::StorageBuffer, struct_type)}; 638 storage_memory_u32 = TypePointer(spv::StorageClass::StorageBuffer, struct_type);
534 storage_u32 = TypePointer(spv::StorageClass::StorageBuffer, U32[1]); 639 storage_u32 = TypePointer(spv::StorageClass::StorageBuffer, U32[1]);
535 640
536 u32 index{}; 641 u32 index{};
537 for (const StorageBufferDescriptor& desc : info.storage_buffers_descriptors) { 642 for (const StorageBufferDescriptor& desc : info.storage_buffers_descriptors) {
538 const Id id{AddGlobalVariable(storage_type, spv::StorageClass::StorageBuffer)}; 643 const Id id{AddGlobalVariable(storage_memory_u32, spv::StorageClass::StorageBuffer)};
539 Decorate(id, spv::Decoration::Binding, binding); 644 Decorate(id, spv::Decoration::Binding, binding);
540 Decorate(id, spv::Decoration::DescriptorSet, 0U); 645 Decorate(id, spv::Decoration::DescriptorSet, 0U);
541 Name(id, fmt::format("ssbo{}", index)); 646 Name(id, fmt::format("ssbo{}", index));
@@ -546,6 +651,51 @@ void EmitContext::DefineStorageBuffers(const Info& info, u32& binding) {
546 index += desc.count; 651 index += desc.count;
547 binding += desc.count; 652 binding += desc.count;
548 } 653 }
654 if (info.uses_global_increment) {
655 AddCapability(spv::Capability::VariablePointersStorageBuffer);
656 const Id inc_func{CasFunction(*this, CasFunctionType::Increment, U32[1])};
657 increment_cas_ssbo = CasLoop(inc_func, CasPointerType::Ssbo, U32[1]);
658 }
659 if (info.uses_global_decrement) {
660 AddCapability(spv::Capability::VariablePointersStorageBuffer);
661 const Id dec_func{CasFunction(*this, CasFunctionType::Decrement, U32[1])};
662 decrement_cas_ssbo = CasLoop(dec_func, CasPointerType::Ssbo, U32[1]);
663 }
664 if (info.uses_atomic_f32_add) {
665 AddCapability(spv::Capability::VariablePointersStorageBuffer);
666 const Id add_func{CasFunction(*this, CasFunctionType::FPAdd, F32[1])};
667 f32_add_cas = CasLoop(add_func, CasPointerType::Ssbo, F32[1]);
668 }
669 if (info.uses_atomic_f16x2_add) {
670 AddCapability(spv::Capability::VariablePointersStorageBuffer);
671 const Id add_func{CasFunction(*this, CasFunctionType::FPAdd, F16[2])};
672 f16x2_add_cas = CasLoop(add_func, CasPointerType::Ssbo, F16[2]);
673 }
674 if (info.uses_atomic_f16x2_min) {
675 AddCapability(spv::Capability::VariablePointersStorageBuffer);
676 const Id func{CasFunction(*this, CasFunctionType::FPMin, F16[2])};
677 f16x2_min_cas = CasLoop(func, CasPointerType::Ssbo, F16[2]);
678 }
679 if (info.uses_atomic_f16x2_max) {
680 AddCapability(spv::Capability::VariablePointersStorageBuffer);
681 const Id func{CasFunction(*this, CasFunctionType::FPMax, F16[2])};
682 f16x2_max_cas = CasLoop(func, CasPointerType::Ssbo, F16[2]);
683 }
684 if (info.uses_atomic_f32x2_add) {
685 AddCapability(spv::Capability::VariablePointersStorageBuffer);
686 const Id add_func{CasFunction(*this, CasFunctionType::FPAdd, F32[2])};
687 f32x2_add_cas = CasLoop(add_func, CasPointerType::Ssbo, F32[2]);
688 }
689 if (info.uses_atomic_f32x2_min) {
690 AddCapability(spv::Capability::VariablePointersStorageBuffer);
691 const Id func{CasFunction(*this, CasFunctionType::FPMin, F32[2])};
692 f32x2_min_cas = CasLoop(func, CasPointerType::Ssbo, F32[2]);
693 }
694 if (info.uses_atomic_f32x2_max) {
695 AddCapability(spv::Capability::VariablePointersStorageBuffer);
696 const Id func{CasFunction(*this, CasFunctionType::FPMax, F32[2])};
697 f32x2_max_cas = CasLoop(func, CasPointerType::Ssbo, F32[2]);
698 }
549} 699}
550 700
551void EmitContext::DefineTextureBuffers(const Info& info, u32& binding) { 701void EmitContext::DefineTextureBuffers(const Info& info, u32& binding) {
diff --git a/src/shader_recompiler/backend/spirv/emit_context.h b/src/shader_recompiler/backend/spirv/emit_context.h
index e70f3458c..34f38454f 100644
--- a/src/shader_recompiler/backend/spirv/emit_context.h
+++ b/src/shader_recompiler/backend/spirv/emit_context.h
@@ -94,6 +94,7 @@ public:
94 Id output_f32{}; 94 Id output_f32{};
95 95
96 Id storage_u32{}; 96 Id storage_u32{};
97 Id storage_memory_u32{};
97 98
98 Id image_buffer_type{}; 99 Id image_buffer_type{};
99 Id sampled_texture_buffer_type{}; 100 Id sampled_texture_buffer_type{};
@@ -136,9 +137,21 @@ public:
136 Id shared_memory_u32{}; 137 Id shared_memory_u32{};
137 Id shared_memory_u32x2{}; 138 Id shared_memory_u32x2{};
138 Id shared_memory_u32x4{}; 139 Id shared_memory_u32x4{};
140 Id shared_memory_u32_type{};
139 141
140 Id shared_store_u8_func{}; 142 Id shared_store_u8_func{};
141 Id shared_store_u16_func{}; 143 Id shared_store_u16_func{};
144 Id increment_cas_shared{};
145 Id increment_cas_ssbo{};
146 Id decrement_cas_shared{};
147 Id decrement_cas_ssbo{};
148 Id f32_add_cas{};
149 Id f16x2_add_cas{};
150 Id f16x2_min_cas{};
151 Id f16x2_max_cas{};
152 Id f32x2_add_cas{};
153 Id f32x2_min_cas{};
154 Id f32x2_max_cas{};
142 155
143 Id input_position{}; 156 Id input_position{};
144 std::array<Id, 32> input_generics{}; 157 std::array<Id, 32> input_generics{};
@@ -153,6 +166,11 @@ public:
153 std::vector<Id> interfaces; 166 std::vector<Id> interfaces;
154 167
155private: 168private:
169 enum class CasPointerType {
170 Shared,
171 Ssbo,
172 };
173
156 void DefineCommonTypes(const Info& info); 174 void DefineCommonTypes(const Info& info);
157 void DefineCommonConstants(); 175 void DefineCommonConstants();
158 void DefineInterfaces(const Info& info); 176 void DefineInterfaces(const Info& info);
@@ -171,6 +189,8 @@ private:
171 189
172 void DefineInputs(const Info& info); 190 void DefineInputs(const Info& info);
173 void DefineOutputs(const Info& info); 191 void DefineOutputs(const Info& info);
192
193 [[nodiscard]] Id CasLoop(Id function, CasPointerType pointer_type, Id value_type);
174}; 194};
175 195
176} // namespace Shader::Backend::SPIRV 196} // namespace Shader::Backend::SPIRV
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.cpp b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
index 5a1ffd61c..9248bd78b 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
@@ -238,6 +238,9 @@ void SetupCapabilities(const Profile& profile, const Info& info, EmitContext& ct
238 ctx.AddCapability(spv::Capability::SubgroupVoteKHR); 238 ctx.AddCapability(spv::Capability::SubgroupVoteKHR);
239 } 239 }
240 } 240 }
241 if (info.uses_64_bit_atomics && profile.support_int64_atomics) {
242 ctx.AddCapability(spv::Capability::Int64Atomics);
243 }
241 if (info.uses_typeless_image_reads && profile.support_typeless_image_loads) { 244 if (info.uses_typeless_image_reads && profile.support_typeless_image_loads) {
242 ctx.AddCapability(spv::Capability::StorageImageReadWithoutFormat); 245 ctx.AddCapability(spv::Capability::StorageImageReadWithoutFormat);
243 } 246 }
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.h b/src/shader_recompiler/backend/spirv/emit_spirv.h
index 12b7993ae..a3398a605 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.h
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.h
@@ -306,6 +306,101 @@ Id EmitUGreaterThan(EmitContext& ctx, Id lhs, Id rhs);
306Id EmitINotEqual(EmitContext& ctx, Id lhs, Id rhs); 306Id EmitINotEqual(EmitContext& ctx, Id lhs, Id rhs);
307Id EmitSGreaterThanEqual(EmitContext& ctx, Id lhs, Id rhs); 307Id EmitSGreaterThanEqual(EmitContext& ctx, Id lhs, Id rhs);
308Id EmitUGreaterThanEqual(EmitContext& ctx, Id lhs, Id rhs); 308Id EmitUGreaterThanEqual(EmitContext& ctx, Id lhs, Id rhs);
309Id EmitSharedAtomicIAdd32(EmitContext& ctx, Id pointer_offset, Id value);
310Id EmitSharedAtomicSMin32(EmitContext& ctx, Id pointer_offset, Id value);
311Id EmitSharedAtomicUMin32(EmitContext& ctx, Id pointer_offset, Id value);
312Id EmitSharedAtomicSMax32(EmitContext& ctx, Id pointer_offset, Id value);
313Id EmitSharedAtomicUMax32(EmitContext& ctx, Id pointer_offset, Id value);
314Id EmitSharedAtomicInc32(EmitContext& ctx, Id pointer_offset, Id value);
315Id EmitSharedAtomicDec32(EmitContext& ctx, Id pointer_offset, Id value);
316Id EmitSharedAtomicAnd32(EmitContext& ctx, Id pointer_offset, Id value);
317Id EmitSharedAtomicOr32(EmitContext& ctx, Id pointer_offset, Id value);
318Id EmitSharedAtomicXor32(EmitContext& ctx, Id pointer_offset, Id value);
319Id EmitSharedAtomicExchange32(EmitContext& ctx, Id pointer_offset, Id value);
320Id EmitSharedAtomicExchange64(EmitContext& ctx, Id pointer_offset, Id value);
321Id EmitStorageAtomicIAdd32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
322 Id value);
323Id EmitStorageAtomicSMin32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
324 Id value);
325Id EmitStorageAtomicUMin32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
326 Id value);
327Id EmitStorageAtomicSMax32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
328 Id value);
329Id EmitStorageAtomicUMax32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
330 Id value);
331Id EmitStorageAtomicInc32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
332 Id value);
333Id EmitStorageAtomicDec32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
334 Id value);
335Id EmitStorageAtomicAnd32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
336 Id value);
337Id EmitStorageAtomicOr32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
338 Id value);
339Id EmitStorageAtomicXor32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
340 Id value);
341Id EmitStorageAtomicExchange32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
342 Id value);
343Id EmitStorageAtomicIAdd64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
344 Id value);
345Id EmitStorageAtomicSMin64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
346 Id value);
347Id EmitStorageAtomicUMin64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
348 Id value);
349Id EmitStorageAtomicSMax64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
350 Id value);
351Id EmitStorageAtomicUMax64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
352 Id value);
353Id EmitStorageAtomicAnd64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
354 Id value);
355Id EmitStorageAtomicOr64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
356 Id value);
357Id EmitStorageAtomicXor64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
358 Id value);
359Id EmitStorageAtomicExchange64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
360 Id value);
361Id EmitStorageAtomicAddF32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
362 Id value);
363Id EmitStorageAtomicAddF16x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
364 Id value);
365Id EmitStorageAtomicAddF32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
366 Id value);
367Id EmitStorageAtomicMinF16x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
368 Id value);
369Id EmitStorageAtomicMinF32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
370 Id value);
371Id EmitStorageAtomicMaxF16x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
372 Id value);
373Id EmitStorageAtomicMaxF32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
374 Id value);
375Id EmitGlobalAtomicIAdd32(EmitContext& ctx);
376Id EmitGlobalAtomicSMin32(EmitContext& ctx);
377Id EmitGlobalAtomicUMin32(EmitContext& ctx);
378Id EmitGlobalAtomicSMax32(EmitContext& ctx);
379Id EmitGlobalAtomicUMax32(EmitContext& ctx);
380Id EmitGlobalAtomicInc32(EmitContext& ctx);
381Id EmitGlobalAtomicDec32(EmitContext& ctx);
382Id EmitGlobalAtomicAnd32(EmitContext& ctx);
383Id EmitGlobalAtomicOr32(EmitContext& ctx);
384Id EmitGlobalAtomicXor32(EmitContext& ctx);
385Id EmitGlobalAtomicExchange32(EmitContext& ctx);
386Id EmitGlobalAtomicIAdd64(EmitContext& ctx);
387Id EmitGlobalAtomicSMin64(EmitContext& ctx);
388Id EmitGlobalAtomicUMin64(EmitContext& ctx);
389Id EmitGlobalAtomicSMax64(EmitContext& ctx);
390Id EmitGlobalAtomicUMax64(EmitContext& ctx);
391Id EmitGlobalAtomicInc64(EmitContext& ctx);
392Id EmitGlobalAtomicDec64(EmitContext& ctx);
393Id EmitGlobalAtomicAnd64(EmitContext& ctx);
394Id EmitGlobalAtomicOr64(EmitContext& ctx);
395Id EmitGlobalAtomicXor64(EmitContext& ctx);
396Id EmitGlobalAtomicExchange64(EmitContext& ctx);
397Id EmitGlobalAtomicAddF32(EmitContext& ctx);
398Id EmitGlobalAtomicAddF16x2(EmitContext& ctx);
399Id EmitGlobalAtomicAddF32x2(EmitContext& ctx);
400Id EmitGlobalAtomicMinF16x2(EmitContext& ctx);
401Id EmitGlobalAtomicMinF32x2(EmitContext& ctx);
402Id EmitGlobalAtomicMaxF16x2(EmitContext& ctx);
403Id EmitGlobalAtomicMaxF32x2(EmitContext& ctx);
309Id EmitLogicalOr(EmitContext& ctx, Id a, Id b); 404Id EmitLogicalOr(EmitContext& ctx, Id a, Id b);
310Id EmitLogicalAnd(EmitContext& ctx, Id a, Id b); 405Id EmitLogicalAnd(EmitContext& ctx, Id a, Id b);
311Id EmitLogicalXor(EmitContext& ctx, Id a, Id b); 406Id EmitLogicalXor(EmitContext& ctx, Id a, Id b);
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp
new file mode 100644
index 000000000..03d891419
--- /dev/null
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp
@@ -0,0 +1,528 @@
1// Copyright 2021 yuzu Emulator Project
2// Licensed under GPLv2 or any later version
3// Refer to the license.txt file included.
4
5#include "shader_recompiler/backend/spirv/emit_spirv.h"
6
7namespace Shader::Backend::SPIRV {
8namespace {
9
10Id GetSharedPointer(EmitContext& ctx, Id offset, u32 index_offset = 0) {
11 const Id shift_id{ctx.Constant(ctx.U32[1], 2U)};
12 const Id shifted_value{ctx.OpShiftRightArithmetic(ctx.U32[1], offset, shift_id)};
13 const Id index{ctx.OpIAdd(ctx.U32[1], shifted_value, ctx.Constant(ctx.U32[1], index_offset))};
14 return ctx.profile.support_explicit_workgroup_layout
15 ? ctx.OpAccessChain(ctx.shared_u32, ctx.shared_memory_u32, ctx.u32_zero_value, index)
16 : ctx.OpAccessChain(ctx.shared_u32, ctx.shared_memory_u32, index);
17}
18
19Id StorageIndex(EmitContext& ctx, const IR::Value& offset, size_t element_size) {
20 if (offset.IsImmediate()) {
21 const u32 imm_offset{static_cast<u32>(offset.U32() / element_size)};
22 return ctx.Constant(ctx.U32[1], imm_offset);
23 }
24 const u32 shift{static_cast<u32>(std::countr_zero(element_size))};
25 const Id index{ctx.Def(offset)};
26 if (shift == 0) {
27 return index;
28 }
29 const Id shift_id{ctx.Constant(ctx.U32[1], shift)};
30 return ctx.OpShiftRightLogical(ctx.U32[1], index, shift_id);
31}
32
33Id GetStoragePointer(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
34 u32 index_offset = 0) {
35 // TODO: Support reinterpreting bindings, guaranteed to be aligned
36 if (!binding.IsImmediate()) {
37 throw NotImplementedException("Dynamic storage buffer indexing");
38 }
39 const Id ssbo{ctx.ssbos[binding.U32()]};
40 const Id base_index{StorageIndex(ctx, offset, sizeof(u32))};
41 const Id index{ctx.OpIAdd(ctx.U32[1], base_index, ctx.Constant(ctx.U32[1], index_offset))};
42 return ctx.OpAccessChain(ctx.storage_u32, ssbo, ctx.u32_zero_value, index);
43}
44
45std::pair<Id, Id> GetAtomicArgs(EmitContext& ctx) {
46 const Id scope{ctx.Constant(ctx.U32[1], static_cast<u32>(spv::Scope::Device))};
47 const Id semantics{ctx.u32_zero_value};
48 return {scope, semantics};
49}
50
51Id LoadU64(EmitContext& ctx, Id pointer_1, Id pointer_2) {
52 const Id value_1{ctx.OpLoad(ctx.U32[1], pointer_1)};
53 const Id value_2{ctx.OpLoad(ctx.U32[1], pointer_2)};
54 const Id original_composite{ctx.OpCompositeConstruct(ctx.U32[2], value_1, value_2)};
55 return ctx.OpBitcast(ctx.U64, original_composite);
56}
57
58void StoreResult(EmitContext& ctx, Id pointer_1, Id pointer_2, Id result) {
59 const Id composite{ctx.OpBitcast(ctx.U32[2], result)};
60 ctx.OpStore(pointer_1, ctx.OpCompositeExtract(ctx.U32[1], composite, 0));
61 ctx.OpStore(pointer_2, ctx.OpCompositeExtract(ctx.U32[1], composite, 1));
62}
63} // Anonymous namespace
64
65Id EmitSharedAtomicIAdd32(EmitContext& ctx, Id pointer_offset, Id value) {
66 const Id pointer{GetSharedPointer(ctx, pointer_offset)};
67 const auto [scope, semantics]{GetAtomicArgs(ctx)};
68 return ctx.OpAtomicIAdd(ctx.U32[1], pointer, scope, semantics, value);
69}
70
71Id EmitSharedAtomicSMin32(EmitContext& ctx, Id pointer_offset, Id value) {
72 const Id pointer{GetSharedPointer(ctx, pointer_offset)};
73 const auto [scope, semantics]{GetAtomicArgs(ctx)};
74 return ctx.OpAtomicSMin(ctx.U32[1], pointer, scope, semantics, value);
75}
76
77Id EmitSharedAtomicUMin32(EmitContext& ctx, Id pointer_offset, Id value) {
78 const Id pointer{GetSharedPointer(ctx, pointer_offset)};
79 const auto [scope, semantics]{GetAtomicArgs(ctx)};
80 return ctx.OpAtomicUMin(ctx.U32[1], pointer, scope, semantics, value);
81}
82
83Id EmitSharedAtomicSMax32(EmitContext& ctx, Id pointer_offset, Id value) {
84 const Id pointer{GetSharedPointer(ctx, pointer_offset)};
85 const auto [scope, semantics]{GetAtomicArgs(ctx)};
86 return ctx.OpAtomicSMax(ctx.U32[1], pointer, scope, semantics, value);
87}
88
89Id EmitSharedAtomicUMax32(EmitContext& ctx, Id pointer_offset, Id value) {
90 const Id pointer{GetSharedPointer(ctx, pointer_offset)};
91 const auto [scope, semantics]{GetAtomicArgs(ctx)};
92 return ctx.OpAtomicUMax(ctx.U32[1], pointer, scope, semantics, value);
93}
94
95Id EmitSharedAtomicInc32(EmitContext& ctx, Id pointer_offset, Id value) {
96 const Id shift_id{ctx.Constant(ctx.U32[1], 2U)};
97 const Id index{ctx.OpShiftRightArithmetic(ctx.U32[1], pointer_offset, shift_id)};
98 return ctx.OpFunctionCall(ctx.U32[1], ctx.increment_cas_shared, index, value,
99 ctx.shared_memory_u32);
100}
101
102Id EmitSharedAtomicDec32(EmitContext& ctx, Id pointer_offset, Id value) {
103 const Id shift_id{ctx.Constant(ctx.U32[1], 2U)};
104 const Id index{ctx.OpShiftRightArithmetic(ctx.U32[1], pointer_offset, shift_id)};
105 return ctx.OpFunctionCall(ctx.U32[1], ctx.decrement_cas_shared, index, value,
106 ctx.shared_memory_u32);
107}
108
109Id EmitSharedAtomicAnd32(EmitContext& ctx, Id pointer_offset, Id value) {
110 const Id pointer{GetSharedPointer(ctx, pointer_offset)};
111 const auto [scope, semantics]{GetAtomicArgs(ctx)};
112 return ctx.OpAtomicAnd(ctx.U32[1], pointer, scope, semantics, value);
113}
114
115Id EmitSharedAtomicOr32(EmitContext& ctx, Id pointer_offset, Id value) {
116 const Id pointer{GetSharedPointer(ctx, pointer_offset)};
117 const auto [scope, semantics]{GetAtomicArgs(ctx)};
118 return ctx.OpAtomicOr(ctx.U32[1], pointer, scope, semantics, value);
119}
120
121Id EmitSharedAtomicXor32(EmitContext& ctx, Id pointer_offset, Id value) {
122 const Id pointer{GetSharedPointer(ctx, pointer_offset)};
123 const auto [scope, semantics]{GetAtomicArgs(ctx)};
124 return ctx.OpAtomicXor(ctx.U32[1], pointer, scope, semantics, value);
125}
126
127Id EmitSharedAtomicExchange32(EmitContext& ctx, Id pointer_offset, Id value) {
128 const Id pointer{GetSharedPointer(ctx, pointer_offset)};
129 const auto [scope, semantics]{GetAtomicArgs(ctx)};
130 return ctx.OpAtomicExchange(ctx.U32[1], pointer, scope, semantics, value);
131}
132
133Id EmitSharedAtomicExchange64(EmitContext& ctx, Id pointer_offset, Id value) {
134 const Id pointer_1{GetSharedPointer(ctx, pointer_offset)};
135 if (ctx.profile.support_int64_atomics) {
136 const auto [scope, semantics]{GetAtomicArgs(ctx)};
137 return ctx.OpAtomicExchange(ctx.U64, pointer_1, scope, semantics, value);
138 }
139 // LOG_WARNING(Render_Vulkan, "Int64 Atomics not supported, fallback to non-atomic");
140 const Id pointer_2{GetSharedPointer(ctx, pointer_offset, 1)};
141 const Id original_value{LoadU64(ctx, pointer_1, pointer_2)};
142 StoreResult(ctx, pointer_1, pointer_2, value);
143 return original_value;
144}
145
146Id EmitStorageAtomicIAdd32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
147 Id value) {
148 const Id pointer{GetStoragePointer(ctx, binding, offset)};
149 const auto [scope, semantics]{GetAtomicArgs(ctx)};
150 return ctx.OpAtomicIAdd(ctx.U32[1], pointer, scope, semantics, value);
151}
152
153Id EmitStorageAtomicSMin32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
154 Id value) {
155 const Id pointer{GetStoragePointer(ctx, binding, offset)};
156 const auto [scope, semantics]{GetAtomicArgs(ctx)};
157 return ctx.OpAtomicSMin(ctx.U32[1], pointer, scope, semantics, value);
158}
159
160Id EmitStorageAtomicUMin32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
161 Id value) {
162 const Id pointer{GetStoragePointer(ctx, binding, offset)};
163 const auto [scope, semantics]{GetAtomicArgs(ctx)};
164 return ctx.OpAtomicUMin(ctx.U32[1], pointer, scope, semantics, value);
165}
166
167Id EmitStorageAtomicSMax32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
168 Id value) {
169 const Id pointer{GetStoragePointer(ctx, binding, offset)};
170 const auto [scope, semantics]{GetAtomicArgs(ctx)};
171 return ctx.OpAtomicSMax(ctx.U32[1], pointer, scope, semantics, value);
172}
173
174Id EmitStorageAtomicUMax32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
175 Id value) {
176 const Id pointer{GetStoragePointer(ctx, binding, offset)};
177 const auto [scope, semantics]{GetAtomicArgs(ctx)};
178 return ctx.OpAtomicUMax(ctx.U32[1], pointer, scope, semantics, value);
179}
180
181Id EmitStorageAtomicInc32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
182 Id value) {
183 const Id ssbo{ctx.ssbos[binding.U32()]};
184 const Id base_index{StorageIndex(ctx, offset, sizeof(u32))};
185 return ctx.OpFunctionCall(ctx.U32[1], ctx.increment_cas_ssbo, base_index, value, ssbo);
186}
187
188Id EmitStorageAtomicDec32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
189 Id value) {
190 const Id ssbo{ctx.ssbos[binding.U32()]};
191 const Id base_index{StorageIndex(ctx, offset, sizeof(u32))};
192 return ctx.OpFunctionCall(ctx.U32[1], ctx.decrement_cas_ssbo, base_index, value, ssbo);
193}
194
195Id EmitStorageAtomicAnd32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
196 Id value) {
197 const Id pointer{GetStoragePointer(ctx, binding, offset)};
198 const auto [scope, semantics]{GetAtomicArgs(ctx)};
199 return ctx.OpAtomicAnd(ctx.U32[1], pointer, scope, semantics, value);
200}
201
202Id EmitStorageAtomicOr32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
203 Id value) {
204 const Id pointer{GetStoragePointer(ctx, binding, offset)};
205 const auto [scope, semantics]{GetAtomicArgs(ctx)};
206 return ctx.OpAtomicOr(ctx.U32[1], pointer, scope, semantics, value);
207}
208
209Id EmitStorageAtomicXor32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
210 Id value) {
211 const Id pointer{GetStoragePointer(ctx, binding, offset)};
212 const auto [scope, semantics]{GetAtomicArgs(ctx)};
213 return ctx.OpAtomicXor(ctx.U32[1], pointer, scope, semantics, value);
214}
215
216Id EmitStorageAtomicExchange32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
217 Id value) {
218 const Id pointer{GetStoragePointer(ctx, binding, offset)};
219 const auto [scope, semantics]{GetAtomicArgs(ctx)};
220 return ctx.OpAtomicExchange(ctx.U32[1], pointer, scope, semantics, value);
221}
222
223Id EmitStorageAtomicIAdd64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
224 Id value) {
225 const Id pointer_1{GetStoragePointer(ctx, binding, offset)};
226 if (ctx.profile.support_int64_atomics) {
227 const auto [scope, semantics]{GetAtomicArgs(ctx)};
228 return ctx.OpAtomicIAdd(ctx.U64, pointer_1, scope, semantics, value);
229 }
230 // LOG_WARNING(Render_Vulkan, "Int64 Atomics not supported, fallback to non-atomic");
231 const Id pointer_2{GetStoragePointer(ctx, binding, offset, 1)};
232 const Id original_value{LoadU64(ctx, pointer_1, pointer_2)};
233 const Id result{ctx.OpIAdd(ctx.U64, value, original_value)};
234 StoreResult(ctx, pointer_1, pointer_2, result);
235 return original_value;
236}
237
238Id EmitStorageAtomicSMin64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
239 Id value) {
240 const Id pointer_1{GetStoragePointer(ctx, binding, offset)};
241 if (ctx.profile.support_int64_atomics) {
242 const auto [scope, semantics]{GetAtomicArgs(ctx)};
243 return ctx.OpAtomicSMin(ctx.U64, pointer_1, scope, semantics, value);
244 }
245 // LOG_WARNING(Render_Vulkan, "Int64 Atomics not supported, fallback to non-atomic");
246 const Id pointer_2{GetStoragePointer(ctx, binding, offset, 1)};
247 const Id original_value{LoadU64(ctx, pointer_1, pointer_2)};
248 const Id result{ctx.OpSMin(ctx.U64, value, original_value)};
249 StoreResult(ctx, pointer_1, pointer_2, result);
250 return original_value;
251}
252
253Id EmitStorageAtomicUMin64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
254 Id value) {
255 const Id pointer_1{GetStoragePointer(ctx, binding, offset)};
256 if (ctx.profile.support_int64_atomics) {
257 const auto [scope, semantics]{GetAtomicArgs(ctx)};
258 return ctx.OpAtomicUMin(ctx.U64, pointer_1, scope, semantics, value);
259 }
260 // LOG_WARNING(Render_Vulkan, "Int64 Atomics not supported, fallback to non-atomic");
261 const Id pointer_2{GetStoragePointer(ctx, binding, offset, 1)};
262 const Id original_value{LoadU64(ctx, pointer_1, pointer_2)};
263 const Id result{ctx.OpUMin(ctx.U64, value, original_value)};
264 StoreResult(ctx, pointer_1, pointer_2, result);
265 return original_value;
266}
267
268Id EmitStorageAtomicSMax64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
269 Id value) {
270 const Id pointer_1{GetStoragePointer(ctx, binding, offset)};
271 if (ctx.profile.support_int64_atomics) {
272 const auto [scope, semantics]{GetAtomicArgs(ctx)};
273 return ctx.OpAtomicSMax(ctx.U64, pointer_1, scope, semantics, value);
274 }
275 // LOG_WARNING(Render_Vulkan, "Int64 Atomics not supported, fallback to non-atomic");
276 const Id pointer_2{GetStoragePointer(ctx, binding, offset, 1)};
277 const Id original_value{LoadU64(ctx, pointer_1, pointer_2)};
278 const Id result{ctx.OpSMax(ctx.U64, value, original_value)};
279 StoreResult(ctx, pointer_1, pointer_2, result);
280 return original_value;
281}
282
283Id EmitStorageAtomicUMax64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
284 Id value) {
285 const Id pointer_1{GetStoragePointer(ctx, binding, offset)};
286 if (ctx.profile.support_int64_atomics) {
287 const auto [scope, semantics]{GetAtomicArgs(ctx)};
288 return ctx.OpAtomicUMax(ctx.U64, pointer_1, scope, semantics, value);
289 }
290 // LOG_WARNING(Render_Vulkan, "Int64 Atomics not supported, fallback to non-atomic");
291 const Id pointer_2{GetStoragePointer(ctx, binding, offset, 1)};
292 const Id original_value{LoadU64(ctx, pointer_1, pointer_2)};
293 const Id result{ctx.OpUMax(ctx.U64, value, original_value)};
294 StoreResult(ctx, pointer_1, pointer_2, result);
295 return original_value;
296}
297
298Id EmitStorageAtomicAnd64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
299 Id value) {
300 const Id pointer_1{GetStoragePointer(ctx, binding, offset)};
301 if (ctx.profile.support_int64_atomics) {
302 const auto [scope, semantics]{GetAtomicArgs(ctx)};
303 return ctx.OpAtomicAnd(ctx.U64, pointer_1, scope, semantics, value);
304 }
305 // LOG_WARNING(Render_Vulkan, "Int64 Atomics not supported, fallback to non-atomic");
306 const Id pointer_2{GetStoragePointer(ctx, binding, offset, 1)};
307 const Id original_value{LoadU64(ctx, pointer_1, pointer_2)};
308 const Id result{ctx.OpBitwiseAnd(ctx.U64, value, original_value)};
309 StoreResult(ctx, pointer_1, pointer_2, result);
310 return original_value;
311}
312
313Id EmitStorageAtomicOr64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
314 Id value) {
315 const Id pointer_1{GetStoragePointer(ctx, binding, offset)};
316 if (ctx.profile.support_int64_atomics) {
317 const auto [scope, semantics]{GetAtomicArgs(ctx)};
318 return ctx.OpAtomicOr(ctx.U64, pointer_1, scope, semantics, value);
319 }
320 // LOG_WARNING(Render_Vulkan, "Int64 Atomics not supported, fallback to non-atomic");
321 const Id pointer_2{GetStoragePointer(ctx, binding, offset, 1)};
322 const Id original_value{LoadU64(ctx, pointer_1, pointer_2)};
323 const Id result{ctx.OpBitwiseOr(ctx.U64, value, original_value)};
324 StoreResult(ctx, pointer_1, pointer_2, result);
325 return original_value;
326}
327
328Id EmitStorageAtomicXor64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
329 Id value) {
330 const Id pointer_1{GetStoragePointer(ctx, binding, offset)};
331 if (ctx.profile.support_int64_atomics) {
332 const auto [scope, semantics]{GetAtomicArgs(ctx)};
333 return ctx.OpAtomicXor(ctx.U64, pointer_1, scope, semantics, value);
334 }
335 // LOG_WARNING(Render_Vulkan, "Int64 Atomics not supported, fallback to non-atomic");
336 const Id pointer_2{GetStoragePointer(ctx, binding, offset, 1)};
337 const Id original_value{LoadU64(ctx, pointer_1, pointer_2)};
338 const Id result{ctx.OpBitwiseXor(ctx.U64, value, original_value)};
339 StoreResult(ctx, pointer_1, pointer_2, result);
340 return original_value;
341}
342
343Id EmitStorageAtomicExchange64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
344 Id value) {
345 const Id pointer_1{GetStoragePointer(ctx, binding, offset)};
346 if (ctx.profile.support_int64_atomics) {
347 const auto [scope, semantics]{GetAtomicArgs(ctx)};
348 return ctx.OpAtomicExchange(ctx.U64, pointer_1, scope, semantics, value);
349 }
350 // LOG_WARNING(Render_Vulkan, "Int64 Atomics not supported, fallback to non-atomic");
351 const Id pointer_2{GetStoragePointer(ctx, binding, offset, 1)};
352 const Id original_value{LoadU64(ctx, pointer_1, pointer_2)};
353 StoreResult(ctx, pointer_1, pointer_2, value);
354 return original_value;
355}
356
357Id EmitStorageAtomicAddF32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
358 Id value) {
359 const Id ssbo{ctx.ssbos[binding.U32()]};
360 const Id base_index{StorageIndex(ctx, offset, sizeof(u32))};
361 return ctx.OpFunctionCall(ctx.F32[1], ctx.f32_add_cas, base_index, value, ssbo);
362}
363
364Id EmitStorageAtomicAddF16x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
365 Id value) {
366 const Id ssbo{ctx.ssbos[binding.U32()]};
367 const Id base_index{StorageIndex(ctx, offset, sizeof(u32))};
368 const Id result{ctx.OpFunctionCall(ctx.F16[2], ctx.f16x2_add_cas, base_index, value, ssbo)};
369 return ctx.OpBitcast(ctx.U32[1], result);
370}
371
372Id EmitStorageAtomicAddF32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
373 Id value) {
374 const Id ssbo{ctx.ssbos[binding.U32()]};
375 const Id base_index{StorageIndex(ctx, offset, sizeof(u32))};
376 const Id result{ctx.OpFunctionCall(ctx.F32[2], ctx.f32x2_add_cas, base_index, value, ssbo)};
377 return ctx.OpPackHalf2x16(ctx.U32[1], result);
378}
379
380Id EmitStorageAtomicMinF16x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
381 Id value) {
382 const Id ssbo{ctx.ssbos[binding.U32()]};
383 const Id base_index{StorageIndex(ctx, offset, sizeof(u32))};
384 const Id result{ctx.OpFunctionCall(ctx.F16[2], ctx.f16x2_min_cas, base_index, value, ssbo)};
385 return ctx.OpBitcast(ctx.U32[1], result);
386}
387
388Id EmitStorageAtomicMinF32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
389 Id value) {
390 const Id ssbo{ctx.ssbos[binding.U32()]};
391 const Id base_index{StorageIndex(ctx, offset, sizeof(u32))};
392 const Id result{ctx.OpFunctionCall(ctx.F32[2], ctx.f32x2_min_cas, base_index, value, ssbo)};
393 return ctx.OpPackHalf2x16(ctx.U32[1], result);
394}
395
396Id EmitStorageAtomicMaxF16x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
397 Id value) {
398 const Id ssbo{ctx.ssbos[binding.U32()]};
399 const Id base_index{StorageIndex(ctx, offset, sizeof(u32))};
400 const Id result{ctx.OpFunctionCall(ctx.F16[2], ctx.f16x2_max_cas, base_index, value, ssbo)};
401 return ctx.OpBitcast(ctx.U32[1], result);
402}
403
404Id EmitStorageAtomicMaxF32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
405 Id value) {
406 const Id ssbo{ctx.ssbos[binding.U32()]};
407 const Id base_index{StorageIndex(ctx, offset, sizeof(u32))};
408 const Id result{ctx.OpFunctionCall(ctx.F32[2], ctx.f32x2_max_cas, base_index, value, ssbo)};
409 return ctx.OpPackHalf2x16(ctx.U32[1], result);
410}
411
412Id EmitGlobalAtomicIAdd32(EmitContext&) {
413 throw NotImplementedException("SPIR-V Instruction");
414}
415
416Id EmitGlobalAtomicSMin32(EmitContext&) {
417 throw NotImplementedException("SPIR-V Instruction");
418}
419
420Id EmitGlobalAtomicUMin32(EmitContext&) {
421 throw NotImplementedException("SPIR-V Instruction");
422}
423
424Id EmitGlobalAtomicSMax32(EmitContext&) {
425 throw NotImplementedException("SPIR-V Instruction");
426}
427
428Id EmitGlobalAtomicUMax32(EmitContext&) {
429 throw NotImplementedException("SPIR-V Instruction");
430}
431
432Id EmitGlobalAtomicInc32(EmitContext&) {
433 throw NotImplementedException("SPIR-V Instruction");
434}
435
436Id EmitGlobalAtomicDec32(EmitContext&) {
437 throw NotImplementedException("SPIR-V Instruction");
438}
439
440Id EmitGlobalAtomicAnd32(EmitContext&) {
441 throw NotImplementedException("SPIR-V Instruction");
442}
443
444Id EmitGlobalAtomicOr32(EmitContext&) {
445 throw NotImplementedException("SPIR-V Instruction");
446}
447
448Id EmitGlobalAtomicXor32(EmitContext&) {
449 throw NotImplementedException("SPIR-V Instruction");
450}
451
452Id EmitGlobalAtomicExchange32(EmitContext&) {
453 throw NotImplementedException("SPIR-V Instruction");
454}
455
456Id EmitGlobalAtomicIAdd64(EmitContext&) {
457 throw NotImplementedException("SPIR-V Instruction");
458}
459
460Id EmitGlobalAtomicSMin64(EmitContext&) {
461 throw NotImplementedException("SPIR-V Instruction");
462}
463
464Id EmitGlobalAtomicUMin64(EmitContext&) {
465 throw NotImplementedException("SPIR-V Instruction");
466}
467
468Id EmitGlobalAtomicSMax64(EmitContext&) {
469 throw NotImplementedException("SPIR-V Instruction");
470}
471
472Id EmitGlobalAtomicUMax64(EmitContext&) {
473 throw NotImplementedException("SPIR-V Instruction");
474}
475
476Id EmitGlobalAtomicInc64(EmitContext&) {
477 throw NotImplementedException("SPIR-V Instruction");
478}
479
480Id EmitGlobalAtomicDec64(EmitContext&) {
481 throw NotImplementedException("SPIR-V Instruction");
482}
483
484Id EmitGlobalAtomicAnd64(EmitContext&) {
485 throw NotImplementedException("SPIR-V Instruction");
486}
487
488Id EmitGlobalAtomicOr64(EmitContext&) {
489 throw NotImplementedException("SPIR-V Instruction");
490}
491
492Id EmitGlobalAtomicXor64(EmitContext&) {
493 throw NotImplementedException("SPIR-V Instruction");
494}
495
496Id EmitGlobalAtomicExchange64(EmitContext&) {
497 throw NotImplementedException("SPIR-V Instruction");
498}
499
500Id EmitGlobalAtomicAddF32(EmitContext&) {
501 throw NotImplementedException("SPIR-V Instruction");
502}
503
504Id EmitGlobalAtomicAddF16x2(EmitContext&) {
505 throw NotImplementedException("SPIR-V Instruction");
506}
507
508Id EmitGlobalAtomicAddF32x2(EmitContext&) {
509 throw NotImplementedException("SPIR-V Instruction");
510}
511
512Id EmitGlobalAtomicMinF16x2(EmitContext&) {
513 throw NotImplementedException("SPIR-V Instruction");
514}
515
516Id EmitGlobalAtomicMinF32x2(EmitContext&) {
517 throw NotImplementedException("SPIR-V Instruction");
518}
519
520Id EmitGlobalAtomicMaxF16x2(EmitContext&) {
521 throw NotImplementedException("SPIR-V Instruction");
522}
523
524Id EmitGlobalAtomicMaxF32x2(EmitContext&) {
525 throw NotImplementedException("SPIR-V Instruction");
526}
527
528} // namespace Shader::Backend::SPIRV
HIC SVNT DRACONES