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Diffstat (limited to 'src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp')
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
index 3ef4f3d78..e811a63ab 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
@@ -73,8 +73,8 @@ Id EmitSPIRV::EmitBitFieldUExtract(EmitContext& ctx, Id base, Id offset, Id coun
73 return ctx.OpBitFieldUExtract(ctx.u32[1], base, offset, count); 73 return ctx.OpBitFieldUExtract(ctx.u32[1], base, offset, count);
74} 74}
75 75
76void EmitSPIRV::EmitSLessThan(EmitContext&) { 76Id EmitSPIRV::EmitSLessThan(EmitContext& ctx, Id lhs, Id rhs) {
77 throw NotImplementedException("SPIR-V Instruction"); 77 return ctx.OpSLessThan(ctx.u1, lhs, rhs);
78} 78}
79 79
80void EmitSPIRV::EmitULessThan(EmitContext&) { 80void EmitSPIRV::EmitULessThan(EmitContext&) {
@@ -93,8 +93,8 @@ void EmitSPIRV::EmitULessThanEqual(EmitContext&) {
93 throw NotImplementedException("SPIR-V Instruction"); 93 throw NotImplementedException("SPIR-V Instruction");
94} 94}
95 95
96void EmitSPIRV::EmitSGreaterThan(EmitContext&) { 96Id EmitSPIRV::EmitSGreaterThan(EmitContext& ctx, Id lhs, Id rhs) {
97 throw NotImplementedException("SPIR-V Instruction"); 97 return ctx.OpSGreaterThan(ctx.u1, lhs, rhs);
98} 98}
99 99
100void EmitSPIRV::EmitUGreaterThan(EmitContext&) { 100void EmitSPIRV::EmitUGreaterThan(EmitContext&) {