diff options
Diffstat (limited to 'src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp')
| -rw-r--r-- | src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp index 406df1b78..e49ca7bde 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp | |||
| @@ -106,6 +106,14 @@ Id EmitBitReverse32(EmitContext& ctx, Id value) { | |||
| 106 | return ctx.OpBitReverse(ctx.U32[1], value); | 106 | return ctx.OpBitReverse(ctx.U32[1], value); |
| 107 | } | 107 | } |
| 108 | 108 | ||
| 109 | Id EmitBitCount32(EmitContext& ctx, Id value) { | ||
| 110 | return ctx.OpBitCount(ctx.U32[1], value); | ||
| 111 | } | ||
| 112 | |||
| 113 | Id EmitBitwiseNot32(EmitContext& ctx, Id a) { | ||
| 114 | return ctx.OpNot(ctx.U32[1], a); | ||
| 115 | } | ||
| 116 | |||
| 109 | Id EmitSLessThan(EmitContext& ctx, Id lhs, Id rhs) { | 117 | Id EmitSLessThan(EmitContext& ctx, Id lhs, Id rhs) { |
| 110 | return ctx.OpSLessThan(ctx.U1, lhs, rhs); | 118 | return ctx.OpSLessThan(ctx.U1, lhs, rhs); |
| 111 | } | 119 | } |